equivalent of BS107
Abstract: MAX9259 BS107 application 4709 APP4709 BS107 serial-link AN4709
Text: Maxim > App Notes > Automotive High- Speed Interconnect Keywords: line fault monitor, serial link, failure, twisted pair cable, N- channel, MOSFET, switch, short circuit, leakage current Jun 22, 2010 APPLICATION NOTE 4709 GMSL line-fault detection By: Alex Shih
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MAX9259
com/an4709
AN4709,
APP4709,
Appnote4709,
equivalent of BS107
BS107 application
4709
APP4709
BS107
serial-link
AN4709
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marconi 6581
Abstract: 6581 TRANSMISSION under ground cable fault distance locator Marconi 6240 GSM ANTEN long range locators gsm feeder cable
Text: Application Note Installation and Maintenance of Cellular Base Station Antenna and Feeders with the 6820 series Scalar Analyzer Measurements of Return Loss VSWR , Insertion Loss and Fault Location using the 6240 series Fault Locators with the 6820 series of Scalar Analyzers
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CAT4106 D
Abstract: No abstract text available
Text: CAT4106 6 W Quad Channel DC/DC LED Driver with Diagnostics Description http://onsemi.com 1 PIN CONNECTIONS 1 LED1 GND FAULT PGND FB SW EN/PWM NC 1 LED1 GND FAULT PGND VFMAX VFMIN CTRL VIN TAB is GND NC EN/PWM SW FB Four LED Channels with Tight Current Matching
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CAT4106
CAT4106/D
CAT4106 D
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TSSOP16 LAND PATTERN
Abstract: cdal
Text: CAT4106 6 W Quad Channel DC/DC LED Driver with Diagnostics Description http://onsemi.com 1 PIN CONNECTIONS 1 LED1 GND FAULT PGND FB SW EN/PWM NC LED1 GND FAULT PGND 1 VFMAX VFMIN CTRL VIN TAB is GND NC EN/PWM SW FB Four LED Channels with Tight Current Matching
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CAT4106
CAT4106/D
TSSOP16 LAND PATTERN
cdal
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jtag timing
Abstract: No abstract text available
Text: Space FPGA Conversion Conversion Feasibility Flow Chart FPGA Netlist Timing Specification Special Functions Identification Quick Conversion STA ASIC Netlist ATPG Fault coverage Testability report Design Rules Checking Pin-out when applicable Design Rules
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Aeroflex
Abstract: coda
Text: ATE 4200 Series CODA - Capacitor Orientation Defect Analysis Enables the detection of reversed electrolytic capacitors to increase the fault coverage capability of the test system • Supports axial, radial and surface mount packages • Stable and repeatable measurements
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AMBA APB spi
Abstract: No abstract text available
Text: Features Compatible with an Embedded ARM7TDMI Processor Interfaces the ARM7TDMI Core and Atmel 32-bit Peripherals One Wait State Inserted Direct Interface with Peripheral Data Controller Fully Scan Testable up to 98% Fault Coverage Parametrizable Features on Request:
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32-bit
1286B
03/01/0M
AMBA APB spi
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ARM7tdmi pin configuration
Abstract: AMBA peripheral bus 0xFFF03
Text: Features Compatible with an Embedded ARM7TDMI Processor Interfaces the ARM7TDMI Core and Atmel 32-bit Peripherals One Wait State Inserted Direct Interface with Peripheral Data Controller Fully Scan Testable up to 98% Fault Coverage Parametrizable Features on Request:
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32-bit
05/00/0M
ARM7tdmi pin configuration
AMBA peripheral bus
0xFFF03
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81F64842B
Abstract: No abstract text available
Text: Introduction This document outlines Atmel’s process for conversion from FPGA/CPLD to ULC. Figure 1. ULC Conversion Flow Process FPGA/CPLD Netlist Retarget ULC Conversion Process Design & Supply Rules Verification Bonding Creation & Verification Scan, Bist, Jtag Insertion, ATPG Fault Coverage
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03-Dec-01
81F64842B
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SCAN90CP02
Abstract: IEEE-1149 bsdl
Text: Fault Insertion using IEEE1149.1 Silicon implementation and tool support. Ken Filliter: National Semiconductor Ken.Filliter@nsc.com Pete Collins: JTAG Technologies petec@jtag.co.uk High availability systems often include fail-over mechanisms that continually monitor
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IEEE1149
SCAN90CP02,
SCAN90CP02
IEEE-1149
bsdl
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F200
Abstract: F400 F600
Text: Features • • • • • • • Compatible with an Embedded ARM7TDMI Processor Interfaces the ARM7TDMI Core and Atmel 32-bit Peripherals One Wait State Inserted Direct Interface with Peripheral Data Controller Fully Scan Testable up to 98% Fault Coverage
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32-bit
1286C
F200
F400
F600
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Untitled
Abstract: No abstract text available
Text: Features Compatible with an Embedded 32-bit ARM7TDMI Processor Up to 32 Programmable I/O Lines Two Peripherals per I/O Line Peripheral Input Drivable by Output Peripheral Loop Mode Interrupt Generation on Event Glitch Filter Fully Scan Testable (up to 98% Fault Coverage)
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03/01/0M
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AN-1022
Abstract: AN-1023 AN-1037 SCANPSC100F SCANPSC110F motorola AN1037
Text: Fairchild Semiconductor Application Note 1022 February 1997 ABSTRACT Designing IC’s, boards, and systems with a DFT strategy that utilizes boundary-scan, will make a quantum improvement in test development cycle-time, and fault coverage both in production and in the field. Tools are commercially
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AN-1037,
AN-1022
AN-1023
AN-1037
SCANPSC100F
SCANPSC110F
motorola AN1037
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Untitled
Abstract: No abstract text available
Text: TestStation LH In-Circuit Test System Quality In-Circuit Test at an Affordable Price ½ High fault coverage ½ Safe low voltage test ½ Fast test throughput ½ Exceptional diagnostic accuracy ½ Proven test reliability ½ Scalable test capabilities ½ Low cost of
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AT-150-0303-5k
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ldr datasheet
Abstract: LDR -03 LDR 04 specification of ldr B875 LDR Data Sheet datasheet ldr B805 0011B data on LDR
Text: 0 0,&52(/(&7521,&0$5,1 6$ Change Note of the datasheets In the scope of continues improvement, we increase the fault coverage of our test program by doing the following change of the testloop routine. The microcontroller specifications have changed. The free space after last program
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EM6603,
EM6605:
EM6617,
0101b
1010b
0010b
0011b
ldr datasheet
LDR -03
LDR 04
specification of ldr
B875
LDR Data Sheet
datasheet ldr
B805
0011B
data on LDR
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Untitled
Abstract: No abstract text available
Text: Features • Atmel Advanced System Bus ASB Arbitration • Customized Options – Number of Masters (2 to 7) – Priority of Masters – Possibility of Inserting Master Hand-over Cycle for Each Master • Atmel AMBA Master Compliant • Fully Scan Testable up to 96% Fault Coverage
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1284B
04/00/0M
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MultiService Access Platform
Abstract: Ericsson tigris Ericsson 4222 ericsson msc tigris DMS-100 UL950 msc mobile switching center stac v.42bis MNP10
Text: TIGRIS AXC 711 Carrier Class Multiservice Access Platform for Service Providers Ericsson Tigris AXC 711 MultiService Access Platform is a carrier class solution for delivering high- density, highperformance and fault tolerant network access. Located at the
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11-Slot
RJ-48C
UL950
EN60950
ICSA-0003,
EN55022,
EN50082-1
CS-03,
MultiService Access Platform
Ericsson tigris
Ericsson 4222
ericsson msc
tigris
DMS-100
msc mobile switching center
stac v.42bis
MNP10
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register
Abstract: No abstract text available
Text: Features Compatible with an Embedded 32-bit ARM7TDMI Processor Up to 32 Programmable I/O Lines Interrupt Generation on Event Fully Scan Testable up to 98% Fault Coverage Can be Directly Connected to the Atmel Implementation of the AMBA™ Peripheral Bus (APB) of the ARM7TDMI Microcontroller
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32-bit
1724B
register
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NCP1937
Abstract: No abstract text available
Text: NCP1937 Combination Power Factor Correction and QuasiResonant Flyback Controllers for Adapters Common General Features http://onsemi.com MARKING DIAGRAM HV/X2 BO/X2 PControl SOIC−20 PONOFF Narrow Body QCT CASE 751BS Fault PSTimer QFB 1 20 NCP1937xxG AWLYWW
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NCP1937
751BS
NCP1937xxG
NCP1937/D
NCP1937
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Untitled
Abstract: No abstract text available
Text: Features Compatible with an Embedded 32-bit ARM7TDMI Processor Up to 32 Programmable I/O Lines Interrupt Generation on Event Glitch Filter Fully Scan Testable up to 98% Fault Coverage Can be Directly Connected to the Atmel Implementation of the AMBA Peripheral Bus (APB) of the ARM7TDMI Microcontroller
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02/00/0M
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U10000
Abstract: UUU100 priority arbitration system
Text: Features • Atmel Advanced System Bus ASB Arbitration • Customized Options – Number of Masters (2 to 7) – Priority of Masters – Possibility of Inserting Master Hand-over Cycle for Each Master • Atmel AMBA Master Compliant • Fully Scan Testable up to 96% Fault Coverage
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1284D
03/01/xM
U10000
UUU100
priority arbitration system
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80960MC
Abstract: M82965
Text: Fundamental Concepts of Fault Handling 7n CHAPTER 10 FUNDAMENTAL CONCEPTS OF FAULT HANDLING A fault handling cycle consists of four phases: error detection, error confinement, error reporting, and recovery. During the detection and confinement phases, hardware errors and software bugs are
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5 MVA generator
Abstract: 1 MVA generator 50 mva transformer 20 MVA generator ASEA ragea protection relay 10 MVA generator 2.5 MVA transformer ragea Neutral grounding resistor transformer 2 mva
Text: Ali ASEA BROWN BOVERI ABB Relays Abstract Application Type RAGEA 100 % generator stator ground-fault relay • Complete ground-fault protection for gen erator stators that are high impedance grounded • Monitors integrity of the neutral grounding and associated wiring
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B03-4012
B03-4012E
B03-1003E
B03-1215E
B03-2032E
B03-2034E
B03-2534E
B03-1613E
B03-9301E
S-721
5 MVA generator
1 MVA generator
50 mva transformer
20 MVA generator
ASEA ragea protection relay
10 MVA generator
2.5 MVA transformer
ragea
Neutral grounding resistor
transformer 2 mva
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Untitled
Abstract: No abstract text available
Text: Array Architecture for ATG with 100% Fault Coverage Abstract This paper discusses array architecture, circuitry and methodology for the autom atic generation o f test vectors. T he architecture is im plem ented in a mask programm ed version of an antifuse based
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