PQFP208
Abstract: FCBGA676 IDT75S10040B200MR TQFP144 IDT75S10020B250BR IDT75K72100S100BR FCBGA-324 IDT75P52100S100BX IDT75S10010A200BR IDT75K72234S200BRI
Text: Integrated Device Technology, Inc. 6024 Silver Creek Valley Road, San Jose, CA 95138 PRODUCT/PROCESS CHANGE NOTICE PCN PCN #: TB0901-06 DATE: 25-Feb-2009 MEANS OF DISTINGUISHING CHANGED DEVICES: FCBGA 241, 304, 324, 360, 472, 484, Product Affected: Product Mark
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TB0901-06
25-Feb-2009
25-May-2009
IDT89HPES6T6G2ZAAL8
FCBGA-324
IDTZSF200X-A
FCBGA-241
IDT89HPES6T6G2ZAALG
PQFP208
FCBGA676
IDT75S10040B200MR
TQFP144
IDT75S10020B250BR
IDT75K72100S100BR
FCBGA-324
IDT75P52100S100BX
IDT75S10010A200BR
IDT75K72234S200BRI
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PB110C
Abstract: PB124A pt36C SCM15 BA5 904 AF P PL80B PR55D pr94a diode transistor pt36c transistor pt42c
Text: LatticeSC/M Family Data Sheet DS1004 Version 02.3, January 2010 LatticeSC/M Family Data Sheet Introduction January 2010 Data Sheet DS1004 Features – 1 to 7.8 Mbits memory – True Dual Port/Pseudo Dual Port/Single Port – Dedicated FIFO logic for all block RAM
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DS1004
DS1004
500MHz
700MHz
600Mbps
125Gbps)
1A-10
1152-ball
1704-ball
PB110C
PB124A
pt36C
SCM15
BA5 904 AF P
PL80B
PR55D
pr94a diode
transistor pt36c
transistor pt42c
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PB97A
Abstract: PR45C pr77a
Text: LatticeSC/M Family Data Sheet DS1004 Version 02.4, December 2011 LatticeSC/M Family Data Sheet Introduction January 2010 Data Sheet DS1004 Features High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 139 to 942 I/Os • 700MHz global clock; 1GHz edge clocks
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
1A-10
1152-ball
1704-ball
PB97A
PR45C
pr77a
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PB80D
Abstract: PR87A PR98A PR96A PB110C pr94a diode pt36C pr77a transistor pt36c transistor pt42c
Text: LatticeSC/M Family Data Sheet DS1004 Version 02.3, January 2010 LatticeSC/M Family Data Sheet Introduction January 2010 Data Sheet DS1004 Features – 1 to 7.8 Mbits memory – True Dual Port/Pseudo Dual Port/Single Port – Dedicated FIFO logic for all block RAM
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DS1004
DS1004
500MHz
700MHz
600Mbps
125Gbps)
1A-10
1152-ball
1704-ball
PB80D
PR87A
PR98A
PR96A
PB110C
pr94a diode
pt36C
pr77a
transistor pt36c
transistor pt42c
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TR6878
Abstract: fcBGA PACKAGE thermal resistance EBGA672 FCBGA-160 BGA PACKAGE thermal profile FR4 GLASS EPOXY stiffener fbga 12 x 12 thermal resistance BGA-560P-M01 fine BGA thermal profile BGA-576
Text: Packaging 11 fujitsu-fme.com FUJITSU MICROELECTRONICS EUROPE www.fujitsu www.fujitsu fme.com ASIC PACKAGE FAMILY 22 < FC-BGA : Electrical & Thermal-enhanced Solution with >1000-pin < TAB-BGA : Fine-pitch Bonding Solution < EBGA : Electrical & thermal-enhanced Solution
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1000-pin
FDH-BGA352
15MHz)
TR6878
H1/1999
fcBGA PACKAGE thermal resistance
EBGA672
FCBGA-160
BGA PACKAGE thermal profile
FR4 GLASS EPOXY stiffener
fbga 12 x 12 thermal resistance
BGA-560P-M01
fine BGA thermal profile
BGA-576
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TMS320C6416TBGLZA8
Abstract: TMS320C6414TZLZ1 TMS320C6414TGLZA7
Text: TMS320C6414T, TMS320C6415T, TMS320C6416T FIXEDĆPOINT DIGITAL SIGNAL PROCESSORS SPRS226K − NOVEMBER 2003 − REVISED JANUARY 2008 D Highest-Performance Fixed-Point DSPs D D D D D − 1.67-/1.39-/1.17-/1-ns Instruction Cycle − 600-/720-/850-MHz, 1-GHz Clock Rate
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TMS320C6414T,
TMS320C6415T,
TMS320C6416T
SPRS226K
17-/1-ns
600-/720-/850-MHz,
32-Bit
C6414/15/16
TMS320C64x
32-/40-Bit)
TMS320C6416TBGLZA8
TMS320C6414TZLZ1
TMS320C6414TGLZA7
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Untitled
Abstract: No abstract text available
Text: LatticeSC Family Data Sheet DS1004 Version 01.4b, February 2007 LatticeSC Family Data Sheet Introduction November 2006 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
SC115
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PB68C
Abstract: LFSCM3GA40EP1
Text: LatticeSC Family Data Sheet DS1004 Version 01.4a, January 2007 LatticeSC Family Data Sheet Introduction November 2006 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
LVPECL33
SC115
PB68C
LFSCM3GA40EP1
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Untitled
Abstract: No abstract text available
Text: LatticeSC Family Data Sheet DS1004 Version 01.5, March 2007 LatticeSC Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
LFSC25
FF1020
LFSC80
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Untitled
Abstract: No abstract text available
Text: LatticeSC Family Data Sheet DS1004 Version 01.5, March 2007 LatticeSC Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
LFSC25
FF1020
LFSC80
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Untitled
Abstract: No abstract text available
Text: LatticeSC Family Data Sheet DS1004 Version 01.5, March 2007 LatticeSC Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
LFSC25
FF1020
LFSC80
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Untitled
Abstract: No abstract text available
Text: LatticeSC/M Family Data Sheet DS1004 Version 01.6, August 2007 LatticeSC/M Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
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AND8020
Abstract: NBSG11 NBSG11BA NBSG11BAR2
Text: NBSG11 Product Preview 2.5V/3.3VĄSiGe 1:2 Differential Clock Driver with RSECL* Outputs http://onsemi.com *Reduced Swing ECL The SG11 is a Silicon Germanium 1–to–2 differential fanout buffer, optimized for low skew and ultra–low JITTER. Inputs incorporate internal 50 W termination resistors and accept
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NBSG11
r14525
NBSG11/D
AND8020
NBSG11
NBSG11BA
NBSG11BAR2
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485G
Abstract: NBSG86A NBSG86ABA NBSG86ABAEVB NBSG86ABAR2 NBSG86AMN NBSG86AMNR2 SG86A
Text: NBSG86A 2.5V/3.3V SiGe Differential Smart Gate with Output Level Select The NBSG86A is a multi−function differential Logic Gate which can be configured as an AND/NAND, OR/NOR, XOR/XNOR, or 2:1 MUX. This device is part of the GigaComm family of high performance Silicon Germanium products. The device is housed in a
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NBSG86A
NBSG86A
16-pin,
NBSG86A/D
485G
NBSG86ABA
NBSG86ABAEVB
NBSG86ABAR2
NBSG86AMN
NBSG86AMNR2
SG86A
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2-bit comparator
Abstract: LFSC3GA15E-5F900I PR77A PR55D pr94a diode transistor pt36c pt36C PB110C pb127d PB138
Text: LatticeSC/M Family Data Sheet DS1004 Version 01.8, November 2007 LatticeSC/M Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
2-bit comparator
LFSC3GA15E-5F900I
PR77A
PR55D
pr94a diode
transistor pt36c
pt36C
PB110C
pb127d
PB138
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Untitled
Abstract: No abstract text available
Text: LatticeSC/M Family Data Sheet DS1004 Version 02.1, June 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 139 to 942 I/Os • 700MHz global clock; 1GHz edge clocks
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
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fcBGA PACKAGE thermal resistance
Abstract: AND8020 NBSG14 NBSG14BA NBSG14BAR2 SG14 SG14 marking FCBGA
Text: NBSG14 Product Preview 2.5V/3.3VĄSiGe 1:4 Differential Clock Driver with RSECL* Outputs http://onsemi.com *Reduced Swing ECL The SG14 is a Silicon Germanium 1–to–4 clock distribution chip, optimized for low skew and ultra–low JITTER. Inputs incorporate internal 50 W termination resistors and accept
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NBSG14
r14525
NBSG14/D
fcBGA PACKAGE thermal resistance
AND8020
NBSG14
NBSG14BA
NBSG14BAR2
SG14
SG14 marking
FCBGA
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Untitled
Abstract: No abstract text available
Text: LatticeSC/M Family Data Sheet DS1004 Version 02.0, March 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 139 to 942 I/Os
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
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qfn 3x3 socket
Abstract: No abstract text available
Text: NBSG86A 2.5V/3.3V SiGe Differential Smart Gate with Output Level Select The NBSG86A is a multi−function differential Logic Gate which can be configured as an AND/NAND, OR/NOR, XOR/XNOR, or 2:1 MUX. This device is part of the GigaComm family of high performance Silicon Germanium products. The device is housed in a
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NBSG86A
16-pin,
NBSG86A/D
qfn 3x3 socket
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dx 1305
Abstract: 485G AND8020 NBSG86A NBSG86ABA NBSG86ABAR2 1B39
Text: NBSG86A 2.5V/3.3V SiGe Differential Smart Gate with Output Level Select The NBSG86A is a multi−function differential Logic Gate which can be configured as an AND/NAND, OR/NOR, XOR/XNOR, or 2:1 MUX. This device is part of the GigaComm family of high performance Silicon Germanium products. The device is housed in a
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NBSG86A
FCBGA-16
QFN-16
NBSG86A
16-pin,
NBSG86A/D
dx 1305
485G
AND8020
NBSG86ABA
NBSG86ABAR2
1B39
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Untitled
Abstract: No abstract text available
Text: NBSG86A 2.5V/3.3V SiGe Differential Smart Gate with Output Level Select The NBSG86A is a multi−function differential Logic Gate which can be configured as an AND/NAND, OR/NOR, XOR/XNOR, or 2:1 MUX. This device is part of the GigaComm family of high
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NBSG86A
NBSG86A/D
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pb127d
Abstract: No abstract text available
Text: LatticeSC/M Family Data Sheet DS1004 Version 02.2, December 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 139 to 942 I/Os • 700MHz global clock; 1GHz edge clocks
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
pb127d
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Untitled
Abstract: No abstract text available
Text: LatticeSC/M Family Data Sheet DS1004 Version 01.9, January 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
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QFN tray 3x3
Abstract: qfn 3x3 tray dimension
Text: NBSG86A 2.5V/3.3V SiGe Differential Smart Gate with Output Level Select The NBSG86A is a multi−function differential Logic Gate which can be configured as an AND/NAND, OR/NOR, XOR/XNOR, or 2:1 MUX. This device is part of the GigaComm family of high
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NBSG86A
16-pin,
NBSG86A/D
QFN tray 3x3
qfn 3x3 tray dimension
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