21c3u
Abstract: No abstract text available
Text: TEXAS INSTR LOGIC 2SE D • flTbl723 00fl3H15 0 ■ SN54ALS253, SN54AS253, SN74ALS253, SN74AS253 DUAL 1-0F-4 DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS D 2 66 1, A P R IL 1 8 8 2 - R E V IS E O M A Y 19 86 • Three-State Versions of 'A L S 1 5 3 and ‘A S 1 53
|
OCR Scan
|
flTbl723
00fl3H15
SN54ALS253,
SN54AS253,
SN74ALS253,
SN74AS253
300-mil
21c3u
|
PDF
|
SN54ABT640
Abstract: SN74ABT640
Text: flTbl723 0 0 ci 2b ûci 732 ITII3 SN54ABT640, SN74ABT640 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS104A- D377B, FEBRUARY 1991 - REVISED OCTOBER 1992 State-of-the-Art EPIC-UB BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per
|
OCR Scan
|
flTbl723
SN54ABT640,
SN74ABT640
SCBS104A-
D377B,
MIL-STD-883C,
JESD-17
-32-mA
64-mA
sn54abt640.
SN54ABT640
|
PDF
|
LVT2952
Abstract: SN54LVT2952 SN74LVT2952
Text: SN54LVT2952, SN74LVT2952 3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS S CBS152C - MAY 1992 - REVISED FEBRUARY 1994 SN54LVT2952 . . . JT PACKAGE SN74LVT2952 . . . DB, DW, OR PW PACKAGE TOP VIEW State-of-the-Art Advanced BICMOS Technology (ABT) Design for 3.3-V
|
OCR Scan
|
SN54LVT2952,
SN74LVT2952
SCBS152C
MIL-STD-883C,
JESD-17
LVT2952
SN54LVT2952
|
PDF
|
sf 127d
Abstract: 127D IC51-1324-828 SN74ABT3611 D103E
Text: SN74ABT3611 64 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCBS127D - JULY 1992 - REVISED SEPTEMBER 1995 Free-Running CLKA and CLKB Can Be Asynchronous or Coincident 64 x 36 Clocked FIFO Buffering Data From Port A to Port B Mailbox-Bypass Register In Each Direction
|
OCR Scan
|
SN74ABT3611
SCBS127D
120-Pin
132-Pin
Q103E1S
sf 127d
127D
IC51-1324-828
D103E
|
PDF
|
SN54ABT620
Abstract: SN74ABT620
Text: 0 ^ 1 7 2 3 00=521=7=5 ÔT3 o.454ABT620, SN74ABT620 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS S C B S 1 1 3 A - D 3 7 7 6 , F E B R U A R Y 1991 - R E V IS E D O C T O B E R 1 9 9 2 SN54ABT620 . . . J PACKAGE SN74ABT620 . . . DB, DW, OR N PACKAGE TOP VIEW
|
OCR Scan
|
454ABT620,
SN74ABT620
SCBS113A-
D3776,
MIL-STD-883C,
JESD-17
-32-mA
64-mA
SN54ABT620
SN74ABT620
SN54ABT620
|
PDF
|
SN74ACT7811
Abstract: SN74ACT7881 SN74ACT7882 SN74ACT7884
Text: SN74ACT7881 1024 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS227A- FEBRUARY 1993 - REVISED JUNE 1994 Member of the Texas Instruments Wldebus Family * Input-Ready, Output-Ready, and Half-Full Flags Independent Asynchronous Inputs and Outputs Read and Write Operations Can Be
|
OCR Scan
|
SN74ACT7881
SCAS227A-
SN74ACT7882,
SN74ACT7884,
SN74ACT7811
50-pF
68-Pin
80-Pin
D0-D17
SN74ACT7811
SN74ACT7881
SN74ACT7882
SN74ACT7884
|
PDF
|
SN74AHCT138
Abstract: 3-line to 8-line
Text: SN74AHCT138 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER SCLS266 - DECEMBER 1995 D, DB, N, OR PW PACKAGE ftO P VIEW Inputs Are TTL-Voltage Compatible EPIC Enhanced-Performance Implanted CMOS) Process Designed Specifically for High-Speed Memory Decoders and Data Transmission
|
OCR Scan
|
SN74AHCT138
SCLS266
SN74AHCT138
24-Bit
ibl723
32-Bit
fltbl723
3-line to 8-line
|
PDF
|
hc4060
Abstract: HC4060 crystal SN74HC4060 14-STAGE SN54HC4060
Text: SN54HC4060, SN74HC4060 14-STAGE ASYNCHRONOUS BINARY COUNTERS AND OSCILLATORS SC LS 161A - DECEMBER 1 9 8 2 - REVISED JANUARY 1996 • Allow Design of Either RC or Crystal Oscillator Circuits • Package Options Include Plastic Small-Outline D and Ceramic Flat (W)
|
OCR Scan
|
SN54HC4060,
SN74HC4060
14-STAGE
SCLS161A-
300-mil
HC4060
zero82-REVISED
HC4060
HC4060 crystal
SN74HC4060
SN54HC4060
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 54AC11021,74AC11021 DUAL 4-INPUT POSITIVE-AND GATES _ D 2957, JULY 1987 - R EVISED APRIL 1993 * Flow-Through Architecture Optimizes PCB Layout 54AC11021 . . . J PACKAGE 74AC11021 . . . D OR N PACKAGE TOP VIEW * Center-Pin Vcc and GND Configurations
|
OCR Scan
|
54AC11021
74AC11021
500-mA
300-mil
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SN54F521, SN74F521 8-BIT IDENTITY COMPARATORS SDFS091 - MARCH 1987 - REVISED OCTOBER 1993 • Compares Two 8-Bit Words • Package Options Include Plastic Smali-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs SN54F521 . . . J PACKAGE
|
OCR Scan
|
SN54F521,
SN74F521
SDFS091
300-mil
SN54F521
SN54F521
SN74F521
|
PDF
|
1D10
Abstract: SN54ABT16841 SN74ABT16841
Text: SN54ABT16841, SN74ABT16841 20-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS S C B S 2 2 2 A - S E P T E M B E R 1992 - R E V IS E D JULY 1994 Members of the Texas Instruments Widebus1* Family State-of-the-Art EP/C-IIB BICMOS Design Significantly Reduces Power Dissipation
|
OCR Scan
|
SN54ABT16841,
SN74ABT16841
20-BIT
SC6S222A
MIL-STD-883C,
JESD-17
-32-mA
64-mA
300-mil
1D10
SN54ABT16841
|
PDF
|
SN74ALVCH16952
Abstract: No abstract text available
Text: SN74ALVCH16952 16- BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS SCES011 - JULY 1995 DGG OR DL PACKAGE TOP VIEW 10EA B [ 1 1C L K A B [ 2 1CEAB [ 3 GND [ 4 1A1 [ 5 1A2 [ 6 vCc È 7 1A3 L 8 1A4 [ 9 1A5 [ 10 g n d [ 11 1A6 [ 12 1A7 [ 13 d e s c r ip t io n
|
OCR Scan
|
SN74ALVCH16952
SCES011
300-mll
16-bit
SN74ALVCH16952
010252e]
|
PDF
|
SN74LVC541A
Abstract: No abstract text available
Text: SN74LVC541A OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SC AS298D - JANUARY 1993 - R E V IS E D JANUARY 1997 • EPIC Enhanced-Performance Implanted CMOS Submicron Process • Typical V q l p (Output Ground Bounce) < 0.8 V at Vc c = 3.3 V, TA = 25°C •
|
OCR Scan
|
SN74LVC541A
SCAS298D
flTbl723
|
PDF
|
SN54ALS646
Abstract: SN54ALS648 SN54AS646 SN74AS646 SN74AS648 SN74ALS646-1
Text: SN74ALS646, SN74ALS648. SN74AS646, SN74AS648 SN54ALS646, SN54ALS648, SN54AS646 OCTAL BUS TRANSCEIVERS AND REGISTERS D 26 61 , D E C E M B E R 1 9 8 3 - R EV IS E D O C T O B E R 1991 Independent Registers for A and B Buses SN34ALS . S N 54A S ' JT PACKAGE
|
OCR Scan
|
SN74ALS646,
SN74ALS648.
SN74AS646,
SN74AS648
SN54ALS646,
SN54ALS648,
SN54AS646
D2661,
300-mil
ALS646,
SN54ALS646
SN54ALS648
SN54AS646
SN74AS646
SN74AS648
SN74ALS646-1
|
PDF
|
|
ir911
Abstract: A14C A15C A25C A26C SN74ACT3631 SN74ACT3641 SN74ACT3651
Text: SN74ACT3641 1024x36 CLOCKED FIRST-IN, FIRST-OUT MEMORY S CAS338A - JANUARY 1994 - RE V IS E D JUNE 1994 Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Clocked FIFO Buffering Data From Port A to Port B Memory Size: 1024 x 36 Synchronous Read Retransmit Capability
|
OCR Scan
|
SN74ACT3641
SCAS33SA
SN74ACT3631,
SN74ACT3651
120-Pin
ir911
A14C
A15C
A25C
A26C
SN74ACT3631
SN74ACT3641
|
PDF
|
1B10
Abstract: 1B12 SN74ALVCH16269 Q1023
Text: SN74ALVCH16269 12-BIT TO 24-BIT REGISTERED BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES019-JULY 1995 Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process
|
OCR Scan
|
SN74ALVCH16269
12-BIT
24-BIT
SCES019-JULY
MIL-STD-883C,
JESD-17
flTbl723
1B10
1B12
Q1023
|
PDF
|
PASB
Abstract: ec ubt 4.8 t LVTH182502A LVTH18502A SN54LVTH182502A SN54LVTH18502A SN74LVTH182502A SN74LVTH18502A
Text: SN54LVTH18502A, SN54LVTH182502A, SN74LVTH18502A, SN74LVTH182502A 3.3-V ABT SCAN TEST DEVICES WITH 18-BIT UNIVERSAL BUS TRANSCEIVERS S C B S 6 6 8 A -JULY 1 9 9 6 - REVISED DECEMBER 1996 Members of the Texas Instruments SCOPE Family of Testability Products
|
OCR Scan
|
SN54LVTH18502A,
SN54LVTH182502A,
SN74LVTH18502A,
SN74LVTH182502A
18-BIT
SCBS668A-JULY
LVTH182502A
PASB
ec ubt 4.8 t
LVTH18502A
SN54LVTH182502A
SN54LVTH18502A
SN74LVTH182502A
SN74LVTH18502A
|
PDF
|
HAI 7203
Abstract: ACT8847 74ACT8847 SN74 multiplier
Text: TEXAS INSTR LOGIC SSE D 0^1723 GQÖS7G3 7 SN74ACT8847 64-Bit Floating Point Unit • Meets IEEE Standard for Single- and DoublePrecision Formats • Performs Floating Point and Integer Add, Subtract, Multiply, Divide, Square Root, and Compare • 64-Bit IEEE Divide in 11 Cycles, 64-Bit Square
|
OCR Scan
|
SN74ACT8847
64-Bit
SN74ACT8837
30-ns,
40-ns
50-ns
SN74ACT8847
AGT88X7
HAI 7203
ACT8847
74ACT8847
SN74 multiplier
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SN54ALS32, SN54AS32, SN74ALS32, SN74AS32 QUADRUPLE 2-INPUT POSITIVE-OR GATES S D A S 1 1 3 B - A P R IL 19 8 2 - R E V IS E D D E C E M B E R 1 9 9 4 • Package Options Include Plastic Small-Outline D Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and
|
OCR Scan
|
SN54ALS32,
SN54AS32,
SN74ALS32,
SN74AS32
300-mil
SN54ALS32
SN54AS32
SN74ALS32
|
PDF
|
Untitled
Abstract: No abstract text available
Text: TEXAS INSTR LO G IC b3E D • 6^1723 om ahaa T34 m m 3 54AC11478,74AC11478 OCTAL DUAL-RANK D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCAS182-D3432, APRIL 1989-REVISED JANUARY 1992 54AC11478. . . JT PACKAGE 74AC11478. . . DW OR NT PACKAGE Specifically Designed for Dala
|
OCR Scan
|
54AC11478
74AC11478
SCAS182-D3432,
1989-REVISED
54AC11478.
74AC11478.
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SN54ALS373, SN54AS373, SN74ALS373A, SN74AS373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SDAS083B -A PR IL 1982 - REVISED DECEMBER 1994 • Eight Latches in a Single Package • 3-State Bus-Driving True Outputs • Full Parallel Access for Loading
|
OCR Scan
|
SN54ALS373,
SN54AS373,
SN74ALS373A,
SN74AS373
SDAS083B
SN54AS373
300-mil
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SN74ALS843 9-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SDAS232A - DECEMBER 1983 - REVISED JANUARY 1995 • 3-State Buffer-Type Outputs Drive Bus Lines Directly DW OR NT PACKAGE TOP VIEW • Bus-Structured Pinout • Provides Extra Bus-Driving Latches
|
OCR Scan
|
SN74ALS843
SDAS232A
300-mil
|
PDF
|
74ACT11874
Abstract: No abstract text available
Text: 74ACT11874 DUAL 4-BIT D-TYPE: EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS S C A S 2 1 2 - D3447, MARCH 1990 - REVISED A P R IL 1983 * Inputs Are TTL-Voltage Compatible DW PACKAGE TOP VIEW * 3-State Buffer-Type Outputs Drive Bus Lines Directly 1CLK[ 1
|
OCR Scan
|
74ACT11874
SCAS212
D3447,
500-mA
|
PDF
|
SN74LVC258A
Abstract: No abstract text available
Text: SN74LVC258A QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUTS S C A S 345D - MARCH 1994 - REVISED JANUARY 1997 E P IC Enhanced-Performance Implanted D, DB, OR PW PACKAGE (TOP VIEW CMOS) Submicron Process 3 A/B [ 1 Typical V q h v (Output V q h Undershoot)
|
OCR Scan
|
SN74LVC258A
SCAS345D-
0Tbl753
SN74LVC258A
|
PDF
|