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    FPSLIC Search Results

    FPSLIC Datasheets (30)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    FPSLIC Atmel An Introduction to DSP Applications using the AT40K FPGA Original PDF
    FPSLIC Atmel Selected Features, Atmels FPSLIC: Field Programmable System Level IC Original PDF
    FPSLIC Atmel Press Releases Original PDF
    FPSLIC Atmel Field Programmable Gate Array (FPGAs) - Hot Topics Original PDF
    FPSLIC Application Note Atmel Designing in Split Power Supply Support for AT94KAL-AX and AT94SAL-AX Devices Original PDF
    FPSLIC - Application Notes Atmel Accessing 16-bit I-O Registers Original PDF
    FPSLIC - Application Notes Atmel AT94K Series Configuration , Configuration is the process by which a design is loaded into an AT94K FPSLIC device. AT94K Series devices are SRAM-based and can be configured any number of times. Original PDF
    FPSLIC - Application Notes Atmel Implementing the Test-Bitstream Design on the ATSTK94 FPSLIC Starter Kit , The test-bitstream design tests the functionality of the starter kit. Original PDF
    FPSLIC - Application Notes Atmel C Code for Interfacing the FPSLIC AVR Core to AT17 Series Configuration Memories , This Application Note describes how to in-system program (ISP) an Atmel AT17 Series Configuration Memory using the AVR Core of one FPSLIC device and how to use the built-in Original PDF
    FPSLIC - Application Notes Atmel Implementing the Scrolling Design on the ATSTK94 FPSLIC Starter Kit , This Application Note explains how to use the alpha-numeric display connected to the FPGA and the LED driven by PortD from the AVR. Original PDF
    FPSLIC - Application Notes Atmel 16-bit Arithmetic , This Application Note lists program examples for arithmetic operation on 16-bit values Original PDF
    FPSLIC - Application Notes Atmel AT94K, FPSLIC Interrupt Macros , Interrupt macros provide customers with a simple method for enabling-disabling interrupts. Original PDF
    FPSLIC - Application Notes Atmel AT94K, FPSLIC Timer Macros , The timer macros provide a simple method for using the timers of the FPSLIC device Original PDF
    FPSLIC - Application Notes Atmel AT94K, FPSLIC UART Macros , The UART macros provide a simple method for enabling-disabling and configuring the UARTS Original PDF
    FPSLIC - Application Notes Atmel 2-Wire Serial Macros , The 2-wire serial macros provide a simple method for setting the 2-wire serial features on the AT94K device. Original PDF
    FPSLIC - Application Notes Atmel Getting started with C for the FPSLIC Family Using the IAR Compiler , The purpose of this Application Note is to guide new users through the initial settings of the IAR Embedded Workbench for AVR and compile a simple C program. Original PDF
    FPSLIC - Application Notes Atmel Using the FPSLIC UARTs in C , This Application Note describes how to set up and use the UARTs present in most FPSLIC devices. C code examples are included for polled and interrupt controlled UART applications. Original PDF
    FPSLIC - Application Notes Atmel Register and Bit Name Definitions for the FPSLIC Family , This Application Note contains files that allow the user to use Register and Bit names from the data book when writing assembly programs. Original PDF
    FPSLIC - Application Notes Atmel AT94K, FPSLIC System Macros , The system macros provide customers with a simple method for using system level features on the AT94K device. Original PDF
    FPSLIC - Application Notes Atmel Getting Started with ImageCraft C for the FPSLIC Family , The purpose of this Application Note is to guide new users through the initial settings of the ImageCraft IDE and compile a simple C program. Original PDF

    FPSLIC Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    2431B

    Abstract: AT40KAL AT94K AT94KAL AT40K
    Text: IP Core Generator: Decoder Features • Accessible from the Macro Generator Dialog and HDLPlanner – Included in IDS for • • • • • • • • FPGA Devices and System Designer™ for AT94K FPSLIC™ Devices Variable Output Logic Level Variable Width of Input Vectors


    Original     		PDF AT94K AT40K AT40KAL AT94K 2431B 1/02/xM AT40KAL AT94KAL AT40K

    AT40K

    Abstract: AT94K ubrof
    Text: Getting Started with C for the FPSLIC Family Using the IAR Compiler Features • • • • • How to Open a New Project Description of Option Settings Linker Command File Examples Writing and Compiling the C Code How to Load the Debug and Executable


    Original     		PDF AT94K 11/00/xM AT40K AT94K ubrof

    AT40K

    Abstract: AT94K
    Text: Getting Started with ImageCraft C for the FPSLIC™ Family Features • How to Open a New Project • Description of Option Settings • Writing and Compiling the C Code Introduction The purpose of this application note is to guide new users through the initial settings of the ImageCraft IDE and compile


    Original     		PDF AT94K 30-day 11/00/xM AT40K

    gsm coding in c for 8051 microcontroller

    Abstract: avr and gsm modem datasheet 8051 microcontroller Assembly language program 8051 microcontroller interface with gps gsm coding for 8051 microcontroller avr and gsm modem different vendors of cpld and fpga cell phones ip cores gsm modem atmel AT40K
    Text: Selected Features Atmel’s FPSLIC : Field Programmable System Level IC System Level Integration FPSLIC devices integrate 5,000–40,000 gates of high-performance AT40K FPGA with 2K–18K bits of AT40K FreeRAM™ distributed SRAM, a high-performance 20+ MIPS RISC microcontroller with a


    Original     		PDF AT40K gsm coding in c for 8051 microcontroller avr and gsm modem datasheet 8051 microcontroller Assembly language program 8051 microcontroller interface with gps gsm coding for 8051 microcontroller avr and gsm modem different vendors of cpld and fpga cell phones ip cores gsm modem atmel

    design ideas

    Abstract: atmel application note
    Text: Write us an FPSLIC application note and we will give you 6 months software…FREE! Credit where credit is due right! So here’s the deal…. We at Atmel think that once you start using our FPSLIC starter kit that you’ll come up with lots of neat ideas on how to use the board and the


    Original     		PDF

    Inverter Gates

    Abstract: AT40K AT40KAL AT94K AT94KAL
    Text: IP Core Generator: Logic Gates Features • Accessible from the Macro Generator Dialog and HDLPlanner – Included in IDS for • • • • • • • FPGA Devices and System Designer™ for AT94K FPSLIC™ Devices Variable Width of Input and Output Data


    Original     		PDF AT94K AT40K AT40KAL AT94K 1/02/xM Inverter Gates AT40K AT40KAL AT94KAL

    mq4 datasheet

    Abstract: fifo buffer fifo vhdl AT40K AT40KAL AT94K MQ-3
    Text: IP Core Generator: Fast FIFO Implementation Features • • • • • FIFO Depth Up to 128 Clock Speed Up to 56 MHz Implementation Uses FreeRAM in Architecture Customizable Full and Empty Signals Available from the IP Core Generator for AT40K, AT40KAL and AT94K FPSLIC™


    Original     		PDF AT40K, AT40KAL AT94K AT40K mq4 datasheet fifo buffer fifo vhdl AT94K MQ-3

    atmel 426

    Abstract: AT40K AT40KAL AT94K
    Text: IP Core Generator: Constant Features • Accessible from the Macro Generator Dialog and HDLPlanner – Included in IDS for FPGA Devices and System Designer™ for AT94K FPSLIC™ Devices • Variable Width of Output Vectors • Constant Value • Binary, Octal, Decimal or Hexadecimal Radix Value


    Original     		PDF AT94K 2429B 1/02/xM atmel 426 AT40K AT40KAL

    Atmel DATE CODE

    Abstract: avr instruction set summary "CISC Microcontrollers" avr enhanced risc microcontroller data book 4201J AT40K AT94K AT94K05AL AT94K10AL AT94K40AL
    Text: Features • Monolithic Field Programmable System Level Integrated Circuit FPSLIC • • • • • • • • • • • • • • • • – AT40K SRAM-based FPGA with Embedded High-performance RISC AVR® Core, Extensive Data and Instruction SRAM and JTAG ICE


    Original     		PDF AT40K 1138IS Atmel DATE CODE avr instruction set summary "CISC Microcontrollers" avr enhanced risc microcontroller data book 4201J AT94K AT94K05AL AT94K10AL AT94K40AL

    2445A

    Abstract: AT40K AT40KAL AT94K atmel 24 ROM16
    Text: IP Core Generator: ROM Features • Accessible from the Macro Generator Dialog and HDLPlanner – Included in IDS for • • • • FPGA Devices and System Designer™ for AT94K FPSLIC™ Devices Variable Width of Address Inputs Variable Width of ROM Data


    Original     		PDF AT94K AT40K AT40KAL AT94K 12/01/xM 2445A AT40K AT40KAL atmel 24 ROM16

    ATMEL 706

    Abstract: 3012A scrolling led display atmel AT17 AT17A AT17LV010 AT94K ATDH2225 ATST94K ATSTK94
    Text: UART and 2-wire Interface Reconfiguration of the AT94K FPSLIC using an AT17 Series EEPROM Features • Use of the AVR External Interrupt Service C Routine to Initiate Data Transfer from the Graphic User Interface GUI of a Personal Computer • Use of the AVR C Routine with XY-modem Protocol to Receive Configuration Data from


    Original     		PDF AT94K AT94K AT17LV010 ATMEL 706 3012A scrolling led display atmel AT17 AT17A ATDH2225 ATST94K ATSTK94

    pulse generator

    Abstract: AT40K AT40KAL AT94K 2443A-12
    Text: IP Core Generator: Pulse Generator Features • Pulse Generator – Fixed • Pulse Generator – Loadable • Accessible from the Macro Generator Dialog and HDLPlanner – Included in IDS for • • • • • • FPGA Devices and System Designer™ for AT94K FPSLIC™ Devices


    Original     		PDF AT94K AT40K AT40KAL AT94K 12/01/xM pulse generator AT40K AT40KAL 2443A-12

    AT17

    Abstract: AT94K ATDH2225 ATST94K ATSTK94
    Text: Testing the ATSTK94 To program any design onto the Starter Kit, first of all you need to program the Configurator AT17XX with a bitstream file, that in turn downloads the configuration data to the AT94K Field Programmable System Level Integrated Circuit (FPSLIC ) device


    Original     		PDF ATSTK94 AT17XX) AT94K ATST94K AT17 ATDH2225 ATST94K ATSTK94

    AT40K

    Abstract: AT40KAL AT94K AT94KAL
    Text: IP Core Generator: Transparent Latch Features • Accessible from the Macro Generator Dialog and HDLPlanner – Included in IDS for • • • • • • • FPGA Devices and System Designer™ for AT94K FPSLIC™ Devices Variable Width of Input and Output Data


    Original     		PDF AT94K AT40K AT40KAL AT94K 2437B 1/02/xM AT40K AT40KAL AT94KAL

    AT40K

    Abstract: AT40KAL AT94K
    Text: IP Core Generator: Bus Ripper Features • Accessible from the Macro Generator Dialog and HDLPlanner – Included in IDS for FPGA Devices and System Designer™ for AT94K FPSLIC™ Devices • Variable Width of Input Bus • Used for Schematic Designs Only


    Original     		PDF AT94K 2427B 1/02/xM AT40K AT40KAL

    ATMEL 218

    Abstract: fif16 AT40K AT40KAL AT94K AT94KAL atmel 458
    Text: IP Core Generator: FIFO Features • Accessible from the Macro Generator Dialog and HDLPlanner – Included in IDS for FPGA Devices and System Designer™ for AT94K FPSLIC™ Devices • Variable Width of Parallel Input and Output Data • Variable Depth of FIFO


    Original     		PDF AT94K AT40K 2433B 1/02/xM ATMEL 218 fif16 AT40KAL AT94KAL atmel 458

    ICCA90

    Abstract: lnkat94k-32s atmel Cross Reference Search
    Text: Getting Started with the IAR Embedded Workbench for FPSLIC Introduction The purpose of this application note is to guide new users through the design and development of C/Assembly code for FPSLIC when using an IAR Embedded Workbench IAREW . This application note provides information on all the settings in


    Original     		PDF

    atmel h 208

    Abstract: atmel 160 pin ATDH40M BBS 408-436-4309 AT40K AT94K ATDH40D100 atmel 24
    Text: FPSLIC Prototype Kit: Using ATDH40M with Both AT94K and AT40K Devices The existing ATDH40M prototype system can be modified to work with the AT94K Field Programmable System Level Integrated Circuit FPSLIC device and the AT40K FPGA device. The ATDH40M motherboard interfaces with various daughter


    Original     		PDF ATDH40M AT94K AT40K AT94K FPSLIC/AT40K atmel h 208 atmel 160 pin BBS 408-436-4309 ATDH40D100 atmel 24

    AT94K

    Abstract: ATSTK94 CS10 CS11 CS12
    Text: Sleep Modes and Achieving Low-power Supply Current on AT94 Series FPSLIC Devices Introduction The purpose of this application note is to provide designers with an understanding of the 3 available Sleep Modes and how to achieve low-power supply current on AT94


    Original     		PDF AT94K ATSTK94 CS10 CS11 CS12

    atmel 846

    Abstract: atmel 1138 PWM code using fpga avr microcontroller avr instruction set summary ATMEL serial EEPROM 32K AT17 AT40K AT94K AT94K05
    Text: Features • Monolithic Field Programmable System Level Integrated Circuit FPSLIC • • • • • • • • • • • • • • – AT40K SRAM-based FPGA with Embedded High-performance RISC AVR Core and Extensive Data and Instruction SRAM


    Original     		PDF AT40K 1138DS 03/01/xM atmel 846 atmel 1138 PWM code using fpga avr microcontroller avr instruction set summary ATMEL serial EEPROM 32K AT17 AT94K AT94K05

    vhdl code for Clock divider for FPGA

    Abstract: cyclic redundancy check verilog source AT40K microcontroller using vhdl vhdl code CRC 32
    Text: Selected Features Atmel’s System Designer : EDA Tool Suite for Co-verification System Designer with System Level Co-verification System Designer is a fully integrated co-verification tool suite that allows hardware/software co-design of FPSLIC™, programmable system-level devices in a unified environment. Its co-verification framework


    Original     		PDF

    CABGA

    Abstract: fpga JTAG Programmer Schematics AT17 AT40K AT94K AT94S AT94S05AL AT94S10AL AT94S40AL C16107
    Text: Features • Multichip Module Containing Field Programmable System Level Integrated Circuit • • • • • • • • • • • • • • • • • FPSLIC and Secure Configuration EEPROM Memory 512 Kbits to 1 Mbit of Configuration Memory with Security Protection and In-System


    Original     		PDF AT40K 2314D CABGA fpga JTAG Programmer Schematics AT17 AT94K AT94S AT94S05AL AT94S10AL AT94S40AL C16107

    atmel 846

    Abstract: PWM code using fpga 4201J AT40K AT94K AT94K05AL AT94K10AL AT94K40AL AT94K40AL-25DQC AT94KAL
    Text: Features • Monolithic Field Programmable System Level Integrated Circuit FPSLIC • • • • • • • • • • • • • • • – AT40K SRAM-based FPGA with Embedded High-performance RISC AVR Core, Extensive Data and Instruction SRAM and JTAG ICE


    Original     		PDF AT40K 1138GS atmel 846 PWM code using fpga 4201J AT94K AT94K05AL AT94K10AL AT94K40AL AT94K40AL-25DQC AT94KAL

    Untitled

    Abstract: No abstract text available
    Text: Features • Multichip Module Containing Field Programmable System Level Integrated Circuit • • • • • • • • • • • • • • • • FPSLIC and Secure Configuration EEPROM Memory 512 Kbits to 1 Mbit of Configuration Memory with Security Protection and In-System


    Original     		PDF AT40K