AD9755
Abstract: AD9755AST AD9755ASTRL AD9755-EB P1B10 MHz VCO C0225
Text: FEATURES 14-Bit Dual Muxed Port DAC 300 MSPS Output Update Rate Excellent SFDR and IMD Performance SFDR to Nyquist @ 25 MHz Output: 71 dB Internal Clock Doubling PLL Differential or Single-Ended Clock Input On-Chip 1.2 V Reference Single 3.3 V Supply Operation
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Original
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14-Bit
48-Lead
AD9755
14-bit
C02252
AD9755AST
AD9755ASTRL
AD9755-EB
P1B10
MHz VCO
C0225
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PDF
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AD9753
Abstract: AD9753AST AD9753ASTRL AD9753-EB P1B10 Opt pam circuit
Text: 12-Bit, 300 MSPS High Speed TxDAC+ D/A Converter AD9753* APPLICATIONS Communications: LMDS, LMCS, MMDS Base Stations Digital Synthesis QAM and OFDM GENERAL DESCRIPTION The AD9753 is a dual, muxed port, ultrahigh speed, singlechannel, 12-bit CMOS DAC. It integrates a high quality 12-bit
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Original
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12-Bit,
AD9753*
AD9753
12-bit
12-bit
48-lead
C02251
AD9753AST
AD9753ASTRL
AD9753-EB
P1B10
Opt pam circuit
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PDF
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AD9763
Abstract: AD9763AST AD9763-EB AWG2021
Text: a FEATURES 10-Bit Dual Transmit DAC 125 MSPS Update Rate Excellent SFDR to Nyquist @ 5 mHz Output: 75 dBc Excellent Gain and Offset Matching: 0.1% Fully Independent or Single Resistor Gain Control Dual Port or Interleaved Data On-Chip 1.2 V Reference Single 5 V or 3 V Supply Operation
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Original
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10-Bit
48-Lead
AD9763
10-bit
C00617a
ST-48)
AD9763AST
AD9763-EB
AWG2021
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PDF
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48-PIN
Abstract: AD9709 AD9709AST AD9709-EB AWG2021
Text: a FEATURES 8-Bit Dual Transmit DAC 125 MSPS Update Rate Excellent SFDR to Nyquist @ 5 MHz Output = 66 dBc Excellent Gain and Offset Matching: 0.1% Fully Independent or Single Resistor Gain Control Dual Port or Interleaved Data On-Chip 1.2 V Reference Single 5 V or 3 V Supply Operation
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Original
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48-Lead
AD9709
AD9709
C3701
ST-48)
48-PIN
AD9709AST
AD9709-EB
AWG2021
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PDF
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agilent 8112a
Abstract: ad8369 AD6645 AD8369ARU AD8369ARU-REEL7 AD8369EVAL ETC1-1-13 hexadecimal to Binary
Text: 45 dB Digitally Controlled VGA LF to 600 MHz AD8369* FEATURES Digitally Controlled Variable Gain in 3 dB Steps –5 dB to +40 dB RL = 1 k⍀ –10 dB to +35 dB (RL = 200 ⍀) Less than 0.2 dB Flatness over a +20 MHz Bandwidth up to 380 MHz 4-Bit Parallel or 3-Wire Serial Interface
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Original
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AD8369*
AD8369
AD8369
16-Lead
RU-16)
C03029
MO-153AB
agilent 8112a
AD6645
AD8369ARU
AD8369ARU-REEL7
AD8369EVAL
ETC1-1-13
hexadecimal to Binary
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PDF
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SMA200UP
Abstract: AD9767-EBZ
Text: FEATURES FUNCTIONAL BLOCK DIAGRAM 10-/12-/14-bit dual transmit digital-to-analog converters DACs 125 MSPS update rate Excellent SFDR to Nyquist @ 5 MHz output: 75 dBc Excellent gain and offset matching: 0.1% Fully independent or single-resistor gain control
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Original
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10-/12-/14-Bit,
AD9763/AD9765/AD9767
10-/12-/14-bit
48-lead
AD9763/
AD9765/
AD9767
SMA200UP
AD9767-EBZ
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PDF
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BY200
Abstract: LTE filter 6235A adl5380 ADL5380ACPZ IP1dB TC1-1-13 E3X-SD11 AN-772 5 channel RF transmitter and Receiver circuit
Text: 400 MHz to 6 GHz Quadrature Demodulator ADL5380 FEATURES FUNCTIONAL BLOCK DIAGRAM ENBL ADJ ADL5380 IHI BIAS ILO LOIP RFIN V2I QUADRATURE PHASE SPLITTER RFIP LOIN QHI QLO 07585-001 Operating RF and LO frequency: 400 MHz to 6 GHz Input IP3 30 dBm @ 900 MHz 28 dBm @1900 MHz
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Original
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ADL5380
CP-24-3)
ADL5380ACPZ-R7
ADL5380ACPZ-WP1
ADL5380-29A-EVALZ1
ADL5380-30A-EVALZ1
24-Lead
CP-24-3
BY200
LTE filter
6235A
adl5380
ADL5380ACPZ
IP1dB
TC1-1-13
E3X-SD11
AN-772
5 channel RF transmitter and Receiver circuit
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PDF
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E4405B
Abstract: 8648c agilent signal generator jammer gsm 143FH jammer circuit TD-SCDMA 2010M MAX2306 MAX2308
Text: WIRELESS, RF, AND CABLE Mar 26, 2003 TD-SCDMA Reference Design V1.0 This application note presents Maxim's TD-SCDMA reference design V1.0. TDSCDMA is the Chinese Third Generation 3G standard. China's government has allocated 3 frequency bands: 1880~1920MHz, 2010~2025MHz, and 2300~2400MHz.
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Original
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1920MHz,
2025MHz,
2400MHz.
2025MHz
MAX2306,
MAX2308,
MAX2309
MAX2361,
MAX2363,
MAX2365
E4405B
8648c
agilent signal generator
jammer gsm
143FH
jammer circuit
TD-SCDMA
2010M
MAX2306
MAX2308
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PDF
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SMA200UP
Abstract: db3p1 INP32 ad8055 T1-1TCUP AD9763 AD9765 AD9767
Text: 10-/12-/14-Bit, 125 MSPS Dual TxDAC+ Digital-to-Analog Converters AD9763/AD9765/AD9767 FEATURES FUNCTIONAL BLOCK DIAGRAM 10-/12-/14-bit dual transmit digital-to-analog converters DACs 125 MSPS update rate Excellent SFDR to Nyquist @ 5 MHz output: 75 dBc
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Original
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10-/12-/14-Bit,
AD9763/AD9765/AD9767
10-/12-/14-bit
48-lead
AD9763/AD9765/AD9767
SMA200UP
db3p1
INP32
ad8055
T1-1TCUP
AD9763
AD9765
AD9767
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PDF
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Untitled
Abstract: No abstract text available
Text: 1000 MHz to 3100 MHz Rx Mixer with Integrated Fractional-N PLL and VCO ADRF6602 Data Sheet FEATURES The PLL can support input reference frequencies from 12 MHz to 160 MHz. The PFD output controls a charge pump whose output drives an off-chip loop filter. Rx mixer with integrated fractional-N PLL
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Original
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40-lead,
ADRF6602
40-Lead
CP-40-1)
ADRF6602ACPZ-R7
ADRF6602-EVALZ
CP-40-1
ADRF6602
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PDF
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Untitled
Abstract: No abstract text available
Text: 400 MHz to 6 GHz Quadrature Demodulator ADL5380 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM ENBL ADJ ADL5380 IHI BIAS ILO LOIP RFIN V2I QUADRATURE PHASE SPLITTER RFIP LOIN QHI QLO 07585-001 Operating RF and LO frequency: 400 MHz to 6 GHz Input IP3 30 dBm @ 900 MHz
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Original
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ADL5380
CP-24-3)
ADL5380ACPZ-R7
ADL5380ACPZ-WP
ADL5380-EVALZ
24-Lead
CP-24-3
CP-24-3
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PDF
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db3x
Abstract: AD9740 AD9740ACP AD9740ACPRL7 AD9740AR AD9740ARRL AD9740ARU AD9740ARURL7 AD9740-EB
Text: 10-Bit, 165 MSPS TxDAC D/A Converters AD9740* FEATURES High Performance Member of Pin Compatible TxDAC Product Family Excellent Spurious-Free Dynamic Range Performance SNR @ 5 MHz Output, 125 MSPS: 65 dB Twos Complement or Straight Binary Data Format Differential Current Outputs: 2 mA to 20 mA
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Original
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10-Bit,
AD9740*
28-Lead
32-Lead
AD9740
150pF
C02911
db3x
AD9740
AD9740ACP
AD9740ACPRL7
AD9740AR
AD9740ARRL
AD9740ARU
AD9740ARURL7
AD9740-EB
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PDF
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SLOA020
Abstract: FSEA30 THS4011 THS4021 SLOA017
Text: Amplifiers: Op Amps Texas Instruments Incorporated Using a decompensated op amp for improved performance By Jim Karki Systems Specialist, High-Speed Amplifiers Introduction Figure 1. Open-loop gain and phase—THS4011 and THS4021 If your application requires
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Original
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phase--THS4011
THS4021
THS4011
SLYT174
SLOA020
FSEA30
THS4021
SLOA017
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PDF
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AD8047
Abstract: AD9763 AWG2021
Text: 10-Bit, 125 MSPS Dual TxDAC+ Digital-to-Analog Converter AD9763 FUNCTIONAL BLOCK DIAGRAM 10-bit dual transmit DAC 125 MSPS update rate Excellent SFDR to Nyquist @ 5 MHz output: 75 dBc Excellent gain and offset matching: 0.1% Fully independent or single resistor gain control
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Original
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10-Bit,
AD9763
10-bit
48-lead
AD9763ASTRL
AD9763ASTZ
AD9763ASTZRL1
AD9763-EB
AD8047
AD9763
AWG2021
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PDF
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schematic hp dv7
Abstract: hp dv6 schematic hp dv6 hp dv5 schematic hp dv4 DB15 MALE TO DB9 FEMALE PAB1 schematic hp dv3 hp dv7 schematic pll ADRF6601
Text: 2100 MHz to 2600 MHz Rx Mixer with Integrated Fractional-N PLL and VCO ADRF6603 The PLL can support input reference frequencies from 12 MHz to 160 MHz. The PFD output controls a charge pump whose output drives an off-chip loop filter. FEATURES Rx mixer with integrated fractional-N PLL
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Original
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ADRF6603
40-lead,
40-Lead
CP-40-1)
ADRF6603ACPZ-R7
ADRF6603-EVALZ
CP-40-1
schematic hp dv7
hp dv6 schematic
hp dv6
hp dv5
schematic hp dv4
DB15 MALE TO DB9 FEMALE
PAB1
schematic hp dv3
hp dv7 schematic pll
ADRF6601
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PDF
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6235A
Abstract: ADL5382 HP87405 AN-772 ETC1-1-13 SMT03 8508A
Text: 700 MHz to 2.7 GHz Quadrature Demodulator ADL5382 FEATURES FUNCTIONAL BLOCK DIAGRAM CMRF CMRF RFIP RFIN CMRF VPX 23 24 22 21 20 19 VPA 1 ADL5382 18 VPB COM 2 BIAS GEN 17 VPB BIAS 3 16 QHI 0° 90° 15 QLO VPL 4 VPL 5 14 IHI VPL 6 13 ILO 7 CML 8 9 10 LOIP LOIN CML
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Original
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ADL5382
24-Lead
CP-24-2)
ADL5382ACPZ-R7
ADL5382ACPZ-WP1
ADL5382-EVALZ1
CP-24-2
6235A
ADL5382
HP87405
AN-772
ETC1-1-13
SMT03
8508A
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PDF
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DVB-t receiver schematic diagram
Abstract: MURATA GRM15 -V2 dvbt active antenna schematic smd L35 MMCX-S50 MOSFET C65 DVB-T Schematic 4MHz CRYSTAL NDK at41 SMD l35 Transistor C86 SOT323
Text: Published by Infineon Technologies AG 81726 München, Germany Infineon Technologies AG 2007. All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics “Beschaffenheitsgarantie” . With respect to any examples or hints given herein, any
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Original
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BB565
BB659C
BF5030W
BB689
TUA6039
DVB-t receiver schematic diagram
MURATA GRM15 -V2
dvbt active antenna schematic
smd L35
MMCX-S50
MOSFET C65
DVB-T Schematic
4MHz CRYSTAL NDK at41
SMD l35 Transistor
C86 SOT323
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PDF
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AD9744
Abstract: No abstract text available
Text: 14-Bit, 210 MSPS TxDAC D/A Converter AD9744 Data Sheet FEATURES APPLICATIONS High performance member of pin-compatible TxDAC product family Excellent spurious-free dynamic range performance SFDR to Nyquist 83 dBc at 5 MHz output 80 dBc at 10 MHz output 73 dBc at 20 MHz output
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Original
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14-Bit,
AD9744
28-lead
32-lead
28-Lead,
300-Mil
AD9744
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PDF
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A10007
Abstract: A6458
Text: 300 MHz to 2500 MHz Rx Mixer with Integrated Fractional-N PLL and VCO ADRF6601 Data Sheet FEATURES The PLL can support input reference frequencies from 12 MHz to 160 MHz. The PFD output controls a charge pump whose output drives an off-chip loop filter. Rx mixer with integrated fractional-N PLL
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Original
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ADRF6601
40-lead,
40-Lead
CP-40-1)
ADRF6601ACPZ-R7
ADRF6601-EVALZ
CP-40-1
A10007
A6458
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PDF
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cdma QPSK modulation Walsh pilot
Abstract: HP34970A Voltage to Current Converters HP8648C HP8593E AD8346 AD9761 ETC1-1-13 AD8346 ETC1-1-13 AFG2020
Text: 0.8 GHz to 2.5 GHz Quadrature Modulator AD8346 High accuracy 1 degree rms quadrature error @ 1.9 GHz 0.2 dB I/Q amplitude balance @ 1.9 GHz Broad frequency range: 0.8 GHz to 2.5 GHz Sideband suppression: −46 dBc @ 0.8 GHz Sideband suppression: −36 dBc @ 1.9 GHz
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Original
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AD8346
16-lead
AD8346ARU-REEL7
AD8346ARUZ-REEL
AD8346ARUZ-REEL71
AD8346-EVAL
16-Lead
cdma QPSK modulation Walsh pilot
HP34970A
Voltage to Current Converters
HP8648C
HP8593E
AD8346
AD9761
ETC1-1-13
AD8346 ETC1-1-13
AFG2020
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PDF
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A10007
Abstract: No abstract text available
Text: 750 MHz to 1160 MHz Rx Mixer with Integrated Fractional-N PLL and VCO ADRF6601 FEATURES The PLL can support input reference frequencies from 12 MHz to 160 MHz. The PFD output controls a charge pump whose output drives an off-chip loop filter. Rx mixer with integrated fractional-N PLL
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Original
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ADRF6601
40-lead,
40-Lead
CP-40-1)
ADRF6601ACPZ-R7
ADRF6601-EVALZ
CP-40-1
A10007
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PDF
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Untitled
Abstract: No abstract text available
Text: 12-Bit, 210 MSPS TxDAC D/A Converter AD9742 FEATURES APPLICATIONS High performance member of pin-compatible TxDAC product family Excellent spurious-free dynamic range performance SNR @ 5 MHz output, 125 MSPS: 70 dB Twos complement or straight binary data format
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Original
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12-Bit,
AD9742
28-lead
32-lead
00-Mil
300-Mil
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PDF
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Untitled
Abstract: No abstract text available
Text: ANALOG DEVICES FEATURES High Accuracy 1 Degree rms Quadrature Error @ 1.9 GHz 0.2 dB l/Q Am plitude Balance @ 1.9 GHz Broad Frequency Range: 0.8 G H z-2.5 GHz Sideband Suppression: -4 6 dBc @ 0.8 GHz Sideband Suppression: -3 6 dBc @ 1.9 GHz M odulation Bandwidth: D C-70 MHz
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OCR Scan
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16-Lead
AD8346
50kHz/
500kHz
RU-16)
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PDF
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LM 3842 Circuit diagram
Abstract: describe LM 3842 la 3842 modo woo sung transformer AD9772 AD9772AST AD9772EB DB10
Text: ANALOG ► D E V IC E S FEATURES Single 2.7 V to 3.6 V Supply 14-Bit DAC Resolution and Input Data W idth 150 MSPS Input Data Rate 63.3 MHz Reconstruction Passband @ 150 MSPS 75 dBc SFDR @ 25 MHz 2 x Interpolation Filter w ith High or Low Pass Response 73 dB Im age Rejection w ith 0.005 dB Passband Ripple
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OCR Scan
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14-Bit,
14-Bit
48-Lead
AD9772
digital-to-ana3000000000
ad9772
LM 3842 Circuit diagram
describe LM 3842
la 3842
modo
woo sung transformer
AD9772AST
AD9772EB
DB10
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PDF
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