FULL SUBTRACTOR using 41 MUX
Abstract: ALU of 4 bit adder and subtractor "Overflow detection"
Text: PDSP16318/16318A PDSP16318/PDSP16318A Advance Information Complex Accumulator Advance Information DS3708 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 20MHz
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PDSP16318/16318A
PDSP16318/PDSP16318A
DS3708
PDSP16318
20-bit
20MHz
PDSP16318As
PDSP16112A
PDSP16318A/B0/AC
FULL SUBTRACTOR using 41 MUX
ALU of 4 bit adder and subtractor
"Overflow detection"
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DS3708
Abstract: PDSP16112 PDSP16112A PDSP16318 FULL SUBTRACTOR using 41 MUX asi mux ALU of 4 bit adder and subtractor "Overflow detection" TTL ALU of 4 bit adder and subtractor CMOS Full Adder
Text: PDSP16318/16318A PDSP16318/PDSP16318A Advance Information Complex Accumulator Advance Information DS3708 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 20MHz
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PDSP16318/16318A
PDSP16318/PDSP16318A
DS3708
PDSP16318
20-bit
20MHz
PDSP16318As
PDSP16112A
PDSP16318A/B0/AC
20MHz
DS3708
PDSP16112
PDSP16112A
FULL SUBTRACTOR using 41 MUX
asi mux
ALU of 4 bit adder and subtractor
"Overflow detection"
TTL ALU of 4 bit adder and subtractor
CMOS Full Adder
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"Overflow detection"
Abstract: FULL SUBTRACTOR using 41 MUX
Text: PDSP16318 MC PDSP16318 MC Complex Accumulator DS3761 ISSUE 2.1 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 10MHz throughout in FFT and filter applications.
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PDSP16318
DS3761
20-bit
10MHz
PDSP16318s
PDSP16112A
100ns
GC100
"Overflow detection"
FULL SUBTRACTOR using 41 MUX
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PDF
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FULL SUBTRACTOR using 41 MUX
Abstract: "Overflow detection"
Text: PDSP16318 MC PDSP16318 MC Complex Accumulator DS3761 ISSUE 2.1 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 10MHz throughout in FFT and filter applications.
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PDSP16318
DS3761
20-bit
10MHz
PDSP16318s
PDSP16112A
100ns
GC100
FULL SUBTRACTOR using 41 MUX
"Overflow detection"
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PDF
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FULL SUBTRACTOR using 41 MUX
Abstract: PDSP16112 ALU of 4 bit adder and subtractor GC100 PDSP16112A PDSP16318 "Overflow detection"
Text: PDSP16318 MC PDSP16318 MC Complex Accumulator DS3761 ISSUE 2.1 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 10MHz throughout in FFT and filter applications.
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Original
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PDSP16318
DS3761
20-bit
10MHz
PDSP16318s
PDSP16112A
100ns
GC100
FULL SUBTRACTOR using 41 MUX
PDSP16112
ALU of 4 bit adder and subtractor
GC100
PDSP16112A
"Overflow detection"
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PDF
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FULL SUBTRACTOR using 41 MUX
Abstract: PDSP16112 GC100 PDSP16112A PDSP16318 "Overflow detection"
Text: PDSP16318 MC PDSP16318 MC Complex Accumulator Supersedes April 1993 version, DS3761 - 1.2 DS3761 - 2.1 November 1998 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 10MHz
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Original
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PDSP16318
DS3761
20-bit
10MHz
PDSP16318s
PDSP16112A
100ns
FULL SUBTRACTOR using 41 MUX
PDSP16112
GC100
PDSP16112A
"Overflow detection"
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PDF
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7000SC
Abstract: 17-FP
Text: Standard Products ACT 7000SC 64-Bit Superscaler Microprocessor June 16, 2004 FEATURES • ■ Full militarized QED RM7000 microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance
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7000SC
64-Bit
RM7000
RM52xx
SCD7000
17-FP
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PDF
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Untitled
Abstract: No abstract text available
Text: Standard Products ACT 7000ASC 64-Bit Superscaler Microprocessor January 24, 2005 FEATURES • ■ Full militarized PMC-Sierra RM7000A microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance
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7000ASC
64-Bit
RM7000A
RM52xx
SCD7000
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PDF
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ACT7000ASC
Abstract: No abstract text available
Text: ACT-7000ASC 64-Bit Superscaler Microprocessor Features • ■ Full militarized PMC-Sierra RM7000A microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance ● ● ■ ● ● ●
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ACT-7000ASC
64-Bit
RM7000A
RM52xx
SCD7000A
ACT7000ASC
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PDF
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7000SC
Abstract: Tag 225 600 replacement SCD7000 R5000 mips R4650 RM5261 RM7000 7000sc210f17 CQFP 240 Aeroflex
Text: Standard Products ACT 7000SC 64-Bit Superscaler Microprocessor www.aeroflex.com/Avionics October 9, 2009 FEATURES • ■ Full militarized QED RM7000 microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance
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7000SC
64-Bit
RM7000
256KB
SCD7000
7000SC
Tag 225 600 replacement
R5000 mips
R4650
RM5261
7000sc210f17
CQFP 240 Aeroflex
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PDF
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implementing ALU with adder/subtractor
Abstract: ACT5230 ACT-5230PC-133F22I R4000 R4700 R5000 register file RM5230
Text: ACT5230 32-Bit Superscaler Microprocessor Features • ■ Full militarized QED RM5230 microprocessor Dual Issue superscalar microprocessor - can issue one integer and one floating-point instruction per cycle ■ High-performance floating point unit ● Single
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ACT5230
32-Bit
RM5230
SPECInt95
SPECfp95
MIL-PRF-38534
133MHz
150MHz
200MHz
MIL-STD-883
implementing ALU with adder/subtractor
ACT5230
ACT-5230PC-133F22I
R4000
R4700
R5000
register file
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PDF
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CQFP 208
Abstract: rm5260
Text: Standard Products ACT 5260 64-Bit Superscaler Microprocessor www.aeroflex.com/Avionics January 28, 2004 FEATURES ❑ ❑ Full militarized PMC-Sierra RM5260 microprocessor Dual Issue superscalar PMC-Sierra RISCMark can issue one integer and one floating-point
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64-Bit
RM5260
150MHz
200MHz
SPECInt95
SPECfp95
SCD5260
CQFP 208
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PDF
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RM5260
Abstract: CQFP 208
Text: ACT5260 64-Bit Superscaler Microprocessor Features • ■ ■ ■ Full militarized QED RM5260 microprocessor Dual Issue superscalar QED RISCMark - can issue one integer and one floating-point instruction per cycle microprocessor - can issue one integer and one
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ACT5260
64-Bit
RM5260
150MHz
200MHz
SPECInt95
SPECfp95
R4600,
R4700
R5000
CQFP 208
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PDF
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CQFP 208 datasheet
Abstract: ACT5260 R4000 R4700 R5000
Text: ACT5260 64-Bit Superscaler Microprocessor Features • ■ ■ ■ Full militarized QED RM5260 microprocessor Dual Issue superscalar QED RISCMark - can issue one integer and one floating-point instruction per cycle microprocessor - can issue one integer and one
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ACT5260
64-Bit
RM5260
150MHz
200MHz
SPECInt95
SPECfp95
R4600,
R4700
R5000
CQFP 208 datasheet
ACT5260
R4000
R5000
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PDF
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9304 "pin compatible"
Abstract: 9304 S2845 4 bit binary full adder and subtractor Adder 9304 Dual 1-Bit with Carry ScansUX980 a9304 9304 fairchild
Text: 9304 MSI DUAL FULL ADDER A FAIRCHILD COMPATIBLE CURRENT SINKING LOGIC PRODUCT GENERAL DESCRIPTION — The 9304 consists of two independent, high speed, binary full adders. The adders are useful in a wide variety of applications including multiple bit parallel
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PDF
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AD395JD
Abstract: IC 74LS244 LATCH APPLICATIONS AD395
Text: ANALOG DEVICES □ FEATURES Four Com plete 12-Bit CMOS DACs w ith Buffer Registers Linearity Error ±1/2LSB Tmin-Tmax AD394, AD395K,T Factory-Trimmed Gain and Offset Precision O utput Amplifiers for V 0 u t Full Four Quadrant M ultiplication per DAC M onotonicity Guaranteed Over Full Temperature
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OCR Scan
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12-Bit
AD394/AD395
AD395
AD394
AD394,
AD395K
MIL-STD-883
AD394
AD395JD
IC 74LS244 LATCH APPLICATIONS
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PDF
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AD396TD
Abstract: AD396
Text: ANALOG DEVICES □ FE A T U R ES Four, Pre-Trimmed, 14-Bit C M O S D A C s Double Buffered for Sim ultaneous Update Precision Output Amplifiers for Voltage Out Full Four Quadrant Multiplication - Independently Pinned Out D A C Reference Monotonicity Guaranteed Over Full M IL Temp. Range
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OCR Scan
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14-Bit
AD396
AD396
14bit,
AD396TD
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PDF
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AD3958
Abstract: 74ls139 decoder Analog Devices Catalog DAC
Text: ANALOG DEVICES □ FEATURES Four Com plete 12-Bit CMOS DACs w ith Buffer Registers Linearity Error ± 1/2LSB Tmin-Tmax AD394, AD395K,T Factory-Trimmed Gain and Offset Precision O utput Amplifiers for V 0 u t Full Four Q uadrant Multiplication per DAC M onotonicity Guaranteed Over Full Tem perature
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OCR Scan
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12-Bit
AD394/AD395
AD39S
AD394
AD394,
AD395K
MIL-STD-883
AD394
AD395
AD3958
74ls139 decoder
Analog Devices Catalog DAC
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PDF
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Untitled
Abstract: No abstract text available
Text: M MOTOROLA Military 10687 High Speed 2 x 1 Bit Array Multiplier Block ELECTRICALLY TESTED PER: MPG 10687 The 10687 is a dual high speed interactive multiplier. It is designed for use as an array multiplier block. Each device is a modified full adder/subtractor that
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PDF
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C1-D18
Abstract: CQFP 208
Text: I Features I I I I I ACT5260 64-Bit Superscaler Microprocessor . • High-perform ance floating point unit ■ Full militarized QED RM5260 microprocessor ■ Dual Issue superscalar QED RISCMark
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OCR Scan
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ACT5260
64-Bit
RM5260
150MHz
SCD5260
C1-D18
CQFP 208
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PDF
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Untitled
Abstract: No abstract text available
Text: W tflGEC PLESSEY P R E L IM IN A R Y IN F O R M A T IO N DS3708 - 2.0 PDSP16318/PDSP16318A COMPLEX ACCUMULATOR The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 20MHz
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OCR Scan
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DS3708
PDSP16318/PDSP16318A
PDSP16318
20-bit
20MHz
PDSP16318As
PDSP16112A
256ps.
PDSP16318/13618A
PDSP16318/C0/AC
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PDF
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ALU of 4 bit adder and subtractor
Abstract: diode GG 66 "Overflow detection"
Text: PDSP16318 M C MITEL Complex Accumulator SE M IC O N D U C T O R Supersedes April 1993 version, DS3761 - 1.2 DS3761 - 2.1 November 1998 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 10MHz
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OCR Scan
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DS3761
PDSP16318
20-bit
10MHz
PDSP16318s
PDSP16112A
100ns
512jas.
ALU of 4 bit adder and subtractor
diode GG 66
"Overflow detection"
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PDF
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Untitled
Abstract: No abstract text available
Text: M IT E L PDSP16318 MC SE M IC O N D U C T O R Complex Accumulator DS3761 - 2.1 Supersedes April 1993 version, DS3761 - 1.2 Novem ber 1998 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 10MHz
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OCR Scan
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PDSP16318
DS3761
20-bit
10MHz
PDSP16318s
PDSP16112A
100ns
512ns.
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PDF
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AD396
Abstract: sine multiplier AD396JD synchro to digital converter csi
Text: ► ANALOG DEVICES |iP Compatible Multiplying Quad 14-Bit D/A Converter AD396 FEATURES Four, Pre-Trimmed, 14-Bit CMOS DACs Double Buffered for Simultaneous Update Precision Output Amplifiers for Voltage Out Full Four Quadrant Multiplication - Independently
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OCR Scan
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14-Bit
780mW
MIL-STD-883
AD396
14-bit,
28-pin
AD396
sine multiplier
AD396JD
synchro to digital converter csi
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PDF
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