74LVC1G99
Abstract: 74LVC1G99DP 74LVC1G99GM 74LVC1G99GT JESD22-A114E sot505
Text: 74LVC1G99 Ultra-configurable multiple function gate; 3-state Rev. 02 — 8 February 2008 Product data sheet 1. General description The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with 3-state output. The device can be configured as one of several logic functions including,
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74LVC1G99
74LVC1G99
74LVC1G99DP
74LVC1G99GM
74LVC1G99GT
JESD22-A114E
sot505
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74LVC1G97GW
Abstract: V97 marking
Text: 74LVC1G97 Low-power configurable multiple function gate Rev. 2 — 9 March 2011 Product data sheet 1. General description The 74LVC1G97 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND,
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74LVC1G97
74LVC1G97
74LVC1G97GW
V97 marking
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Untitled
Abstract: No abstract text available
Text: 74LVC1G99 Ultra-configurable multiple function gate; 3-state Rev. 7 — 22 June 2012 Product data sheet 1. General description The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with 3-state output. The device can be configured as one of several logic functions including,
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74LVC1G99
74LVC1G99
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74lvc1g97
Abstract: No abstract text available
Text: 74LVC1G97 Low-power configurable multiple function gate Rev. 3 — 7 December 2011 Product data sheet 1. General description The 74LVC1G97 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND,
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74LVC1G97
74LVC1G97
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Untitled
Abstract: No abstract text available
Text: 74LVC1G99 Ultra-configurable multiple function gate; 3-state Rev. 6 — 1 December 2011 Product data sheet 1. General description The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with 3-state output. The device can be configured as one of several logic functions including,
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74LVC1G99
74LVC1G99
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Untitled
Abstract: No abstract text available
Text: 74LVC1G98 Low-power configurable multiple function gate Rev. 2 — 1 December 2011 Product data sheet 1. General description The 74LVC1G98 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND,
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74LVC1G98
74LVC1G98
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74LVC1G99
Abstract: 74LVC1G99DP 74LVC1G99GM 74LVC1G99GT JESD22-A114E
Text: 74LVC1G99 Ultra-configurable multiple function gate; 3-state Rev. 01 — 3 January 2008 Product data sheet 1. General description The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with 3-state output. The device can be configured as one of several logic functions including,
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74LVC1G99
74LVC1G99
74LVC1G99DP
74LVC1G99GM
74LVC1G99GT
JESD22-A114E
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Untitled
Abstract: No abstract text available
Text: 74AXP1G98 Low-power configurable multiple function gate Rev. 1 — 25 June 2013 Preliminary data sheet 1. General description The 74AXP1G98 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND,
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74AXP1G98
74AXP1G98
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74LVC1G99
Abstract: 74LVC1G99DP 74LVC1G99GM 74LVC1G99GT
Text: 74LVC1G99 Ultra-configurable multiple function gate; 3-state Rev. 04 — 16 April 2010 Product data sheet 1. General description The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with 3-state output. The device can be configured as one of several logic functions including,
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74LVC1G99
74LVC1G99
74LVC1G99DP
74LVC1G99GM
74LVC1G99GT
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Untitled
Abstract: No abstract text available
Text: 74LVC1G97 Low-power configurable multiple function gate Rev. 3 — 7 December 2011 Product data sheet 1. General description The 74LVC1G97 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND,
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74LVC1G97
74LVC1G97
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74LVC1G98GW
Abstract: 74LVC1G
Text: 74LVC1G98 Low-power configurable multiple function gate Rev. 1 — 21 December 2010 Product data sheet 1. General description The 74LVC1G98 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND,
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74LVC1G98
74LVC1G98
74LVC1G98GW
74LVC1G
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Untitled
Abstract: No abstract text available
Text: 74LVC1G98 Low-power configurable multiple function gate Rev. 3 — 10 September 2014 Product data sheet 1. General description The 74LVC1G98 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND,
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74LVC1G98
74LVC1G98
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Untitled
Abstract: No abstract text available
Text: 74LVC1G97 Low-power configurable multiple function gate Rev. 4 — 10 September 2014 Product data sheet 1. General description The 74LVC1G97 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND,
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74LVC1G97
74LVC1G97
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Untitled
Abstract: No abstract text available
Text: 74LVC1G99 Ultra-configurable multiple function gate; 3-state Rev. 7 — 22 June 2012 Product data sheet 1. General description The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with 3-state output. The device can be configured as one of several logic functions including,
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74LVC1G99
74LVC1G99
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001A
Abstract: No abstract text available
Text: 74LVC1G99 Ultra-configurable multiple function gate; 3-state Rev. 8 — 5 April 2013 Product data sheet 1. General description The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with 3-state output. The device can be configured as one of several logic functions including,
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74LVC1G99
74LVC1G99
001A
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Untitled
Abstract: No abstract text available
Text: 74AXP1G97 Low-power configurable multiple function gate Rev. 1 — 25 June 2013 Preliminary data sheet 1. General description The 74AXP1G97 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND,
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74AXP1G97
74AXP1G97
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Untitled
Abstract: No abstract text available
Text: 74AXP1G57 Low-power configurable multiple function gate Rev. 1 — 25 June 2013 Preliminary data sheet 1. General description The 74AXP1G57 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR,
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74AXP1G57
74AXP1G57
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74LVC1G99
Abstract: 74LVC1G99DP 74LVC1G99GM 74LVC1G99GT
Text: 74LVC1G99 Ultra-configurable multiple function gate; 3-state Rev. 03 — 3 December 2009 Product data sheet 1. General description The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with 3-state output. The device can be configured as one of several logic functions including,
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74LVC1G99
74LVC1G99
74LVC1G99DP
74LVC1G99GM
74LVC1G99GT
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diode marking code YF
Abstract: 74LVC1G99 74LVC1G99DP 74LVC1G99GM 74LVC1G99GT
Text: 74LVC1G99 Ultra-configurable multiple function gate; 3-state Rev. 5 — 21 October 2010 Product data sheet 1. General description The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with 3-state output. The device can be configured as one of several logic functions including,
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74LVC1G99
74LVC1G99
diode marking code YF
74LVC1G99DP
74LVC1G99GM
74LVC1G99GT
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Untitled
Abstract: No abstract text available
Text: 74AXP1G58 Low-power configurable multiple function gate Rev. 2 — 24 July 2014 Product data sheet 1. General description The 74AXP1G58 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR,
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74AXP1G58
74AXP1G58
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Digital Delay Lines
Abstract: No abstract text available
Text: Active Delay Lines Testing DEFINITION & TEST “Actives" are ‘Digital Delay Lines which incorporate a delay line and an integrated circuit. The use of logic gates, packaged with passive delay lines, allows the use of digital or logic signals As a consequence of function, the descriptions such as ‘'Digital
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Digital Delay Lines
Abstract: No abstract text available
Text: Active Delay Lines Testing DEFINITION & TEST "Actives” are “ Digital Delay Lines” which incorporate a delay line and an integrated circuit The use of logic gates, packaged with passive delay lines, allows the use of digital or logic signals. As a consequence of function, the descriptions such a s ' ‘ Digital
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GAL programmer schematic
Abstract: P/N146071
Text: pASIC 1 FAMILY ViaLink Technology Very-High-Speed CMOS FPGAs FAMILY HIGHLIGHTS Q Very High Speed - ViaLink metal-to-metal, programmable-via anti fuse technology ensures useful internal logic function speeds at over 100 MHz, and logic cell delays of under 2 ns.
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16-bit
14-input
GAL programmer schematic
P/N146071
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54S151
Abstract: No abstract text available
Text: Signetics 54S151 Multiplexer 8-input Multiplexer Product Specification Military Logic Products FEATURES provided. The Enable input E is active Low. When E is High, the 7 output is High and the Y output is Low, regardless of all other inputs. The logic function provide at
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54S151
16-Pin
20-Pin
54S151/BEA
54S151/BFA
500ns
1N3064,
54S151
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