MM74C30N
Abstract: MM54C30J MM74C30 MM54C30 MM74C30J AN-90 C1995 J14A
Text: MM54C30 MM74C30 8-Input NAND Gate General Description Features The logical gate employs complementary MOS CMOS to achieve wide power supply operating range low power consumption and high noise immunity Function and pin out compatibility with series 54 74 devices minimizes design
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MM54C30
MM74C30
MM74C30N
MM54C30J
MM74C30J
AN-90
C1995
J14A
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XC6200
Abstract: XC009 PN16 XC6209 XC6216 XC6264 C031 vhdl code up down counter
Text: XC6200 Field Programmable Gate Arrays Table Of Contents Features Description Architecture Logical and Physical Organization Additional Routing Resources Magic Wires Global Wires Function Unit Cell Logic Functions Routing Switches Clock Distribution Clear Distribution
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XC6200
XC6200
XC6216
-2PC84C
-40oC
100oC
-55oC
125oC
84-Pin
HT144
XC009
PN16
XC6209
XC6264
C031
vhdl code up down counter
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XC6200
Abstract: p61 s43 XC6264 w1p77 w56 transistor BUF C038 N48 pqfp Package Typ P194 B1 121 W97 diode ak38
Text: XC6200 Field Programmable Gate Arrays Table Of Contents Features Description Architecture Logical and Physical Organization Additional Routing Resources Magic Wires Global Wires Function Unit Cell Logic Functions Routing Switches Clock Distribution Clear Distribution
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XC6200
XC6200
XC6216
-2PC84C
84-Pin
HT144
144-Pin
BG225
225-Pin
HQ240
p61 s43
XC6264
w1p77
w56 transistor
BUF C038
N48 pqfp Package
Typ P194
B1 121 W97
diode ak38
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MM54C30J
Abstract: No abstract text available
Text: MICROCIRCUIT DATA SHEET Original Creation Date: 10/19/95 Last Update Date: 05/19/97 Last Major Revision Date: 04/02/97 MNMM54C30-X REV 1A0 8-INPUT NAND GATE General Description The logical gate employs complementary MOS CMOS to achieve wide power supply operating
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MNMM54C30-X
MM54C30
MM54C30J/883
MM54C30W/883
MIL-STD-883,
MM54C30J
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C1995
Abstract: DM74ALS DM74ALS09 DM74ALS09M DM74ALS09N M14A N14A
Text: DM74ALS09 Quad 2-Input AND Gate with Open Collector Outputs General Description Features This device contains four independent gates each of which performs the logic AND function The open-collector outputs require external pull-up resistors for proper logical operation
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DM74ALS09
C1995
DM74ALS
DM74ALS09M
DM74ALS09N
M14A
N14A
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DM74ALS09
Abstract: DM74ALS09M DM74ALS09N M14A MS-001 N14A
Text: Revised February 2000 DM74ALS09 Quad 2-Input AND Gate with Open Collector Outputs General Description Features This device contains four independent gates, each of which performs the logic AND function. The open-collector outputs require external pull-up resistors for proper logical
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DM74ALS09
DM74ALS09
DM74ALS09M
DM74ALS09N
M14A
MS-001
N14A
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C1995
Abstract: DM74ALS DM74ALS03B DM74ALS03BM DM74ALS03BN M14A N14A
Text: DM74ALS03B Quad 2-Input NAND Gate with Open Collector Outputs General Description Features This device contains four independent gates each of which performs the logic NAND function The open-collector outputs require external pull-up resistors for proper logical operation
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DM74ALS03B
C1995
DM74ALS
DM74ALS03BM
DM74ALS03BN
M14A
N14A
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DM74ALS03B
Abstract: DM74ALS03BM DM74ALS03BN M14A MS-001 N14A
Text: Revised February 2000 DM74ALS03B Quad 2-Input NAND Gate with Open Collector Outputs General Description Features This device contains four independent gates, each of which performs the logic NAND function. The open-collector outputs require external pull-up resistors for proper logical
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DM74ALS03B
DM74ALS03B
DM74ALS03BM
DM74ALS03BN
M14A
MS-001
N14A
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TC534200F
Abstract: UTC A11 TC534200P
Text: TOSHIBA TC534200P/F SILICON STACKED GATE CMOS 262,144 WORD x 16 BIT/524,288 WORD x 8 BIT CMOS MASK ROM Description The TC534200P/F is a 4,194,304 bit read only memory organized as 262,144 words by 16 bits when BYTE is logical high and organized as 524,288 words by 8 bits when BY I t is logical low.
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TC534200P/F
BIT/524
TC534200P/F
600mil
40-pin
525mil
TC534200P
TC534200F
UTC A11
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74c SERIES cmos logic data
Abstract: mm54c30 MM74C30 AN-90 cmos 74C
Text: MM54C30/MM74C30 Wm National Semiconductor MM54C30/MM74C30 8-Input NAND Gate General Description Features The logical gate employs complementary MOS CMOS to achieve wide power supply operating range, low power con sumption and high noise immunity. Function and pin out
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MM54C30/MM74C30
54C/74C
AN-90.
TL/F/5880-3
TL/F/5880-4
74c SERIES cmos logic data
mm54c30
MM74C30
AN-90
cmos 74C
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TC5316200bP
Abstract: TC5316200BP/BF
Text: TOSHIBA TC5316200BP/BF SILICON STACKED GATE CMOS 1,048,576 WORD x 16 BIT/2,097,152 WORD x 8 BIT CMOS MASK ROM D escription The TC5316200BP/BF is a 16,777,216 bit read only memory organized as 1,048,576 words by 16 bits when BY I t is logical high, and organized as 2,097,152 words by 8 bits when BYTE is logical low.
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TC5316200BP/BF
TC5316200BP/BF
600mil
42-pin
44-pin
TC5316200BP
TC5316200BF
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TC5316210
Abstract: Tc5316210cf
Text: TC5316210CP/CF TOSHIBA TOSHIBA MOS INTEGRATED CIRCUIT SILICON GATE CMOS 16 MBIT 1 M WORD BY 16 BITS/2 M WORD BY 8 BITS CMOS MASK ROM DESCRIPTION The TC5316210CP/CF is a 16,777,216-bit Read Only Memory organized as 1,048,576 words by 16 bits when BYTE is logical high, and as 2,097,152 words by 8 bits when BYTE is logical low.
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TC5316210CP/CF
TC5316210CP/CF
216-bit
42-pin
44-pin
765TYP
TC5316210
Tc5316210cf
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Untitled
Abstract: No abstract text available
Text: TC5332410BF/BFT TOSHIBA TOSHIBA MOS INTEGRATED CIRCUIT 32 MBIT 1 M WORD BY 32 BITS/2 SILICON GATE CMOS WORD BY 16 BITS CMOS MASK ROM DESCRIPTION The TC5332410BF/BFT is a 33,554,432-bit Read Only Memory organized as 1,048,576 words by 32 bits when DW/W is logical high, and as 2,097,152 words by 16 bits when DW/W is logical low.
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TC5332410BF/BFT
TC5332410BF/BFT
432-bit
70-pin
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TC534200CF
Abstract: No abstract text available
Text: TOSHIBA TC534200CP/CF/CFT TOSHIBA MOS INTEGRATED CIRCUIT SILICON GATE CMOS 4 MBIT 256 K WORD BY 16 BITS/512 K WORD BY 8 BITS CMOS MASK ROM DESCRIPTION The TC534200CP/CF is a 4,194,304-bit Read Only Memory organized as 262,144 words by 16 bits when BYTE is logical high, and as 524,288 words by 8 bits when BYTE is logical low.
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TC534200CP/CF/CFT
BITS/512
TC534200CP/TC534200CF
304-bit
TC534200CP/CF
40-pin
44-pin
TC534200CF
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A10AL
Abstract: TC538200AFT
Text: TO SH IB A TC538200AP/AF/AFT TOSHIBA MOS INTEGRATED CIRCUIT SILICON GATE CMOS 8 MBIT 512 K WORD BY 16 BITS/1 M WORD BY 8 BITS CMOS MASK ROM DESCRIPTION The TC538200AP/AF is a 8,388,608-bit Read Only Memory organized as 524,288 words by 16 bits when BYTE is logical high, and as 1,048,576 words by 8 bits when BYTE is logical low.
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TC538200AP/AF/AFT
TC538200AP/AF
608-bit
42-pin
44-pin
OP44--
A10AL
TC538200AFT
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TC5316200CP
Abstract: TC5316200CF
Text: T O S H IB A TC5316200CP/CF/CFT TOSHIBA MOS INTEGRATED CIRCUIT SILICON GATE CMOS 16 MBIT 1 M WORD BY 16 BITS/2 M WORD BY 8 BITS CMOS MASK ROM DESCRIPTION The TC5316200CP/CF/CFT is a 16,777,216-bit Read Only Memory organized as 1,048,576 words by 16 bits when BYTE is logical high, and as 2,097,152 words by 8 bits when BYTE is logical low.
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TC5316200CP/CF/CFT
TC5316200CP/CF/CFT
216-bit
42-pin
44-pin
TC5316200CP
TC5316200CF
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Integrated CMOS Systems
Abstract: 4 bit ALU USING VLSI ICS10000 ICS10045 ICS10080 ICS10130 ICS10220G ICSI0250 gpR circuit design
Text: H H Integrated S b S CMOS • ■ Systems ICS10000 Series Gate Arrays Features • Silicon gate 1.5 um drawn advanced CMOS technology with 2 levels of interconnection • High speed: 0.52 ns for a 2 input NAND with fanout=2 logical loads at 25 °C and Vdd=5V
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ICS10000
Integrated CMOS Systems
4 bit ALU USING VLSI
ICS10045
ICS10080
ICS10130
ICS10220G
ICSI0250
gpR circuit design
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Untitled
Abstract: No abstract text available
Text: TO SHIBA TC5332410BF/BFT TOSHIBA MOS INTEGRATED CIRCUIT SILICON GATE CMOS 32 MBIT 1 M W O RD BY 32 BITS/2 M W O RD BY 16 BITS CMOS MASK ROM DESCRIPTION The TC5332410BF/BFT is a 33,554,432-bit Read Only Memory organized as 1,048,576 words by 32 bits when DW/W is logical high, and as 2,097,152 words by 16 bits when DW/W is logical low.
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TC5332410BF/BFT
TC5332410BF/BFT
432-bit
70-pin
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TC5316200CP
Abstract: tc5316200
Text: TOSHIBA TC5316200CP/CF/CFT PRELIMINARY SILICON STACKED GATE CMOS 1,048,576 WORD x 16 BIT/2,097,152 WORD x 8 BIT CMOS MASK ROM Description The TC5316200CP/CF/CFT is a 16,777,216 bit read only memory organized as 1,048,576 w ords by 16 bits when BY I t is logical high, or as 2,097,152 w ords by 8 bits when BYTE is logical low.
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TC5316200CP/CF/CFT
TC5316200CP/CF/CFT
600mil
42-pin
44-pin
400mil
TC5316200CP
tc5316200
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Untitled
Abstract: No abstract text available
Text: C J MTTL I MC500/400 series "OR" e x p a n d a b le \ DUAL «-INPUT "AND" GATE I MC527 • MC577 MC427 • MC477 This device consists of two 4-input logical AND gates. Each gate has a single point connected externally which enables a single wire OR expansion using the
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MC500/400
MC527
MC577
MC427
MC477
MC528
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Untitled
Abstract: No abstract text available
Text: December 1989 DM74ALS09 Quad 2-Input AND Gate with Open Collector Outputs General Description Features This device contains four independent gates, each of which performs the logic AND function. The open-collector out puts require external pull-up resistors for proper logical op
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DM74ALS09
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Untitled
Abstract: No abstract text available
Text: National Semiconductor DM74ALS09 Quad 2-Input AND Gate with Open Collector Outputs General Description Features This device contains four independent gates, each of which performs the logic AND function. The open-collector out puts require external pull-up resistors for proper logical op
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DM74ALS09
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Untitled
Abstract: No abstract text available
Text: National Semiconductor DM74ALS09 Quad 2-Input AND Gate with Open Collector Outputs General Description Features This device contains four independent gates, each of which performs the logic AND function. The open-collector out puts require external pull-up resistors for proper logical op
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DM74ALS09
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Untitled
Abstract: No abstract text available
Text: AVG Semiconductors DDi Technical Data Triple 3-Input NAND Gate with Open Collector Ouputs N Suffix Plastic DIP AVG-001 Case This device contains three independent gates, each of which performs the logic AND function. The open-collector outputs require external pull-up resistors for proper logical operation.
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AVG-001
DV74LS15
DV74ALS15A
AVG-002
ALS15A
DV74LS15,
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