GE 739 Search Results

100W halogen bulb

Abstract: IEC 60061 IEC 60357 AR111 100-W 12V100W
Contextual Info: g GE Lighting DOC.TYPE: Date: SUBJECT: 03.04.28. FILE ID.: Halogen Reflector Lamp AR111 ALU REFLECTOR 12V 100W SPECIFICATION DATA SHEET GENERAL INFORMATION CODE: TECHNICAL DATA VOLTAGE WATTAGE TEST VOLTAGE BASE: REFLECTOR: BULB FINISH OPERATING POSITION G53

iec 60357

Abstract: AR111 IEC 60061
Contextual Info: g GE Lighting DOC.TYPE: Date: SUBJECT: 03.04.28. FILE ID.: Halogen Reflector Lamp AR111 ALU REFLECTOR 12V 75W SPECIFICATION DATA SHEET GENERAL INFORMATION CODE: TECHNICAL DATA VOLTAGE WATTAGE TEST VOLTAGE BASE: REFLECTOR: BULB FINISH OPERATING POSITION G53

e420 dual jfet

Abstract: AC digital voltmeter using 7107 MPS5010 bf320 JFET BF245 bf246 j201 2n3819 mc6821 ICL7117 VOLTMETER cookbook for ic 555 hall marking code A04 e304 fet
Contextual Info: Component Data Catalog 1987 INTERSIL, INC., 10600 RIDGEVIEW COURT, CUPERTINO, CA 95014 Printed in U.S.A. Copyright 1987, Intersil, Inc., All Rights Reserved ^ GE and 408 996-5000 TWX: 910-338-2014 are registered trademarks of General Electric Company, U.S.A.

M32 250C fuse

Abstract: electronic transformer halogen 12v 50W 220V LED Bulb circuit diagram t8 36w electronic ballast vossloh specification for 11W G23 Pin CFL bulb xenon arc lamp ignitor metal halide electronic ballast circuit 150 ELECTRONIC BALLAST DIAGRAM 400W 1W HIGH BRIGHT LED 230V CIRCUITS ELECTRONIC BALLAST DIAGRAM 28w
Contextual Info: Contents GE Lighting Incandescent Reflector Heat Lamps 3 Halogen Precise MR11, Precise™ ConstantColor™ MR16, Precise™ Bright MR16, Precise™ Alutech™ MR16, TAL 50, UV-Control CeriTite™, DEQ, Halogen IR™ DEQ, Haloglobe & BTT, Halo T, PAR 30

GEK-39196B

Abstract: GEP-9013B GET-3039G 9F60BHH905 ge motor capacitor cross reference 9F62FDD200 9F62DDD100 9F60LJD509 9F60FJD030 9F62FDD150
Contextual Info: GE Power Fuses Product Catalog Current-limiting Power Fuses Fuse Supports Fuse Disconnect Switches Spare Parts GEP-9013B 12/97 Supersedes GEP-9013A 1/96 GEP-9013 3/92 GEP-9014 3/92 Table of Contents Terms and Conditions Fuses - Power Distribution Indoor/Outdoor 2.75kV - 38.0 kV

GE H21A1

Abstract: h21a io 49
Contextual Info: G E SOLID STATE □1 DE I 3 0 7 5 0 0 1 0011760 Optoelectronic Specifications T-Ml-73 1mm Aperture Photon Coupled Interrupter Module H21A1,H21A2,H21A3 The GE Solid State H21A Interrupter Module is a gallium arse­ nide infrared emitting diode coupled to a silicon phototransistor in

54SX32

Abstract: 54SX32A SX FPGAs A54SX32 A54SX32A A54SX72A PAR64 REQ64
Contextual Info: Preliminary v1.0 HiRel SX-A Family FPGAs Le a di n g E d ge P er f o r m a n ce • QML Certified Devices • 215 MHz System Performance Military Temperature • 100% Military Temperature Tested (–55°C and +125°C) • 5.3ns Clock-to-Out (Pin-to-Pin) (Military Temperature)

A54SX72

Abstract: actel cqfp 84
Contextual Info: Advanced v1.1 HiRel SX-A Family FPGAs Le a di n g E d ge P er f o r m a n ce • Cold-Sparing Capability • 215 MHz System Performance Military Temperature • Slow Slew Rate Option • 5.3 ns Clock-to-Out (Pin-to-Pin) (Military Temperature) • QML Certified Devices

54SX32

Abstract: A54SX32 A54SX32A A54SX72A PAR64 REQ64 54SX32A il 074
Contextual Info: Preliminary v1.0 HiRel SX-A Family FPGAs Le a di n g E d ge P er f o r m a n ce • QML Certified Devices • 215 MHz System Performance Military Temperature • 100% Military Temperature Tested (–55°C and +125°C) • 5.3ns Clock-to-Out (Pin-to-Pin) (Military Temperature)

P8049

Abstract: TMP8243P TMP8039P LEMO TMP8039 TMP8039PI-6 TMP8049PI-6 TMP8049 TMP8049P ic tlp 759
Contextual Info: _ _ _ _ _ _ INTEGRATED CIRCUIT TOSHIBA TMP8049PI-6, TMP8039PI-6 TECHNICAL DATA 8-BIT SINGLE-CHIP MICROCOMPUTER GE N E R A L D E S C R I P T I O N The T M P 8 049PI-6, from here on referred to as the TMP8049, is a single chip microcomputer fabricated in N -channel

EX256-TQ100

Contextual Info: v2.0.1 eX Family FPGAs Le a di n g E d ge P er f o r m a n ce • Configurable Weak-Resistor Pull-up or Pull-down for Tristated Outputs at Power Up • 240 MHz System Performance • 3.9 ns Clock-to-Out Pad-to-Pad • 3,000 to 12,000 Available System Gates

Contextual Info: P relim inary S peon iijiijo w e / ic r M A # ^ n T e LSI^ S o me of cont ent s ar e subj ect to c ha n ge wi t hout noti ce. |y | y 4 ^ ^ W j / _ HYPER PAGE MODE 16777216-BIT 2097152-BIT BY 64-BIT DYNAMIC RAM P I CONFEURATEN DESCRIPTION

Contextual Info: F-204 TWIN-AX ED GE CARD I S P E C IF IC A T IO N S For complete specifications see www.samtec.com?EEDP • 30 AWG ribbon twin-ax cable Mates with: MEC8-02-RA, HSEC8 • Minimum bend radii 11,11mm 7/16" WIRE LENGTH NO. OF PAIRS EEDP e R IE S CDP -008, - 016,

antifuse programming technology

Abstract: EX256-TQ100
Contextual Info: Advanced v0.3 eX Family FPGAs Le a di n g E d ge P er f o r m a n ce • Configurable Weak-Resistor Pull-up or Pull-down for Tristated Outputs at Power Up • 240 MHz System Performance • 4.2 ns Clock-to-Out Pad-to-Pad • 3,000 to 12,000 Available System Gates

A54SX72

Contextual Info: Advanced v.1 HiRel SX-A Family FPGAs Le a di n g E d ge P er f o r m a n ce • 100% Military Temperature Tested –55°C to +125°C • 215 MHz System Performance (Military Temperature) • 66 MHz PCI Compliant • 5.3 ns Clock-to-Out (Pin-to-Pin) (Military Temperature)

EX256-TQ100

Contextual Info: Advanced v0.3 eX Family FPGAs Le a di n g E d ge P er f o r m a n ce • Configurable Weak-Resistor Pull-up or Pull-down for Tristated Outputs at Power Up • 240 MHz System Performance • 4.2 ns Clock-to-Out Pad-to-Pad • 3,000 to 12,000 Available System Gates

Theta JC of FBGA

Abstract: cpga dimensions cpga weight 84 pin plcc ic base
Contextual Info: v3.0 Package Characteristics and Mechanical Drawings Pa c ka ge T he r m a l C ha r a ct e r i s t i c s Package Type Ceramic Pin Grid Array CPGA Ceramic Quad Flat Pack (CQFP) – cavity up – cavity up w/ heat sink Plastic Leaded Chip Carrier (PLCC) Plastic Quad Flat Pack (PQFP)

dg503

Abstract: sd5002 siliconix DG290 SD5000 SD5002 SD5200 SDS001 DG301 DG305 DG387
Contextual Info: Multiplexers with Input Latches A na log V olta ge Range V (N ote 4) (N ote 4) PMOS + 5 to - 5 150-240 8 1.5 0.6 DG503 PMOS +10 to - 1 0 150-800 8 1.5 0.6 DG506A Plus 40 CMOS + 10 to - 1 5 400 10 1.0 0.8 DG528 Plus 40 CMOS + 15 to - 1 5 400 10 1.0 0.8 Basic

sx08a

Contextual Info: v4.0  SX-A Family FPGAs u e Le a di n g- E d ge P er f o r m a n ce • Configurable I/O Support for 3.3V/5V PCI, 5V TTL, 3.3V LVTTL, 2.5V LVCMOS2 • 2.5V, 3.3V, and 5V Mixed-Voltage Operation with 5V Input Tolerance and 5V Drive Strength • Devices Support Multiple Temperature Grades

A54SX16A

Contextual Info: v4.0  SX-A Family FPGAs u e Le a di n g- E d ge P er f o r m a n ce • Configurable I/O Support for 3.3V/5V PCI, 5V TTL, 3.3V LVTTL, 2.5V LVCMOS2 • 2.5V, 3.3V, and 5V Mixed-Voltage Operation with 5V Input Tolerance and 5V Drive Strength • Devices Support Multiple Temperature Grades

A54SX08

Abstract: A54SX08A A54SX16 A54SX16A A54SX32 A54SX32A A54SX72A PAR64
Contextual Info: v3.0 SX-A Family FPGAs Le a di n g- E d ge P er f o r m a n ce • Configurable I/O Support for 3.3V/5.0V PCI, 5.0V TTL, and 2.5 V/3.3V LVTTL • 2.5V, 3.3V, and 5.0V Mixed Voltage Operation with 5.0V Input Tolerance and 5.0V Drive Strength • Configurable Weak-Resistor Pull-up or Pull-down for

m1963m

Abstract: SOT325 1 Mhz fm demodulator VSB uhf modulator analog 13 DAH 001 audio video uhf tv transmitter MHB104 stabiliser circuit diagram S020 SDIP20
Contextual Info: Philips S em ico n d u c to rs P relim in ary sp ecification Alignment-free multistandard vision and FM sound IF-PLL demodulator A„ _„ TDA9880 FEATURES G E N E R A L D E S C R IP TIO N • 5 V sup ply volta ge The T D A 98 80 is an integrated circuit for m ultistandard

SX-APQ208

Abstract: A54SX16A
Contextual Info: v2.0 SX-A Family FPGAs Le a di n g- E d ge P er f o r m a n ce • Configurable I/O Support for 3.3V/5.0V PCI, 5.0V TTL, and 2.5 V/3.3V LVTTL • 2.5V, 3.3V, and 5.0V Mixed Voltage Operation with 5.0V Input Tolerance and 5.0V Drive Strength • Configurable Weak-Resistor Pull-up or Pull-down for

SX-APQ208

Abstract: A54SX16A
Contextual Info: v2.0.1 SX-A Family FPGAs Le a di n g- E d ge P er f o r m a n ce • Configurable I/O Support for 3.3V/5.0V PCI, 5.0V TTL, and 2.5 V/3.3V LVTTL • 2.5V, 3.3V, and 5.0V Mixed Voltage Operation with 5.0V Input Tolerance and 5.0V Drive Strength • Configurable Weak-Resistor Pull-up or Pull-down for