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    HDLC SDLC CHIP Search Results

    HDLC SDLC CHIP Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    GCM188D70E226ME36D Murata Manufacturing Co Ltd Chip Multilayer Ceramic Capacitors for Automotive Visit Murata Manufacturing Co Ltd
    GRM022C71A472KE19L Murata Manufacturing Co Ltd Chip Multilayer Ceramic Capacitors for General Purpose Visit Murata Manufacturing Co Ltd
    GRM033C81A224KE01W Murata Manufacturing Co Ltd Chip Multilayer Ceramic Capacitors for General Purpose Visit Murata Manufacturing Co Ltd
    GRM155D70G475ME15D Murata Manufacturing Co Ltd Chip Multilayer Ceramic Capacitors for General Purpose Visit Murata Manufacturing Co Ltd
    GRM155R61J334KE01D Murata Manufacturing Co Ltd Chip Multilayer Ceramic Capacitors for General Purpose Visit Murata Manufacturing Co Ltd

    HDLC SDLC CHIP Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    stk 142 - 150

    Abstract: STK 4272 GT1 X02 RFC-1055 BW144 80X86 CL-CD2231 CL-CD2401 CL-CD2431 stk 4242
    Text: CL-CD2431 Data Book FEATURES • Four full-duplex multi-protocol channels, each running up to 134.4 kbits/second with CLK = 35 MHz ■ Supports async, async-HDLC (high-level data link control), and HDLC/SDLC (synchronous data link control; non-multidrop) on all channels


    Original     		PDF CL-CD2431 32-bit 16-bit RFC-1661 stk 142 - 150 STK 4272 GT1 X02 RFC-1055 BW144 80X86 CL-CD2231 CL-CD2401 CL-CD2431 stk 4242

    STK 412 770

    Abstract: stk 412 -770 CL-CD2431 GT1 X02 stk 713 80X86 CL-CD2231 CL-CD2401 stk 412 240 diagram STK 4272
    Text: CL-CD2431  Data Book FEATURES • Four full-duplex multi-protocol channels, each running up to 134.4 kbits/second with CLK = 35 MHz ■ Supports async, async-HDLC (high-level data link control), and HDLC/SDLC (synchronous data link control; non-multidrop) on all channels


    Original     		PDF CL-CD2431 32-bit 16-bit RFC-1661 STK 412 770 stk 412 -770 CL-CD2431 GT1 X02 stk 713 80X86 CL-CD2231 CL-CD2401 stk 412 240 diagram STK 4272

    DB15 dwg

    Abstract: CRC-16 DB01 DB03 SCN2653
    Text: Philips Semiconductors Product specification Multi-protocol communications controller MPCC DESCRIPTION SCN2652/SCN68652 FEATURES • DC to 2Mbps data rate • Bit-oriented protocols (BOP): SDLC, ADCCP, HDLC • Byte-control protocols (BCP): DDCMP, BISYNC (external CRC)


    Original     		PDF SCN2652/SCN68652 SCN2652/68652 16-bit SCN2652 SD00075 SCN2652/SCN2653 DB15 dwg CRC-16 DB01 DB03 SCN2653

    RFC1662

    Abstract: RFC-1662 iso 3309 SCD240110QCM CD2401 intel DMA controller scd243110qcd hdlc IN SDLC PROTOCOL CD2231
    Text: product brief Intel WAN Controllers Product Highlights • Multi-protocol support: async, sync HDLC/SDLC high-level data link control/ synchronous data link control ■ On-chip 32-bit address, 16-bit data, doublebuffered DMA controller for each transmitter


    Original     		PDF 32-bit 16-bit CD2231, CD2401, CD2431, CD2481 USA/0501/ K/IL10740C RFC1662 RFC-1662 iso 3309 SCD240110QCM CD2401 intel DMA controller scd243110qcd hdlc IN SDLC PROTOCOL CD2231

    8086 8257 DMA controller interfacing

    Abstract: interfacing of 8257 with 8086 intel 8257 interrupt controller GA27-3093 Intel 8257 intel d 8273 intel 8273 8273 dma controller 8086 8257 DMA controller MCS-80
    Text: in te i 8273 PROGRAMMABLE HDLC/SDLC PROTOCOL CONTROLLER CCITT X.25 Compatible Programmable NRZI Encode/Decode HDLC/SDLC Compatible Two Programmable Modem Control Ports Full Duplex, Half Duplex, or Loop SDLC Operation Digital Phase Locked Loop Clock Recovery


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    8273 dma controller

    Abstract: Intel 8080 interface Intel 8080 CPU Diagram intel 8085 clock 8085 intel SDLC PROTOCOL intel 8273 8273
    Text: in te 1 8273 PROGRAMMABLE HDLC/SDLC PROTOCOL CONTROLLER CCITT X.25 Compatible Programmable NRZI Encode/Decode HDLC/SDLC Compatible Two Programmable Modem Control Ports Full Duplex, Half Duplex, or Loop SDLC Operation Digital Phase Locked Loop Clock Recovery


    OCR Scan     		PDF 21047M 8273 dma controller Intel 8080 interface Intel 8080 CPU Diagram intel 8085 clock 8085 intel SDLC PROTOCOL intel 8273 8273

    8086 8257 DMA controller interfacing

    Abstract: interfacing of 8257 with 8086 IC KD 2107 6 PIN 8257 DMA controller intel DMA controller Unit for 80186 8273 dma controller interfacing of 8257 devices with 8085 i8273
    Text: in te i 8273 PROGRAMMABLE HDLC/SDLC PROTOCOL CONTROLLER CCITT X.25 Compatible Programmable NRZI Encode/Decode HDLC/SDLC Compatible Two Programmable Modem Control Ports Full Duplex, Half Duplex, or Loop SDLC Operation Digital Phase Locked Loop Clock Recovery


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    Intel 8080 CPU Diagram

    Abstract: intel 8273 IBM 8080 Intel 8080 block Diagram intel 8085 a hdlc sdlc chip intel 8080 architecture intel 8085 MCS intel 8080 MCS intel 8085 clock
    Text: in le l 8273 PROGRAMMABLE HDLC/SDLC PROTOCOL CONTROLLER CCITT X.25 Compatible Programmable NRZI Encode/Decode HDLC/SDLC Compatible Two Programmable Modem Control Ports Full Duplex, Half Duplex, or Loop SDLC Operation Up to 64K Baud Synchronous Transfers Automatic FCS CRC Generation and


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    8086 8257 DMA controller interfacing

    Abstract: interfacing of 8257 with 8086 8273 dma controller interfacing of 8257 devices with 8085 8086 8257 DMA controller intel 8257 intel 8080 architecture intel 8273 GA27-3093 8228 DI
    Text: in t e i 8273, 8273-4, 8273-8 PROGRAMMABLE HDLC/SDLC PROTOCOL CONTROLLER • CCITT X.25 Compatible ■ Programmable NRZI Encode/Decode ■ HDLC/SDLC Compatible ■ Two User Programmable Modem Control Ports ■ Full Duplex, Half Duplex, or Loop SDLC Operation


    OCR Scan     		PDF 150pF AFN-00743B AFN-00743B 8086 8257 DMA controller interfacing interfacing of 8257 with 8086 8273 dma controller interfacing of 8257 devices with 8085 8086 8257 DMA controller intel 8257 intel 8080 architecture intel 8273 GA27-3093 8228 DI

    intel 8273

    Abstract: interfacing of 8257 with 8086 8086 8257 DMA controller interfacing interfacing of 8257 devices with 8085 8273 dma controller GA27-3093 8273 disk controller 8086 8257 DMA controller 8257 DMA controller intel 8257 interrupt controller
    Text: in te i 8273 PROGRAMMABLE HDLC/SDLC PROTOCOL CONTROLLER CCITT X.25 Compatible HDLC/SDLC Compatible Full Duplex, Half Duplex, or Loop SDLC Operation Up to 64K Baud Synchronous Transfers Automatic FCS CRC Generation and Checking Up to 9.6K Baud with On-Board Phase


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    Untitled

    Abstract: No abstract text available
    Text: Z8530* Serial Communications Controller Z8530 MILITARY INFORMATION DISTINCTIVE CHARACTERISTICS Programmable Synchronous Modes SDLC and HDLC and SDLC loop supported with frame control, zero insertion and deletion, abort, and residue handling. CRC-16 and CCITT genera­


    OCR Scan     		PDF Z8530* Z8530 CRC-16 Z8530

    WD1935A

    Abstract: No abstract text available
    Text: Synchronous Data Link Controller ¡0 0 o r '3 006182 WD1935A Features Offers com patibility with m any current com m unica­ tions standards, such as HDLC, SDLC, ADCGP, CCITT X.25 and ISDN Includes SDLC loop data link capability Provides data transm ission


    OCR Scan     		PDF WD1935A 1X/32X IX/32X W1176C WD1935A

    VL1935-13PC

    Abstract: No abstract text available
    Text: V L S I Tech nology , in c . VL1935 SYNCHRONOUS DATA LINE CONTROLLER FEATURES • HDLC, SDLC, ADCCP and CCITT X.25 Compatible • Global Address Recognition • SDLC Loop Data Link Capability • Extendable Control Field • Full or Half Duplex Operation • Automatic Zero Insertion and Deletion


    OCR Scan     		PDF VL1935 WD1935 VL7C312A, VL1935 VL1935-13PC

    RFC-1331

    Abstract: 105GT-2 80X86 CL-CD2401 CL-CD2431 gt22a iso 3309
    Text: CL-CD2430/CD2431 DataBook i "CIRRUS LOGIC FEATURES • Intelligent 4-Channel Local and WAN Communications Controller Four full-duplex multi-protocol channels, each running up to 128 kbits/second ■ Supports async, async-HDLC high-level data link control , and HDLC/SDLC (synchronous data link


    OCR Scan     		PDF CL-CD2430/CD2431 32-bit 16-bit RFC-1331 RFC-1331 105GT-2 80X86 CL-CD2401 CL-CD2431 gt22a iso 3309

    WD1935A

    Abstract: nrzi modem wd1935 western digital nrzi HDLC IN SDLC PROTOCOL D1130
    Text: Synchronous Data Link Controller WD1935A Features Offers com patibility with m any current com m unica­ tions stan d ard s, such as HDLC, SDLC, ADCGP, CCITT X .25 and ISDN Includes SDLC loop data link capability Provides data transm ission speed s to 4 .0 Mbps


    OCR Scan     		PDF WD1935A WD1935A IX/32X W1176C nrzi modem wd1935 western digital nrzi HDLC IN SDLC PROTOCOL D1130

    Z8000

    Abstract: z8530 8086 logic diagram dc av converter Z8030 8086 interrupt structure 8086 structure interrupt structure of 8086 CRC-16 Z-636
    Text: Z8030/Z8530 Serial Communications Controller DISTINCTIVE CHARACTERISTICS • Programmable Synchronous Modes - SDLC and HDLC, and SOLC loop supported with frame control, zero insertion and deletion, abort, a residue handling - CRC-16 and CCITT generators and checkers


    OCR Scan     		PDF Z8030/Z8530 CRC-16 Z8000* Z8030 Z8000 Z8030A Z8530 Z8530A 8086 logic diagram dc av converter 8086 interrupt structure 8086 structure interrupt structure of 8086 Z-636

    IEEE 1284 Peripheral Interface Controller

    Abstract: SYSTEM ON CHIP QFP-208 RC3041 RC4640 RC4650
    Text: IDT79RC36100 Highly Integrated RISController™ Features * ♦ Instruction set compatible with the RISCore32 family of CPUs ♦ On-chip DMA controller 4 internal channels, 2 external channels On-chip communications controller - Async - Sync HDLC, SDLC


    OCR Scan     		PDF IDT79RC36100â RISCore32 32-bit MIPS/55K 32-bit) IDT79 208-pin IDT79RC36100 33MHz IEEE 1284 Peripheral Interface Controller SYSTEM ON CHIP QFP-208 RC3041 RC4640 RC4650

    RU 110012

    Abstract: dma 8257 sdk 8085 microcomputer intel 8273 intel d 8273 0836 sdk oni 350 DMA8257 8273 dma controller IC TL 0841
    Text: in ter APPLICATION NOTE AP-36 November 1986 Using the 8273 SDLC/HDLC Protocol Controller JOHN BEASTON MICROCOMPUTER APPLICATIONS Order Number: 611001-001 U S IN G T H E 8 2 7 3 S D L C / HDLC PRO TO CO L CO NTRO LLER CONTENTS PAGE in t r o d u c t io n .


    OCR Scan     		PDF AP-36 STAT57 PARM73 STAT73 0ft62 RU 110012 dma 8257 sdk 8085 microcomputer intel 8273 intel d 8273 0836 sdk oni 350 DMA8257 8273 dma controller IC TL 0841

    BT8071A

    Abstract: laf 0001 power BT8071AKPJ BT8071AKG Bt8071ak
    Text: Bt8071A Distinguishing Features Simplifies ISDN/DMI Implementation. •Provides up to 32 Full-Duplex Channels With HDLC/SDLC Protocol Formatting. ’ Provides Fully Programmable Hyperchannel Configuration. • Supports All Four DMI B-Channel Data Options:


    OCR Scan     		PDF Bt8071A 68-Pin Bt8071AKPQ Bt8071AKPJ Bt8071AEPJ Bt8071AKG 64-pin BT8071A laf 0001 power BT8071AKG Bt8071ak

    Am79c401

    Abstract: AmLInk3 AIT179C401 mpi adapter an8250 12268
    Text: Preliminary C I Advanced Micro Devices Am79C401 Integrated Data Protocol Controller IDPC DISTINCTIVE CHARACTERISTICS Data Link Controller • Full-featured bit-oriented communication controller supporting HDLC, SDLC, LAPB, LAPD, and DMI ■ Data transfer rate: 2.048 Mb/s


    OCR Scan     		PDF Am79C401 32-byte 16-byte AID79C401 PL068 AmLInk3 AIT179C401 mpi adapter an8250 12268

    Z80 CPU PHYSICAL DIMENSIONS LCC

    Abstract: No abstract text available
    Text: F IN A L a Am85C30 AdvaMn“2 Enhanced Serial Communications Controller Devices DISTINCTIVE CHARACTERISTICS — Programmable CRC generators and checkers • — SDLC/HDLC support includes frame control, zero insertion and deletion, abort, and residue handling


    OCR Scan     		PDF Am85C30 8530s Am8530H 85C30 Z80 CPU PHYSICAL DIMENSIONS LCC

    AM79C401

    Abstract: Am79C4 mpi adapter IDC bh Am79C30 AN8250 adapter rs232 diagram
    Text: Preliminary H Advanced Micro Devices Am79C401 Integrated Data Protocol Controller IDPC DISTINCTIVE CHARACTERISTICS Data Link Controller Multiple (four plus broadcast) address recognition modes • Full-featured bit-oriented communication controller supporting HDLC, SDLC, LAPB, LAPD, and DMI


    OCR Scan     		PDF Am79C401 32-byte 16-byte PL068 Am79C4 mpi adapter IDC bh Am79C30 AN8250 adapter rs232 diagram

    AM85C30

    Abstract: No abstract text available
    Text: FINAL a Advanced Micro Devices Am85C30 Enhanced Serial Communications Controller DISTINCTIVE CHARACTERISTICS — Programmable CRC generators and checkers • Fastest data rate of any Am8530 — SDLC/HDLC support includes frame control, zero insertion and deletion, abort, and residue


    OCR Scan     		PDF Am85C30 Am8530 14-bit 8530s 1021SF CP-10M-7/B3-0 7/2/Z93

    TDA 9370

    Abstract: AM85C30 am85c30 manual 80286 THOMPSON marking 0229 pnt2 53C80 80C286 WR10 microprocessor 80286
    Text: FINAL a Am85C30 Advanced Micro Devices Enhanced Serial Communications Controller DISTINCTIVE CHARACTERISTICS — Programmable CRC generators and checkers • Fastest data rate of any Am8530 — SDLC/HDLC support includes frame control, zero insertion and deletion, abort, and residue


    OCR Scan     		PDF Am85C30 Am8530 8530s Am8530H 10216F 7/2/Z93 CP-10M-7/B3-0 TDA 9370 am85c30 manual 80286 THOMPSON marking 0229 pnt2 53C80 80C286 WR10 microprocessor 80286