HISTORY OF DUAL CORE Search Results

HISTORY OF DUAL CORE Result Highlights (5)

Part	Manufacturer	Description
TMPM3HMFYAFG	Toshiba Electronic Devices & Storage Corporation	Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP80-1212-0.50-003
TMPM3HPFYADFG	Toshiba Electronic Devices & Storage Corporation	Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP128-1420-0.50-001
TMPM3HLFYAUG	Toshiba Electronic Devices & Storage Corporation	Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP64-1010-0.50-003
TMPM3HNFZAFG	Toshiba Electronic Devices & Storage Corporation	Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP100-1414-0.50-002
TMPM3HLFZAUG	Toshiba Electronic Devices & Storage Corporation	Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP64-1010-0.50-003

HISTORY OF DUAL CORE Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
FW82546EB Abstract: FW82546 SMB A20 LINKA100 Text: 82546EB Dual Port Gigabit Ethernet Controller Networking Silicon Datasheet Revision 1.5 November 2003 Revision History Revision Date Description 1.5 Nov 2003 Corrected typing error of “q” to “θ” in Section 5.3, “Thermal Specifications,” on page 34.	Original	82546EB FW82546EB FW82546 SMB A20 LINKA100	PDF
82544GC Abstract: 82545EM 82546EB 82546GB FW82546GB Text: 82546GB Dual Port Gigabit Ethernet Controller Networking Silicon Datasheet Revision 1.2 November 2003 Revision History Revision Date Description 1.2 Nov 2003 Corrected typing error of “q” to “θ” in Section 5.3, “Thermal Specifications,” on page 35.	Original	82546GB 82544GC 82545EM 82546EB FW82546GB	PDF
Untitled Abstract: No abstract text available Text: 82546GB Dual Port Gigabit Ethernet Controller Networking Silicon Datasheet Revision 1.4 September 2004 Revision History Revision Date Description 1.4 Sept 2004 Corrected the nominal impedance values for the I/O cells from 50 kohms to a nominal impedance value of 120 kohms, with a minimum of 90 kohms and a	Original	82546GB	PDF
STM32 firmware library user manual Abstract: UM0492 Micro joystick stm32 encoder UM0688 shunt resistor current motor stm32 pwm STEVAL-IHM022V1 MB459 STM32F103ZE Text: UM0688 User manual Quick reference guide for the STEVAL-IHM022V1 STM32 dual motor drive demonstration board and software application Introduction The STEVAL-IHM022V1 demonstration board is designed as a dual and triple motor control development platform for STMicroelectronics’ ARM Cortex™-M3 core-based	Original	UM0688 STEVAL-IHM022V1 STM32TM STM32F103ZE STM32 firmware library user manual UM0492 Micro joystick stm32 encoder UM0688 shunt resistor current motor stm32 pwm MB459	PDF
stv0900 Abstract: STV0130 STB6100 stx7109 HDMI to ethernet chip multichannel usb to pcm Analog VHF tuner module STI7200 sAta rs232 ST231 Text: STi7200 Triple display, HDTV set-top box, dual decoder for H.264 and VC-1 Data Brief Features Single-chip, high-definition STB decoder: – H.264 and Microsoft VC-1 compatible – Linux®, Windows® CE and OS21 compatible 350 MHz ST40 CPU core – supports NAND flash, NOR flash and	Original	STi7200 CD00145658 stv0900 STV0130 STB6100 stx7109 HDMI to ethernet chip multichannel usb to pcm Analog VHF tuner module STI7200 sAta rs232 ST231	PDF
GPCM-16-bit Abstract: tlb1 register AN3542 e500 I2C boot sequencer uboot MPC8572E GPCM-32bit E500 MPC8572EDS Text: Freescale Semiconductor Application Note Document Number: AN3542 Rev. 0, 1/2008 SMP Boot Process for Dual E500 Cores by Ted Peters NSD Applications Freescale Semiconductor, Inc. Austin, TX The networking industry is constantly trying to get higher performance from systems. One popular technique is to	Original	AN3542 MPC8572E GPCM-16-bit tlb1 register AN3542 e500 I2C boot sequencer uboot GPCM-32bit E500 MPC8572EDS	PDF
sti7100 Abstract: sti7100 jtag Tuner I2C program stv0299 ST40 TOOLSET STB6000 st40 jtag H.264 transport Stream demux SMARTCARD directv stapi STI710 Text: STi7100 Low cost HDTV set-top box decoder for H.264/AVC and MPEG-2 Data Brief • Features ■ The STi7100 is a single-chip, high-definition STB decoder including: – ST40 CPU core, 266 MHz – dual ST231 CPU cores for audio and video decoding, both 400 MHz	Original	STi7100 264/AVC STi7100 ST231 ST231 sti7100 jtag Tuner I2C program stv0299 ST40 TOOLSET STB6000 st40 jtag H.264 transport Stream demux SMARTCARD directv stapi STI710	PDF
Untitled Abstract: No abstract text available Text: L6740L Hybrid Controller 4+1 for AMD SVID and PVID Processors Data Brief Features • Hybrid controller: compatible with PVI and SVI CPUs ■ Dual controller: 2 to 4 scalable phases for CPU CORE, 1 Phase for NB ■ Dual-Edge asynchronous architecture with	Original	L6740L	PDF
vhdl code for carry select adder Abstract: vhdl code for 64 carry select adder 32 bit carry select adder code carry select adder with sharing carry select adder vhdl clock select adder with sharing vhdl code for area efficient carry select adder Text: 2. Logic Array Blocks and Adaptive Logic Modules in Arria II GX Devices AIIGX51002-1.1 Introduction This chapter describes the features of the logic array block LAB in the Arria II GX core fabric. The logic array block is composed of basic building blocks known as	Original	AIIGX51002-1 vhdl code for carry select adder vhdl code for 64 carry select adder 32 bit carry select adder code carry select adder with sharing carry select adder vhdl clock select adder with sharing vhdl code for area efficient carry select adder	PDF
Dual-core ARM Cortex-A9 CPU Abstract: ARM Cortex-A9 cortex-a9 STiD12 moca modem ST-40 wifi modem Text: STiD128 DOCSIS 3.0 and video front-end for gateway set-top box and cable modem Data brief Features • Dual CPU architecture - one for DOCSIS and one for host including eRouting and VoIP management ■ ARM Cortex-A9 770 MHz, dual-core CPU with NEON SIMD co-processor	Original	STiD128 Dual-core ARM Cortex-A9 CPU ARM Cortex-A9 cortex-a9 STiD12 moca modem ST-40 wifi modem	PDF
e200z7 Abstract: MPC57xx instruction set MPC5777M e200z420n3 MPC5775K freescale mpc5777M MPC5775 MPC5744P Text: Freescale Semiconductor Application Note Document Number:AN4802 Rev 0, 10/2013 Qorivva MPC57xx e200zx Core Differences c55 process migration by: Randy Dees Contents 1 Introduction Freescale's Qorivva MPC57xx devices are the latest generation of Automotive microcontrollers MCU based on	Original	AN4802 MPC57xx e200zx e200z7 MPC57xx instruction set MPC5777M e200z420n3 MPC5775K freescale mpc5777M MPC5775 MPC5744P	PDF
CHINA TV MEMORY RESET Abstract: LVDS to cvbs ic STV6415 LVDS INPUT CVBS OUTPUT HDMI to cvbs ic plasma tv ic st40 jtag STV6402 lvds 1080p panel Deinterlacer Text: STi1010 Single-chip worldwide iDTV processor Data Brief MP@ML and MP@HL MPEG2 video decoder • 24-bit audio DSP core, MPEG1 layers 1,2,3 , MPEG2, MPEG2-AAC, Dolby Digital, MP3 decoder ■ 24-bit digital video input, up to 1080p and UXGA/60 Hz CEC/HPD DDC	Original	STi1010 1080p 24-bit UXGA/60 24/16/8-bit 16-bit) 32-bit) CHINA TV MEMORY RESET LVDS to cvbs ic STV6415 LVDS INPUT CVBS OUTPUT HDMI to cvbs ic plasma tv ic st40 jtag STV6402 lvds 1080p panel Deinterlacer	PDF
ST40 TOOLSET Abstract: STV0130 STB6000 STI5202 st40 st231 ST40 IC RECS-80 make ypbpr encoded RC5 IR transmitter st40 jtag Text: STi5202 Low-cost set-top box decoder for H.264 and Microsoft VC1 Data Brief • Features ■ Single-chip, video decoder including – Linux , Windows® CE and OS21 compatible ST40 CPU core: 266 MHz – Transport filtering and descrambling – Video decoder: VC-1 including WMV 9 ,	Original	STi5202 32-bit 100BT STi5202 ST40 TOOLSET STV0130 STB6000 st40 st231 ST40 IC RECS-80 make ypbpr encoded RC5 IR transmitter st40 jtag	PDF
Untitled Abstract: No abstract text available Text: Freescale Semiconductor Product Brief Document Number:MC56F847XPB Rev. 2, 06/2012 MC56F844x/5x/7x Product Brief Supports MC56F844x, MC56F845x, MC56F847x Contents 1 Introduction The 56F844x/5x/7x is the initial family of 32-bit 56800EX core–based Digital Signal Controllers DSCs . Each device in	Original	MC56F847XPB MC56F844x/5x/7x MC56F844x, MC56F845x, MC56F847x 56F844x/5x/7x 32-bit 56800EX	PDF

verilog code of carry save adder Abstract: vhdl code of carry save adder 16 bit carry select adder verilog code 3-bit binary multiplier using adder VERILOG verilog code for 16 bit carry select adder 8 bit carry select adder verilog code vhdl code for crossbar switch vhdl for carry save adder vhdl code for carry select adder 8 bit carry select adder verilog code with Text: 2. Logic Array Blocks and Adaptive Logic Modules in Stratix III Devices SIII51002-1.5 Introduction This chapter describes the features of the logic array block LAB in the Stratix III core fabric. The logic array block is composed of basic building blocks known as	Original	SIII51002-1 verilog code of carry save adder vhdl code of carry save adder 16 bit carry select adder verilog code 3-bit binary multiplier using adder VERILOG verilog code for 16 bit carry select adder 8 bit carry select adder verilog code vhdl code for crossbar switch vhdl for carry save adder vhdl code for carry select adder 8 bit carry select adder verilog code with	PDF
ML507 Abstract: ML505 XAPP996 Xilinx ISE Design Suite 9.2i microblaze PowerPc405 ML410 microblaze block architecture 040924 Text: Application Note: Embedded Processing R Dual Processor Reference Design Suite Author: Vasanth Asokan XAPP996 v1.3 October 6, 2008 Summary This is the Xilinx Dual Processor Reference Designs suite. The designs illustrate a few different dual-core architectures based on the MicroBlaze and PowerPC processors.	Original	XAPP996 WP262 ML505 ML507 XAPP996 Xilinx ISE Design Suite 9.2i microblaze PowerPc405 ML410 microblaze block architecture 040924	PDF
TX4964 Abstract: TX4964FG-120 TX4964FG TX49 toshiba TOSHIBA TX4964FG BDE0095C EJTAG TX49 Text: TX49/L4 Core Product Specification Update Rev. 1.0 Semiconductor Company The information contained herein is subject to change without notice. 021023_D TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and	Original	TX49/L4 TX4964 TX4964FG-120 TX4964FG TX49 toshiba TOSHIBA TX4964FG BDE0095C EJTAG TX49	PDF
STI5516 Abstract: STI5517 STV0399 STi5517AUA Descrambler ST20 STV0297 STV0360 STV0396 STV2310 Text: STi5517 Low-cost set-top box decoder DATA BRIEF DESCRIPTION STMicroelectronics has developed two devices for low cost cable, satellite and terrestrial STBs. The STi5516 and STi5517 integrate more core STB functions into a single device than ever before, offering STB manufacturers the	Original	STi5517 STi5516 STi5517 RGB16 STV0399 STi5517AUA Descrambler ST20 STV0297 STV0360 STV0396 STV2310	PDF
M68000 Abstract: MCF5206 Text: Product Brief MCF5206EPB/D Rev. 2.1, 3/2002 MCF5206e Integrated ColdFire Microprocessor Product Brief The MCF5206e integrated microprocessor combines a ColdFire® core with several peripheral functions such as a DRAM controller, timers, parallel and serial interfaces, and system	Original	MCF5206EPB/D MCF5206e MCF5206, MCF5206 MCF5206. M68000	PDF
Untitled Abstract: No abstract text available Text: ST2S06 Dual synchronous rectification with reset or inhibit, 0.5 A, 1.5 MHz adjustable step-down switching regulator Datasheet - production data Description The ST2S06A33 and ST2S06B are dual stepdown DC-DC converters optimized for powering low-voltage digital cores in ODD applications and,	Original	ST2S06 ST2S06A33 ST2S06B QFN12L DocID13866	PDF
turbo timer Abstract: TQFP52 TQFP80 uPSD3312D-40T6 uPSD3312DV-40T6 uPSD3333D-40T6 uPSD3333DV-40T6 uPSD33xx UPSD33xx Turbo Series UPSD3334D-40U6 Text: uPSD33xx Turbo Series Fast 8032 MCU with Programmable Logic DATA BRIEFING FEATURES SUMMARY • ■ ■ ■ ■ FAST 8-BIT TURBO 8032 MCU, 40MHz – Advanced core, 4-clocks per instruction – 10 MIPs peak performance at 40MHz 5V – JTAG Debug and In-System	Original	uPSD33xx 40MHz 15-year turbo timer TQFP52 TQFP80 uPSD3312D-40T6 uPSD3312DV-40T6 uPSD3333D-40T6 uPSD3333DV-40T6 UPSD33xx Turbo Series UPSD3334D-40U6	PDF
fifo memory Abstract: Avalon QII55002-7 Text: 4. On-Chip FIFO Memory Core QII55002-7.1.0 Core Overview The on-chip FIFO memory core is a configurable component used to buffer data and provide flow control in an SOPC Builder system. The FIFO can operate with a single clock or with separate clocks for the input	Original	QII55002-7 fifo memory Avalon	PDF
Untitled Abstract: No abstract text available Text: SM3-IT ULTRA MINIATURE STRATUM 3 MODULE 2111 Comprehensive Drive Aurora, Illinois 60505 Phone: 630- 851- 4722 Fax: 630- 851- 5040 www.conwin.com Application The SM3-IT Timing Module is a complete system clock module for Stratum 3 timing applications and conforms to GR-1244-CORE Issue	Original	GR-1244-CORE GR-253-CORE TM064	PDF
Untitled Abstract: No abstract text available Text: uPSD34xx Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic DATA BRIEFING FEATURES SUMMARY • ■ ■ ■ ■ FAST 8-BIT TURBO 8032 MCU, 40MHz – Advanced core, 4-clocks per instruction – 10 MIPs peak performance at 40MHz 5V – JTAG Debug and In-System	Original	uPSD34xx 40MHz 16-bit	PDF

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HISTORY OF DUAL CORE Search Results

HISTORY OF DUAL CORE Result Highlights (5)

HISTORY OF DUAL CORE Datasheets Context Search

FW82546EB

82544GC

Untitled

STM32 firmware library user manual

stv0900

GPCM-16-bit

sti7100

Untitled

vhdl code for carry select adder

Dual-core ARM Cortex-A9 CPU

e200z7

CHINA TV MEMORY RESET

ST40 TOOLSET

Untitled

verilog code of carry save adder

ML507

TX4964

STI5516

M68000

Untitled

turbo timer

fifo memory

Untitled

Untitled