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    HSM2812 DATA SHEET Search Results

    HSM2812 DATA SHEET Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    NFMJMPC226R0G3D Murata Manufacturing Co Ltd Data Line Filter, Visit Murata Manufacturing Co Ltd
    NFM15PC755R0G3D Murata Manufacturing Co Ltd Feed Through Capacitor, Visit Murata Manufacturing Co Ltd
    NFM15PC435R0G3D Murata Manufacturing Co Ltd Feed Through Capacitor, Visit Murata Manufacturing Co Ltd
    NFM15PC915R0G3D Murata Manufacturing Co Ltd Feed Through Capacitor, Visit Murata Manufacturing Co Ltd
    MP-52RJ11SNNE-100 Amphenol Cables on Demand Amphenol MP-52RJ11SNNE-100 Shielded CAT5e 2-Pair RJ11 Data Cable [AT&T U-Verse & Verizon FiOS Data Cable] - CAT5e PBX Patch Cable with 6P6C RJ11 Connectors (Straight-Thru) 100ft Datasheet

    HSM2812 DATA SHEET Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    hsm2812

    Abstract: ANSI-644 ADA4937-2 AN-835 TC1-1-13M IEEE-1596 TC1-1-13M equivalent murata LTE band pass filter
    Text: 10 MHz Bandwidth, 640 MSPS Dual Continuous Time Sigma-Delta Modulator AD9267 FEATURES AVDD PDWNB PDWNA DRVDD LVDS DRIVERS OR±A VIN+A Σ-Δ MODULATOR VIN–A D3±A D0±A PLL_LOCKED VREF CFILT AD9267 PLLMULT4 PLLMULT3 PLLMULT2 PHASELOCKED LOOP CLK+ CLK– DCO±


    Original     		PDF AD9267 CDMA2000, MO-220-VMMD-4 091707-C 64-Lead AD9267BCPZ1 AD9267EBZ1 D07773-0-7/09 hsm2812 ANSI-644 ADA4937-2 AN-835 TC1-1-13M IEEE-1596 TC1-1-13M equivalent murata LTE band pass filter

    Untitled

    Abstract: No abstract text available
    Text: 10 MHz Bandwidth, 640 MSPS Dual Continuous Time Sigma-Delta Modulator AD9267 FUNCTIONAL BLOCK DIAGRAM FEATURES PDWNB PDWNA DRVDD LVDS DRIVERS OR±A VIN+A MODULATOR VIN–A D3±A D0±A PLL_LOCKED VREF CFILT AD9267 PLLMULT4 PLLMULT3 PLLMULT2 PHASELOCKED LOOP


    Original     		PDF AD9267 CDMA2000, MO-220-VMMD-4 091707-C 64-Lead AD9267BCPZ1 AD9267EBZ1 D07773-0-7/09

    Untitled

    Abstract: No abstract text available
    Text: 16-Bit, 10 MHz Bandwidth, 30 MSPS to 160 MSPS Continuous Time Sigma-Delta ADC AD9261 FUNCTIONAL BLOCK DIAGRAM FEATURES AVDD DRVDD OR VIN+ VIN– MODULATOR LOW-PASS DECIMATION FILTER SAMPLE RATE CONVERTER CMOS BUFFER D15 D0 PLL_ LOCKED VREF PHASE LOCKED LOOP


    Original     		PDF 16-Bit, AD9261 Hz/10 conve00 48-Lead CP-48-1) AD9261BCPZ-10 AD9261BCPZRL7-10 AD9261-10EBZ

    HSM2812

    Abstract: ADA4937-1 AN-835 TC1-1-13M AD9261-10EBZ
    Text: 16-Bit, 10 MHz Bandwidth, 30 MSPS to 160 MSPS Continuous Time Sigma-Delta ADC AD9261 FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD DRVDD OR VIN+ VIN– Σ-Δ MODULATOR LOW-PASS DECIMATION FILTER SAMPLE RATE CONVERTER CMOS BUFFER D15 D0 PLL_ LOCKED VREF PHASE LOCKED


    Original     		PDF 16-Bit, AD9261 Hz/10 48-Lead CP-48-1) AD9261BCPZ-10 AD9261BCPZRL7-10 AD9261-10EBZ HSM2812 ADA4937-1 AN-835 TC1-1-13M AD9261-10EBZ

    HSM2812

    Abstract: AN-835 D15A
    Text: 16-Bit, 2.5 MHz/5 MHz/10 MHz, 30 MSPS to 160 MSPS Dual Continuous Time Sigma-Delta ADC AD9262 FEATURES APPLICATIONS Baseband quadrature receivers: CDMA2000, W-CDMA, multicarrier GSM/EDGE, 802.16x, and LTE Quadrature sampling instrumentation Medical equipment


    Original     		PDF 16-Bit, Hz/10 AD9262 CDMA2000, AD9262 16-bit CP-64-4) AD9262BCPZ-10 AD9262BCPZ-5 AD9262BCPZ HSM2812 AN-835 D15A

    HSM2812

    Abstract: 46fs 74HCT00 74LS00 clock frequency 74ACT00 74LS00 AD9446 AD9446-100 AD9446-80 walt Kester
    Text: dV x Δt dt Δv VOLTAGE A Test Engineering Perspective Δv = VOLTAGE Analog-to-Digital Converter Clock Optimization: Δv By Rob Reeder, Wayne Green, and Robert Shillito System clock optimization can be both challenging and rewarding. It may be relatively easy to design an analog-to-digital converter


    Original     		PDF AD9446-1001--a 16-bit, 100-MHz 100-MHz 105-MHz 12and HSM2812 46fs 74HCT00 74LS00 clock frequency 74ACT00 74LS00 AD9446 AD9446-100 AD9446-80 walt Kester

    Untitled

    Abstract: No abstract text available
    Text: 16-Bit, 2.5 MHz/5 MHz/10 MHz, 30 MSPS to 160 MSPS Dual Continuous Time Sigma-Delta ADC AD9262 FUNCTIONAL BLOCK DIAGRAM FEATURES APPLICATIONS Baseband quadrature receivers: CDMA2000, W-CDMA, multicarrier GSM/EDGE, 802.16x, and LTE Quadrature sampling instrumentation


    Original     		PDF 16-Bit, Hz/10 AD9262 CDMA2000, AD9262 16-bit CP-64-4) AD9262BCPZ-10 AD9262BCPZ-5 AD9262BCPZ

    Untitled

    Abstract: No abstract text available
    Text: Radar Receive Path AFE: 6-Channel LNA/PGA/AAF with ADC AD8283 Data Sheet INA– INB+ INB– PGA AAF LNA PGA AAF LNA PGA AAF LNA PGA AAF RBIAS LNA VREF AAF DVDD33x PGA DVDD18x LNA MUXA AAF PDWN PGA REFERENCE DSYNC INC+ INC– MUX IND+ IND– INE+ INE– INF+


    Original     		PDF AD8283 DVDD33x DVDD18x 12-BIT AVDD33x AVDD18x D09795-0-11/13

    6 pin pulse transformer 4503 circuit diagram

    Abstract: pulse transformer 4503 pulse transformer 4503 6 pin hsm2812
    Text: 12-Bit, 370 MSPS/500 MSPS, 1.8 V Analog-to-Digital Converter AD9434 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM VREF PWDN AGND AVDD AD9434 REFERENCE CML VIN+ VIN– DRVDD DRGND TRACK-AND-HOLD ADC CORE CLK+ CLK– 12 OUTPUT 12 STAGING LVDS CLOCK MANAGEMENT


    Original     		PDF ANSI-644 56-Lead AD9434BCPZ-370 AD9434BCPZ-500 CP-56-5 6 pin pulse transformer 4503 circuit diagram pulse transformer 4503 pulse transformer 4503 6 pin hsm2812

    Untitled

    Abstract: No abstract text available
    Text: Octal, 14-Bit, 50 MSPS, Serial LVDS, 1.8 V ADC AD9252 Data Sheet FUNCTIONAL BLOCK DIAGRAM FEATURES APPLICATIONS Medical imaging and nondestructive ultrasound Portable ultrasound and digital beam-forming systems Quadrature radio receivers Diversity radio receivers


    Original     		PDF 14-Bit, AD9252 AD9252 AN-877

    AD9467

    Abstract: B0205F5050A00 AD520* differential amplifier
    Text: 16-Bit, 200 MSPS/250 MSPS Analog-to-Digital Converter AD9467 Data Sheet 75.5 dBFS SNR to 210 MHz at 250 MSPS 90 dBFS SFDR to 300 MHz at 250 MSPS SFDR at 170 MHz at 250 MSPS 92 dBFS at −1 dBFS 100 dBFS at −2 dBFS 60 fs rms jitter Excellent linearity at 250 MSPS


    Original     		PDF ANSI-644 16-Bit, MSPS/250 AD9467 CP-72-5) AD9467BCPZ-200 AD9467BCPZRL7-200 AD9467BCPZ-250 AD9467BCPZRL7-250 AD9467-200EBZ AD9467 B0205F5050A00 AD520* differential amplifier

    Untitled

    Abstract: No abstract text available
    Text: 16-Bit, 200 MSPS/250 MSPS Analog-to-Digital Converter AD9467 Data Sheet FUNCTIONAL BLOCK DIAGRAM 75.5 dBFS SNR to 210 MHz at 250 MSPS 90 dBFS SFDR to 300 MHz at 250 MSPS SFDR at 170 MHz at 250 MSPS 92 dBFS at −1 dBFS 100 dBFS at −2 dBFS 60 fs rms jitter


    Original     		PDF 16-Bit, MSPS/250 AD9467 ANSI-644 CP-72-5) AD9467BCPZ-200 AD9467BCPZRL7-200 AD9467BCPZ-250 AD9467BCPZRL7-250 AD9467-200EBZ

    AD9467

    Abstract: No abstract text available
    Text: 16-Bit, 200 MSPS/250 MSPS Analog-to-Digital Converter AD9467 Data Sheet FUNCTIONAL BLOCK DIAGRAM 75.5 dBFS SNR to 210 MHz at 250 MSPS 90 dBFS SFDR to 300 MHz at 250 MSPS SFDR at 170 MHz at 250 MSPS 92 dBFS at −1 dBFS 100 dBFS at −2 dBFS 60 fs rms jitter


    Original     		PDF ANSI-644 16-Bit, MSPS/250 AD9467 CP-72-5) AD9467BCPZ-200 AD9467BCPZRL7-200 AD9467BCPZ-250 AD9467BCPZRL7-250 AD9467-200EBZ AD9467

    HSM2812

    Abstract: AD9102-EBZ ultrasound transducer circuit driver CALSE chip for generating 10 Mhz sine wave TXDAC DDS-60 Rev A
    Text: Low Power, 14-Bit, 180 MSPS, Digital-to-Analog Converter and Waveform Generator AD9102 Data Sheet FEATURES The DDS is a 14-bit output, up to 180 MSPS master clock sine wave generator with a 24-bit tuning word, allowing 10.8 Hz/LSB frequency resolution. On-chip 4096 x 14-bit pattern memory


    Original     		PDF 14-Bit, 14-bit 32-lead, AD9102 24-bit MO-220-WHHD-5 32-Lead CP-32-12) AD9102BCPZ HSM2812 AD9102-EBZ ultrasound transducer circuit driver CALSE chip for generating 10 Mhz sine wave TXDAC DDS-60 Rev A

    6 pin pulse transformer 4503 circuit diagram

    Abstract: pulse transformer 4503 111 pulse transformer 4503 pulse transformer 4503 with 3 pins
    Text: 8-Bit, 500 MSPS, 1.8 V Analog-to-Digital Converter AD9484 FEATURES FUNCTIONAL BLOCK DIAGRAM VREF PWDN AGND AVDD AD9484 REFERENCE CML VIN+ VIN– DRVDD DRGND TRACK-AND-HOLD ADC CORE CLK+ CLK– 8 OUTPUT STAGING LVDS CLOCK MANAGEMENT 8 D7± TO D0± OR+ OR–


    Original     		PDF AD9484 ANSI-644 081809-B MO-220-VLLD-2 56-Lead CP-56-5) AD9484BCPZ-500 AD9484BCPZRL7-500 AD9484-500EBZ 6 pin pulse transformer 4503 circuit diagram pulse transformer 4503 111 pulse transformer 4503 pulse transformer 4503 with 3 pins

    6 pin pulse transformer 4503 circuit diagram

    Abstract: pulse transformer 4503 111 pulse transformer 4503 6 pin pulse transformer 4503 pulse transformer 4503 with 3 pins
    Text: 8-Bit, 500 MSPS, 1.8 V Analog-to-Digital Converter AD9484 FEATURES FUNCTIONAL BLOCK DIAGRAM VREF PWDN AGND AVDD AD9484 REFERENCE CML VIN+ VIN– DRVDD DRGND TRACK-AND-HOLD ADC CORE CLK+ CLK– 8 OUTPUT STAGING LVDS CLOCK MANAGEMENT 8 D7± TO D0± OR+ OR–


    Original     		PDF AD9484 ANSI-644 081809-B MO-220-VLLD-2 56-Lead CP-56-5) AD9484BCPZ-500 AD9484BCPZRL7-500 AD9484-500EBZ 6 pin pulse transformer 4503 circuit diagram pulse transformer 4503 111 pulse transformer 4503 6 pin pulse transformer 4503 pulse transformer 4503 with 3 pins

    Untitled

    Abstract: No abstract text available
    Text: 16-Bit, 200 MSPS/250 MSPS Analog-to-Digital Converter AD9467 Preliminary Technical Data 75.5 dBFS SNR to 170 MHz at 250 MSPS @ 2.5 V p-p FS 74 dBFS SNR to 170 MHz at 250 MSPS @ 2.0 V p-p FS 90 dBFS SFDR to 300 MHz at 250 MSPS @ −1 dBFS at 2.5 V p-p FS


    Original     		PDF 16-Bit, MSPS/250 AD9467 121809-B 72-Lead CP-72-5) AD9467BCPZ-250 AD9467BCPZ-200 AD9467-200EBZ AD9467-250EBZ

    Untitled

    Abstract: No abstract text available
    Text: 11-Bit, 200 MSPS, 1.8 V Analog-to-Digital Converter AD9230-11 FEATURES FUNCTIONAL BLOCK DIAGRAM RBIAS PWDN AGND AVDD AD9230-11 REFERENCE CML DRVDD DRGND VIN+ VIN– TRACK-AND-HOLD ADC 12-BIT CORE CLK+ CLK– 12 OUTPUT STAGING LVDS CLOCK MANAGEMENT 11 D10 TO D0


    Original     		PDF 11-Bit, AD9230-11 12-BIT ANSI-644 56-Lead CP-56-2) AD9230BCPZ11-200 AD923011-200EBZ1

    AD9230BCPZ11-200

    Abstract: hsm2812 AN501 "pin-compatible" AD9211 AD9230 AD9230-11 AN-835 ANSI-644 AD923011-200EBZ
    Text: 11-Bit, 200 MSPS, 1.8 V Analog-to-Digital Converter AD9230-11 FEATURES FUNCTIONAL BLOCK DIAGRAM RBIAS PWDN AGND AVDD AD9230-11 REFERENCE CML VIN+ VIN– DRVDD DRGND TRACK-AND-HOLD ADC 12-BIT CORE CLK+ CLK– 12 OUTPUT STAGING LVDS CLOCK MANAGEMENT 11 D10 TO D0


    Original     		PDF 11-Bit, AD9230-11 12-BIT ANSI-644 56-Lead CP-56-2) AD9230BCPZ11-200 AD923011-200EBZ1 hsm2812 AN501 "pin-compatible" AD9211 AD9230 AD9230-11 AN-835 AD923011-200EBZ

    HSM2812

    Abstract: ANALOG DEVICES ad9106
    Text: Quad, Low Power, 12-Bit, 180 MSPS, Digital-toAnalog Converter and Waveform Generator AD9106 Data Sheet FEATURES GENERAL DESCRIPTION Highly integrated quad DAC On-chip 4096 x 12-bit pattern memory On-chip DDS Power dissipation at 3.3 V, 4 mA output 315 mW at 180 MSPS


    Original     		PDF 12-Bit, 12-bit 32-lead, AD9106 AD9106 MO-220-WHHD-5 32-Lead CP-32-12) AD9106BCPZ AD9106BCPZRL7 HSM2812 ANALOG DEVICES ad9106

    ANALOG DEVICES ad9106

    Abstract: No abstract text available
    Text: Quad, Low Power, 12-Bit, 180 MSPS, Digital-toAnalog Converter and Waveform Generator AD9106 Data Sheet FEATURES GENERAL DESCRIPTION Highly integrated quad DAC On-chip 4096 x 12-bit pattern memory On-chip DDS Power dissipation at 3.3 V, 4 mA output 315 mW at 180 MSPS


    Original     		PDF 12-Bit, 12-bit 32-lead, AD9106 AD9106 MO-220-WHHD-5 32-Lead CP-32-12) AD9106BCPZ AD9106BCPZRL7 ANALOG DEVICES ad9106

    Untitled

    Abstract: No abstract text available
    Text: INA– INB+ INB– INC+ INC– IND+ IND– AAF LNA PGA AAF LNA PGA AAF VREF PGA RBIAS LNA DVDD33x AAF DVDD18x PGA MUXA LNA PDWN AVDD18x INA+ AVDD33x FUNCTIONAL BLOCK DIAGRAM REFERENCE DSYNC MUX 12-BIT ADC DRV D[0:11] INADC+ INADC– SPI NOTES 1. AVDD18x = AVDD18, AVDD18ADC.


    Original     		PDF DVDD33x DVDD18x AVDD18x AVDD33x 12-BIT AVDD18, AVDD18ADC. AVDD33,

    AD9230-250EBZ

    Abstract: AD9211 AD9230 AD9230-170 AD9230-210 AD9230-250 AN-835 ANSI-644 0125P
    Text: 12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter AD9230 FEATURES FUNCTIONAL BLOCK DIAGRAM RBIAS PWDN AGND AVDD 1.8V AD9230 REFERENCE CML VIN+ VIN– DRVDD DRGND TRACK-AND-HOLD ADC 12-BIT CORE CLK+ CLK– 12 OUTPUT 12 STAGING LVDS CLOCK


    Original     		PDF 12-Bit, MSPS/210 MSPS/250 AD9230 12-BIT ANSI-644 170EBZ1 AD9230-210EBZ1 AD9230-250EBZ1 AD9230-250EBZ AD9211 AD9230 AD9230-170 AD9230-210 AD9230-250 AN-835 0125P

    Untitled

    Abstract: No abstract text available
    Text: 10-Bit, 200 MSPS/250 MSPS/300 MSPS, 1.8 V Analog-to-Digital Converter AD9211 FEATURES FUNCTIONAL BLOCK DIAGRAM RBIAS PWDN AGND AVDD 1.8V AD9211 REFERENCE DRVDD DGND VIN+ VIN– TRACK-AND-HOLD ADC 10-BIT CORE CLK+ CLK– 10 OUTPUT 10 STAGING LVDS CLOCK MANAGEMENT


    Original     		PDF 10-Bit, MSPS/250 MSPS/300 AD9211 10-BIT ANSI-644 AD9211BCPZ-200 AD9211BCPZ-2501 AD9211BCPZ-3001