hdlc
Abstract: CRC-32 PM4354 PM7364 PM7367 PM8315
Text: PMC-Sierra,Inc. PM7367 FREEDM-32P32 Preliminary 32 link, 32 Channel Data Link Manager with PCI Interface FEATURES • Supports a mix of channelized and unchannelized links. • The maximum aggregate clock rate is 64 MHz. When the device is interfaced to two T3 or HSSI links, the maximum
|
Original
|
PM7367
FREEDM-32P32
CRC-32
PM8315
PMC-2000358
hdlc
PM4354
PM7364
PM7367
PM8315
|
PDF
|
CRC-32
Abstract: PM8315 hdlc PM4354 PM7364 PM7367
Text: PM7367 FREEDM-32P32 PMC-Sierra,Inc. 32 link, 32 Channel Data Link Manager with PCI Interface FEATURES • Supports a mix of channelized and unchannelized links. • The maximum aggregate clock rate is 64 MHz. When the device is interfaced to two T3 or HSSI links, the maximum
|
Original
|
PM7367
FREEDM-32P32
CRC-32
PM8315
FREEDM32P32
PMC-2000358
FREEDM-32P32,
PM8315
hdlc
PM4354
PM7364
PM7367
|
PDF
|
B-STDX 9000
Abstract: B-STDX 8000 ANSI T1.102 GR-63-CORE lucent dacs bottle feeder GR-1089-CORE RJ-48 multiplexing t1 frame to t3 frame TR-NWT-000499
Text: B-STDX 8000/9000 Multiservice WAN Switches High-Speed Frame Relay/IP Modules • 1-Port Channelized DS3/1/0 I/O Module ■ 1-Port Channelized DS3/1 I/O Module ■ 2-Port HSSI I/O Module ■ 2-Port Ethernet 10/100 Base-T I/O Module The B-STDX 8000/9000TM high-speed frame relay/IP I/O modules provide IP and
|
Original
|
8000/9000TM
RJ-45
B-STDX 9000
B-STDX 8000
ANSI T1.102
GR-63-CORE
lucent dacs
bottle feeder
GR-1089-CORE
RJ-48
multiplexing t1 frame to t3 frame
TR-NWT-000499
|
PDF
|
altera ethernet packet generator
Abstract: verification for pci express xaui xaui xgmii ip core altera transactor hssi protocol
Text: DesignCon 2007 Serial Protocol Compliance of an FPGA-Integrated Mixed-Signal Transceiver Divya Vijayaraghavan, Altera Corporation Ramanand Venkata, Arch Zaliznyak, Michael Zheng, Steven Shen, Binh Ton, Lana Chan, Steve Park, Chong Lee, Rakesh Patel, Richard Cliff,
|
Original
|
CP-01022-1
altera ethernet packet generator
verification for pci express
xaui
xaui xgmii ip core altera
transactor
hssi protocol
|
PDF
|
infiniband Physical Medium Attachment
Abstract: "toan nguyen" 200MHZ P802 circuit diagram digital clocks Serial RapidIO Infiniband FPGA SoC, Chip, telecom fpga da altera altera 48 fpga 1gbps serdes
Text: Architecture and Methodology of a SoPC with 3.25Gbps CDR based Serdes and 1Gbps Dynamic Phase Alignment Ramanand Venkata, Wilson Wong, Tina Tran, Vinson Chan, Tim Hoang, Henry Lui, Binh Ton, Sergey Shumurayev, Chong Lee, Shoujun Wang, Huy Ngo, Malik Kabani, Victor Maruri, Tin Lai, Tam Nguyen, Arch
|
Original
|
25Gbps
125Gbps
622megabits
infiniband Physical Medium Attachment
"toan nguyen"
200MHZ
P802
circuit diagram digital clocks
Serial RapidIO Infiniband
FPGA SoC, Chip, telecom
fpga da altera
altera 48 fpga
1gbps serdes
|
PDF
|
PRBS altera verilog
Abstract: mixed signal fpga datasheet papers ethernet mac verilog testbench altera ethernet packet generator SerialLite verification for pci express
Text: DesignCon 2006 Functional Verification of 622-Mbps–6.375-Gbps Transceiver IP in an FPGA Ning Xue, Altera Corporation [nxue@altera.com] Ramanand Venkata, Arch Zaliznyak, Divya Vijayaraghavan, Steve Park, Chong Lee, Rakesh Patel (Altera Corporation) CP-TRNSCVR-1.0
|
Original
|
622-Mbps
375-Gbps
PRBS altera verilog
mixed signal fpga datasheet
papers
ethernet mac verilog testbench
altera ethernet packet generator
SerialLite
verification for pci express
|
PDF
|
Kentrox
Abstract: 10311 7930 EN50082-1 RJ48C VT100 EIA-613
Text: ATM Access Family A complete line of multi-service access systems for today’s hybrid networks. ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ n Standards compliance with ATM Forum, Bellcore, ITU-T, and Frame Relay Forum
|
Original
|
|
PDF
|
Untitled
Abstract: No abstract text available
Text: AMT75e DVB-S/S2 High Speed Broadcast Modem Features • Overview Combines Advantech Wireless’ powerful DVB-S/S2 modulator and demodulator in a single 1 RU chassis. Powerful Forward Error Correction FEC choices compliant
|
Original
|
AMT75e
16APSK/32APSK
64QAM
155Mbps
20Mbps)
32ksps
45Msps
PB-AMT75e-001-13150
|
PDF
|
txc-03361 application notes
Abstract: 97029 MVIP-90 PM4351 PM6344 PM7366 PM8313 application notes txc-03361 e1 E2 e3 liu transceiver
Text: PM7366 FREEDM-8 APPLICATION NOTE PMC-971178 ISSUE 1 FRAME ENGINE AND DATA LINK MANAGER PM7366 FREEDM-8 ANSWERS TO FREQUENTLY ASKED QUESTIONS REGARDING THE FREEDM-8 ISSUE 1 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
|
Original
|
PM7366
PMC-971178
PM7366
txc-03361 application notes
97029
MVIP-90
PM4351
PM6344
PM8313
application notes txc-03361
e1 E2 e3 liu transceiver
|
PDF
|
serial number of internet manager
Abstract: PMC-970931 PM6344 PM7366 CRC-32 PM4314 PM4388 PM4314QDSX
Text: PM7366 FREEDM-8 APPLICATION NOTE PMC-970931 ISSUE 2 FRAME ENGINE AND DATA LINK MANAGER PM7366 FREEDM-8 FRAME ENGINE AND DATA LINK MANAGER TECHNICAL OVERVIEW ISSUE 2: SEPTEMBER 1997 PMC-Sierra, Inc. 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000
|
Original
|
PM7366
PMC-970931
PM7366
serial number of internet manager
PMC-970931
PM6344
CRC-32
PM4314
PM4388
PM4314QDSX
|
PDF
|
Untitled
Abstract: No abstract text available
Text: PMC-Sierra, Inc. FREEDM Technical Overview PMC-970540 ISSUE 1 Frame Engine and Data Link Manager FREEDM TM FREEDM Frame Engine and Data Link Manager Technical Overview Issue 1: June 1997 i PMC-Sierra, Inc. FREEDM Technical Overview PMC-970540 ISSUE 1 Frame Engine and Data Link Manager
|
Original
|
PMC-970540
PMC-970540
|
PDF
|
IESS 310
Abstract: IESS-309 MIL-STD-188-165 IESS-308 standard
Text: AMT 73L Modem Series DISA CERTIFIED Features • MIL-STD-188-165A CERTIFIED Data Rates 64kbps – 52Mbps in 1bps steps Optional eTPC Rates from 0.5 to 0.92 eTPC Extends data rate to 110Mbps BPSK, QPSK, OQPSK, 8PSK & 16QAM
|
Original
|
MIL-STD-188-165A
64kbps
52Mbps
110Mbps
16QAM
OM-73
40dBc
2000MHz
70/140MHz
EIA530/449,
IESS 310
IESS-309
MIL-STD-188-165
IESS-308 standard
|
PDF
|
CRC-32
Abstract: PM7364
Text: PM7364 FREEDM-32 APPLICATION NOTE PMC-970932 ISSUE 2 FRAME ENGINE AND DATA LINK MANAGER PM7364 FREEDM-32 FRAME ENGINE AND DATA LINK MANAGER TECHNICAL OVERVIEW ISSUE 2: SEPTEMBER 1997 PMC-Sierra, Inc. 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000
|
Original
|
PM7364
FREEDM-32
PMC-970932
PM7364
CRC-32
|
PDF
|
JESD204B
Abstract: No abstract text available
Text: JEDEC JESD204B An early look at the third-generation high speed serial interface for data converters Rev. 1 — 19 August 2011 White paper Document information Info Content Author s Maury Wood – NXP Semiconductors, JEDEC JESD204B task group Chairman, Caen, France; Luc Giovacchini – NXP Semiconductors, Caen,
|
Original
|
JESD204B
JESD204B
JESD204
|
PDF
|
|
infineon SAB 82532
Abstract: DSCC4
Text: P R O D U C T B R I E F Multiprotocol DMA supported Serial Communication Controller with 4 Channels The DSCC4 PEB 20534 is a multiprotocol data communication controller with four symmetrical serial channels. The DSCC4 is offering two high speed channels. Data rates up to 52 Mbit/s are
|
Original
|
B119-H7348-X-X-7600
infineon SAB 82532
DSCC4
|
PDF
|
CAB-SS-V35MT
Abstract: CAB-SS-530MT CAB-SS-X21MT CAB-SS-V35FC CAB-SS-530AMT cab-ss-232mt cisco 2901 CAB-SS-232FC NM-8A cab-ss-449fc
Text: Data Sheet Serial Connectivity Network Modules for the 2600, 3600, and 3700 Series NM-1HSSI, NM-4T, NM-4A/S, NM-8A/S, NM-16A/S, NM-16A, NM-32A The Cisco 2600, 3600, and 3700 Series offer a wide variety of serial connectivity modules to accommodate the range of application needs in customer networks. The
|
Original
|
NM-16A/S,
NM-16A,
NM-32A)
0303R)
202861/ETMG
CAB-SS-V35MT
CAB-SS-530MT
CAB-SS-X21MT
CAB-SS-V35FC
CAB-SS-530AMT
cab-ss-232mt
cisco 2901
CAB-SS-232FC
NM-8A
cab-ss-449fc
|
PDF
|
siemens family 80
Abstract: siemens sab 82532 siemens sab 82538 SIEMENS ESCC8
Text: s Product Brief DSCC4 PEB 20534 Multiprotocol DMA supported Serial Communication Controller with 4 Channels The DSCC4 PEB 20534 is a multiprotocol data communication controller with four symmetrical serial channels. The DSCC4 is offering two high speed channels.
|
Original
|
B119-H7348-X-X-7600
siemens family 80
siemens sab 82532
siemens sab 82538
SIEMENS ESCC8
|
PDF
|
JT-Q703
Abstract: mindspeed pbga 23mm hdlc M28480 Q781
Text: > Product Overview Multi-Channel HDLC controller with enhanced SS7 support The M28480 is the next generation advanced multi-channel synchronous communications controller MUSYCC that formats and de-formats 512 bi-directional high-level datalink control (HDLC) channels. MUSYCC-512 operates at Layer
|
Original
|
M28480
MUSYCC-512
M28480-BRF-001-C
M28480-11
M28480G-11
JT-Q703
mindspeed pbga 23mm
hdlc
Q781
|
PDF
|
CRC-32
Abstract: PM7364 PM7366 4388
Text: TM PM7364 FREEDM Preliminary Information 32 FRAME ENGINE AND DATA LINK MANAGER FEATURES • High density HDLC controller ideal for Internet access, Frame Relay and DSLAM equipment supporting rates ranging from 56 Kbit/s to 52 Mbit/s. • Supports 32 full-duplex and
|
Original
|
PM7364
DM-32
FREEDM-32
PMC-960952
CRC-32
PM7366
4388
|
PDF
|
hdlc
Abstract: CRC-32 PM4314 PM4388 PM6388 PM7346 PM7364 PM7366 quad channel relay board
Text: PM7366 FREEDM-8 PMC-Sierra,Inc. Frame Engine and Datalink Manager FEATURES • High density HDLC controller ideal for Internet access, Frame Relay, and DSLAM equipment supporting rates ranging from 56 Kbit/s to 52 Mbit/s. • Supports eight full-duplex and
|
Original
|
PM7366
16byte
PM7346
PMC-970532
FREEDM-32,
hdlc
CRC-32
PM4314
PM4388
PM6388
PM7346
PM7364
PM7366
quad channel relay board
|
PDF
|
24 port liu
Abstract: hdlc CRC-32 PM4314 PM4388 PM6388 PM7364 PM7366 PM8313 quad channel relay board
Text: PM7364 FREEDM-32 PMC-Sierra,Inc. Frame Engine and Datalink Manager FEATURES • High density HDLC controller ideal for Internet access, Frame Relay, and DSLAM equipment supporting rates ranging from 56 Kbit/s to 52 Mbit/s. • Supports 32 full-duplex and independently-timed links.
|
Original
|
PM7364
FREEDM-32
16byte
PM4388
PMC-960952
FREEDM-32,
24 port liu
hdlc
CRC-32
PM4314
PM4388
PM6388
PM7364
PM7366
PM8313
quad channel relay board
|
PDF
|
Untitled
Abstract: No abstract text available
Text: PM PM7366 FREEDM-8 PMC-Sierra,Inc. Frame Engine and Datalink Manager FEATURES High density HDLC controller ideal for Internet access, Frame Relay, and DSLAM equipment supporting rates ranging from 56 Kbit/s to 52 Mbit/s. Supports eight full-duplex and independently-timed links.
|
OCR Scan
|
PM7366
16byte
|
PDF
|
Untitled
Abstract: No abstract text available
Text: PM7366 PMC-Sierra, Inc. Preliminary Information FEATURES High density HDLC controller ideal for The maximum aggregate clock rate is Supports scatter-gather capabilities Internet access, Frame Relay and DSLAM equipment supporting rates ranging from 56 Kbit/s to 52 Mbit/s.
|
OCR Scan
|
PM7366
C-970532
PM7366
C-970532
|
PDF
|
Untitled
Abstract: No abstract text available
Text: PMC-Sierra, Inc. PM7364 F r e e d m Preliminary Information 32 • F R A M E E N G IN E A N D DATA LIN K M A N A G E FEATURES High density HDLC controller ideal for Internet access, Frame Relay and DSLAM equipm ent supporting rates ranging from 56 Kbit/s to 52 Mbit/s.
|
OCR Scan
|
PM7364
C-960952
|
PDF
|