LT 543 IC pin diagram
Abstract: IC SRAM 8K X 8 microprocessor 80386 pin out diagram
Text: M IC R O N 1 MT56C0818 8K x 18, DUAL 4K x 18 CACHE DATA SRAM T CACHE DATA SRAM SINGLE 8K x18 SRAM, DUAL4 K x 18 SRAM CONFIGURABLE CACHE DATA SRAM FEATURES • Operates as two 4K x 18 SRAMs with common addresses and data; also configurable as a single 8K x 18 SRAM
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MT56C0818
52-Pin
MT56C081B
LT 543 IC pin diagram
IC SRAM 8K X 8
microprocessor 80386 pin out diagram
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Untitled
Abstract: No abstract text available
Text: MT56C3818 8K x 18, DUAL 4K x 18 CACHE DATA SRAM M IC R O N CACHE DATA SRAM SINGLE 8Kx18 SRAM, DUAL 4KX18SRAM CONFIGURABLE CACHE DATA SRAM FEATURES • Operates as two 4K x 18 SRAMs with common addresses and data; also configurable as a single 8K x 18 SRAM
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MT56C3818
8Kx18
4KX18SRAM
A0-A12)
52-Pin
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74LS373 PIN CONFIGURATION AND SPECIFICATIONS
Abstract: intel 80386
Text: MT56C3816 8K x 16, DUAL 4K x 16 CACHE DATA SRAM M IC R O N SINGLE 8Kx 16 SRAM, DUAL 4Kx16 SRAM CACHE DATA SRAM CONFIGURABLE CACHE DATA SRAM FEATURES • Operates as two 4K x 16 SRAMs with common addresses and data; also configurable as a single 8K x 16 SRAM
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MT56C3816
A0-A12)
4Kx16
52-PIn
S1993,
74LS373 PIN CONFIGURATION AND SPECIFICATIONS
intel 80386
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a12w
Abstract: 74LS373 PIN CONFIGURATION AND SPECIFICATIONS
Text: M IC R O N MT56C0818 DUAL 4 K x 1 8 SRAM, SINGLE 8K x 18 SRAM CACHE DATA SRAM CONFIGURABLE CACHE DATA SRAM FEATURES • Operates as two 4K x 18 SRAM s with common ad dresses and data; also configurable as a single 8K x 18 SRAM • Built-in input ad dress latches
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MT56C0818
52-Pin
MT56C0B18
a12w
74LS373 PIN CONFIGURATION AND SPECIFICATIONS
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i1991
Abstract: intel 80386 pin diagram
Text: PRELIMINARY |U |IC R O N M T 56C 3816 C A C H E D ATA QPAM 4K x 16 s r a m , SINGLE 8K x 16 SRAM O riM IV I CONFIGURABLE CACHE DATA SRAM dual FEATURES • Operates as two 4K x 16 SRAMs with common addresses and data; also configurable as a single 8K x 16 SRAM
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A0-A12)
52-pin
T56C3816
MT56C3B16
i1991
intel 80386 pin diagram
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Untitled
Abstract: No abstract text available
Text: MICRON TECHNOLOGY INC SSE ]> • b l l l S M T GQQSb4S Ö7Ü « f l R N MT5C6408 883C 8K X 8 SRAM I^ IC R Ü N . *—T"- Li i_-7 1 _1 " MILITARY SRAM 8K X 8 SRAM • • • • PIN ASSIGNMENT Top View) SMD 5962-38294, Class M JAN 5962-38294, Class B
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MT5C6408
MIL-STD-883,
28-Pin
C-11A)
MIL-STD-883
T5C6409883C
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Untitled
Abstract: No abstract text available
Text: niCRON TECHNOLOGY INC 5SE D blllSMT 0 0 0 3 4 l4fl “133 I^ IC R O N 8K urn M T5C 6408 X 8 S R AM •4 > -Z V I2 _ SRAM 8K X 8 SRAM • High speed: 8*, 10,12,15,20 and 25ns • High-performance, low-power, CMOS double-metal process • Single +5V ±10% power supply
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28-Pin
Q0G3455
MT5C6408
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PDF
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pin diagram of IC 74LS373
Abstract: No abstract text available
Text: M IC R O N MT56C0816 CACHE DATA SRAM DUAL 4Kx16 SRAM, SINGLE 8Kx16 SRAM CONFIGURABLE CACHE DATA SR A M FEATURES • O perates as two 4K x 16 SRAM s with common ad dresses and data; also configurable as a single 8K x 16 SRAM • Built-in input ad dress latches
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MT56C0816
4Kx16
8Kx16
52-Pin
MT56C
pin diagram of IC 74LS373
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Untitled
Abstract: No abstract text available
Text: H IG H SPEED 8K X 16 C M O S S R AM P G A M O D U L E PRELIMINARY DESCRIPTION: The DPS8X16A is a 40-pin Pin G rid Array PGA consisting o f tw o 8K X 8 SRAM devices in ceram ic LCC packages surface m o u n te d on a co-fired ceram ic substrate w ith m atched thermal coefficients.
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DPS8X16A
40-pin
150ns
A0-A12
30A05000
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Untitled
Abstract: No abstract text available
Text: □PM DPS832V Dense-Pac Microsystems, I n a , CMOS SRAM VERSAPAC MODULE DESCRIPTION: The DPS832V is a 66-pin Pin Grid Array PGA consisting of four 8K X 8 SRAM devices in ceramic LC C packages surface mounted on a co-fired ceram ic substrate with m atching thermal
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DPS832V
DPS832V
66-pin
128KX32
256KX32
16Kx16.
A014-13
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Untitled
Abstract: No abstract text available
Text: ADVANCE M I IC n D N 25 6 K x 1 8 / 1 2 8K x 36 LVTTL, F L O W - T H R O U G H LATE WRITE SRAM MT59L256L18F MT59L128L36F 4.5Mb LATE WRITE SRAM Dual Clock and Single Clock FEATURES * * * * * * * * * * * * * * * * * Fast cycle tim es 5ns, 6ns and 7ns 256K x 18 or 128K x 36 configurations
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MT59L256L18F
MT59L128L36F
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80486 microprocessor pin out diagram
Abstract: No abstract text available
Text: M IC R O N I l l 1“ 1 M T 56C 3818 8 K x 18, D U A L 4K x 18 C A C H E D A T A S R AM C A C H E DATA single c D U A L 4 K x 18 SRAM d a m O r lM IV I 8K x 18 sram , CONFIGURABLE CACHE DATA SRAM FEATURES PIN ASSIGNMENT Top View • Operates as two 4K x 18 SRAMs with common
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52-Pin
A0-A12)
MT56C3818
80486 microprocessor pin out diagram
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Untitled
Abstract: No abstract text available
Text: DPS832V Dense-Pac Microsystems, Inc. ^ CMOS SRAM VERSAPAC MODULE DESCRIPTION: The DPS832V is a 66-pin Pin Grid Array PGA consisting of four 8K X 8 SRAM devices in ceramic LCC packages surface mounted on a co-fired c e ra m ic su b stra te w ith m a tc h in g th erm al
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DPS832V
DPS832V
66-pin
128KX32
256KX32
30A014-13
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DP6116
Abstract: 64k Static RAM 2015 static ram DP thermocompression 8808a DSP-88 DP611 1450001
Text: d>r i J 005403 Dpm DPS8808> DPS8808A 8K 8 Dense-Pac Microsystems, Inc. CM OS SRAM X D ESC R IP T IO N : T h e DPS8808 A>85, -120, -150, -200 is an 8K by 8 bit high speed static R A M co nstructed on a ce ra m ic substrate using 4 DP6116 (2,048 X 8 static R A M s in leadless chip carriers Fu nctio n al
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DPS8808,
DPS8808A
DPS8808
DP6116
DPS8808A
DP6116
64k Static RAM
2015 static ram
DP thermocompression
8808a
DSP-88
DP611
1450001
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8k*8sram
Abstract: No abstract text available
Text: Electronic Designs Inc. EDH88H08C-55/70/10 MILITARY BP* & •-*>* • 8K x 8 SRAM CMOS T h e EDH88H08C 8K x 8 is p a rt o f a new fa m ily o f H igh Speed S tatic RAM devices developed b y E lectronic Designs Inc. T h e EDH88H08C uses the advanced EDI M EM OR YPAC K packaging conce p t w h ic h m o un ts several LCC
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EDH88H08C-55/70/10
EDH88H08C
EDH88H08C
8k*8sram
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Untitled
Abstract: No abstract text available
Text: T em ic HM 65764 MATRA MHS 8K x 8 High Speed CMOS SRAM Description The HM 65764 is a high speed CMOS static RAM organized as 8192x8 bits. It is manufactured using MHS high performance CMOS technology. Access times as fast as 15 ns are available with maximum
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8192x8
b04Sb
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Untitled
Abstract: No abstract text available
Text: ^ Dense-Pac Microsystems, I n c ^ ^ ^ DPS8X16A H |C H s p EEp ^ x 16 C M O S SR A M P G A M O D U L E PRELIMINARY DESCRIPTION: The DPS8X16A is a 40-pin Pin Grid Array P G A consisting of two 8K X 8 SRAM devices in ceram ic LC C packages surface mounted on a co-fired ceram ic
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DPS8X16A
DPS8X16A
40-pin
150ns
S8X16
100ns
120ns
32KX16
30A050-00
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Untitled
Abstract: No abstract text available
Text: T e m ic MATRA MHS_HM 65764 8K x 8 High Speed CMOS SRAM Description The HM 65764 is a high speed CMOS static RAM organized as 8192x8 bits. It is manufactured using MHS high performance CMOS technology. Access times as fast as 15 ns are available with maximum
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8192x8
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PDF
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY M I IC R O N M T4 L S 1 2 8 3 2R 12 8K X 3 2 SR A M M O D U L E 128Kx 32 SRAM SRAM MODULE LOW VOLTAGE FEATURES • High speed: 15,20 and 25ns • High-density 512KB design • High-performance, low-power, CMOS double-metal process • Single +3.3V ±0.3V power supply
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12832R
512KB
256Kx
128Kx
64-Pin
MT4LS12832RM-15
MT4LS12832R
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t19l
Abstract: mt5C6408
Text: [M IC R O N MT5C6408 SRAM 8K X 8 SRAM • High speed: 8 ,1 0 ,1 2 , 15, 20, 25 and 35ns • H igh-perform ance, low -pow er, CM O S double-m etal process • Single +5V ±10% pow er supply • Easy m em ory expansion w ith CE1, CE2 and OE options • All inputs and outputs are TTL com patible
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MT5C6408
28-Pin
MT5C6406
t19l
mt5C6408
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PDF
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Untitled
Abstract: No abstract text available
Text: DS12250/E DALLAS DS1225D/E 64K Nonvolatile SRAM s e m ic o n d u c to r PIN ASSIGNMENT FEATURES • Data retention in the absence of Vcc • Data is automatically protected during power loss • Directly replaces 8K EEPROM x 8 volatile static RAM or • Low-power CMOS
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DS12250/E
DS1225D/E
28-pin
S1225D
28-PIN
010TNA
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PDF
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1117hm
Abstract: SMD-5962-38294
Text: T em ic HM 65764 S emi co nd uc t or s 8K X 8 High Speed CMOS SRAM Short description. Please refer to the full datasheet available on TEMIC web for detailed technical information. Description The HM 65764 is a high speed CMOS static RAM organized as 8192x8 bits. It is manufactured using
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8192x8
SMD5962-382941
1117hm
SMD-5962-38294
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PDF
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MATRA
Abstract: No abstract text available
Text: Te m ic HM 65764 MATRA MHS 8K x 8 High Speed CMOS SRAM Description The HM 65764 is a high speed CMOS static RAM organized as 8192x8 bits. It is manufactured using MHS high performance CMOS technology. Access times as fast as 15 ns are available with maximum power consumption of only 743 mW.
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8192x8
MATRA
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Untitled
Abstract: No abstract text available
Text: D S 1225AB/AD DALLAS DS1225AB/AD 64K Nonvolatile SRAM s e m ic o n d u c t o r FEATURES PIN ASSIGNMENT • 10 years minimum data retention in the absence of external power NC | i A12 | 2 • Data is automatically protected during power loss • Directly replaces 8K x 8 volatile static RAM or
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1225AB/AD
28-pin
l4130
DS1225AB/AD
28-PIN
2bl4130
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