am29ma16
Abstract: AM29M16 AM29M16 PLD atmel 404 93c46 29f512 gal18v8 ATMEL 24C32A COP8622C atmel 93C46 AT27040
Text: Ironwood Electronics Programming Adapters PR.1 Programming Adapters allow the programming of PROM, PLD, EPROM, EEPROM or PAL devices on programmers or ATE equipment with DIP sockets. We support PLCC, LCC, PGA, SOIC including TSOP , FP, BGA and QFP packages.
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Untitled
Abstract: No abstract text available
Text: Commercial/Industrial PA7572 PEEL Array Programmable Electrically Erasable Logic Array CMOS Electrically Erasable Technology - Reprogrammable in 40-pin DIP, 44-pin PLCC and TQFP packages Versatile Logic Array Architecture - 24 I/Os, 14 inputs, 60 registers/latches
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PA7572
13ns/20ns
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PDF
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Untitled
Abstract: No abstract text available
Text: Commercial/Industrial PA7572 PEEL Array Programmable Electrically Erasable Logic Array CMOS Electrically Erasable Technology - Reprogrammable in 40-pin DIP, 44-pin PLCC and TQFP packages Versatile Logic Array Architecture - 24 I/Os, 14 inputs, 60 registers/latches
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PA7572
13ns/20ns
4-02-050A
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PDF
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TLO 81
Abstract: 16009A ICT Peel 26V12 PA7536 ma706
Text: Commercial/Industrial PA7536 PEEL Array Programmable Electrically Erasable Logic Array CMOS Electrically Erasable Technology - Reprogrammable in 28-pin DIP, SOIC and PLCC packages Versatile Logic Array Architecture - 12 I/Os, 14 inputs, 36 registers/latches
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PA7536
28-pin
04-02-052D
TLO 81
16009A
ICT Peel
26V12
ma706
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PDF
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ICT Peel
Abstract: PA7572
Text: Commercial/Industrial PA7572 PEEL Array Programmable Electrically Erasable Logic Array CMOS Electrically Erasable Technology - Reprogrammable in 40-pin DIP, 44-pin PLCC and TQFP packages Flexible Logic Cell - Up to 3 output functions per logic cell - D,T and JK registers with special features
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Original
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PA7572
40-pin
44-pin
4-02-050A
ICT Peel
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PDF
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"Programmable Electrically Erasable Logic Array"
Abstract: PA7024P-15 TLC 555 EP610 GAL6002 LCC14 PA7024 PA7024J-15 EP610 ORDERING ICT 20 PIN PLCC
Text: Commercial/ Industrial PA7024 PA7024 PEELTM Array Programmable Electrically Erasable Logic Array Features • CMOS Electrically Erasable Technology - Reprogrammable in 24-pin DIP, SOIC and 28-pin PLCC packages -Optional JN package for 22V10 power/ground compatibility
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PA7024
PA7024
24-pin
28-pin
22V10
PA7024P-15
PA7024J-15
10/15ns
PA7024JN-15
"Programmable Electrically Erasable Logic Array"
PA7024P-15
TLC 555
EP610
GAL6002
LCC14
PA7024J-15
EP610 ORDERING
ICT 20 PIN PLCC
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PDF
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Untitled
Abstract: No abstract text available
Text: September 1994 Commercial Preliminary INC. PEEL 20V8 -15/-25 CMOS Programmable Electrically Erasable Logic Features Compatible with Popular 20V8 Devices — 20V8 socket and function compatible — Programs with standard 20V8 JEDEC file — 24-pin DIP/SOIC, 28-pin PLCC packages
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OCR Scan
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24-pin
28-pin
2400bps,
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PDF
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Untitled
Abstract: No abstract text available
Text: Commercial/ Industrial INC. TM PA7140 PEEL Array Programmable Electrically Erasable Logic Array Features I CMOS Electrically Erasable Technology - Reprogrammable in 40-pin DIP and 44-pin PLCC packages I Versatile Logic Array Architecture - 24 l/Os, 14 inputs, 60 registers/latches
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OCR Scan
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PA7140
40-pin
44-pin
13ns/2Plastic
28-Pin
004-J
0G01bfi3
0001bfl4
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PDF
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Untitled
Abstract: No abstract text available
Text: ¡ET Preliminary Commercial INC. PEEL 20V8 -5/-7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Features Compatible with Popular 20V8 Devices — 20V8 socket and function compatible — Programs with standard 20V8 JEDEC file — 24-pin DIP/SOIC, 28-pin PLCC packages
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OCR Scan
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24-pin
28-pin
0G01bfi3
40-Pin
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PDF
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Untitled
Abstract: No abstract text available
Text: July, 1994 INC. Commercial PA7128 PEEL Array Programmable Electrically Erasable Logic Array Features • CMOS Electrically Erasable Technology - Reprogrammable in 28-pin DIP, SOIC, and PLCC packages ■ High-Speed, Moderate Power Consumption - As fast as 9ns/15ns tpdi/tpdx , 83.3MHz fmax
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OCR Scan
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PA7128
28-pin
9ns/15ns
Compa17.
PA7128-1
PA7128-15.
PA7128-2
PA7128-20.
25MHz,
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PDF
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Untitled
Abstract: No abstract text available
Text: July, 1994 Industrial PA7128I PEEL Array Programmable Electrically Erasable Logic Array Features • Industrial Grade Specifications - Vcc = 4.5V to 5.5V, TA = -40 to +85°C - Reprogrammable 28-pin DIP, SOIC, and 28-pin PLCC packages ■ High-Speed, Moderate Power Consumption
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OCR Scan
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PA7128I
28-pin
12ns/20ns
105mA
PA7128I-2
PA7128I-20.
25MHz,
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PDF
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Untitled
Abstract: No abstract text available
Text: July, 1994 INC. Commercial PA7140 PEEL Array Programmable Electrically Erasable Logic Array Features • CMOS Electrically Erasable Technology ■ High-Speed, Moderate Power Consumption - Reprogrammable in 40-pin DIP and 44-pin PLCC packages - As fast as 13ns/20ns tpdi/tpd , 66.6MHz fmax
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OCR Scan
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PA7140
40-pin
44-pin
13ns/20ns
100mA
PA7140-1
PA7140-20.
PA7140-2
PA7140-25.
25MHz,
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PDF
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Untitled
Abstract: No abstract text available
Text: Industrial INC. TM PA7024I PEEL Array Programmable Electrically Erasable Logic Array Features • Industrial Grade Specifications I High-Speed, Moderate Power Consumption - Vcc = 4.5V to 5.5V, TA = -40°C to +85°C - Reprogrammable 24-pin DIP, SOIC, and 28-pin PLCC packages
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OCR Scan
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PA7024I
24-pin
28-pin
17ns/25ns
155mA
PA7024-2
PA7024I-20.
25MHz,
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PDF
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Untitled
Abstract: No abstract text available
Text: July, 1994 INC. Industrial TM PA7128I PEEL Array Programmable Electrically Erasable Logic Array Features I Industrial Grade Specifications - Vcc = 4.5V to 5.5V, TA = -40 to +85=C - Reprogrammable 28-pin DIP, SOIC, and 28-pin PLCC packages • High-Speed, Moderate Power Consumption
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OCR Scan
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PA7128I
28-pin
12ns/20ns
105mA
10-bit
000151e
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PDF
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Untitled
Abstract: No abstract text available
Text: July, 1994 INC. Commercial TM PA7128 PEEL Array Programmable Electrically Erasable Logic Array Features • CMOS Electrically Erasable Technology - Reprogrammable in 28-pin DIP, SOIC, and PLCC packages I High-Speed, Moderate Power Consumption - As fast as 9ns/15ns tpdi/tpdx , 83.3MHz fmax
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OCR Scan
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PA7128
28-pin
9ns/15ns
PA7128-1
PA7128-15.
PA7128-2
PA7128-20.
25MHz,
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PDF
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Untitled
Abstract: No abstract text available
Text: l ^ = • INC. PEEL 16V8 Data Sheet October 1994 4Ô4G7Q7 00014b5 ^50 ■ [ [U Advanced Designation The "Advanced” designation on an ICT data sheet indicates that the product is not yet ready for release. The specifications are subject to change, are based on design goals or preliminary part evaluation, and
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OCR Scan
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00014b5
EEL22CV10A
PEEL22V10AZ
D0D147b
PEEL16V8
PEEL20CG10A
16V8s
20-pin
24-pin
22V10s,
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PDF
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PEEL22V10AZ
Abstract: No abstract text available
Text: September 1994 Preliminary Commercial INC. TM . PEEL 22V10AZ -15/-25 CMOS Programmable Electrically Erasable Logic Device Features Ultra Low Power — Ice = 25p.A typical at standby — Icc = 3.5mA (typical) at 1MHz — tpD = 15ns and 25ns versions • Architectural Flexibility
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OCR Scan
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22V10AZ
24-pin
28-pin
2400bps,
PEEL22V10AZ
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PDF
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7024S15
Abstract: No abstract text available
Text: Commercial/ Industrial INC. TM PA7024 PEEL Array Programmable Electrically Erasable Logic Array Features I CMOS Electrically Erasable Technology I High-Speed Commercial and Industrial Versions - Reprogrammable in 24-pin DIP, SOIC, and 28-pin PLCC packages
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OCR Scan
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PA7024
24-pin
28-pin
10ns/15ns
rando/20ns
PA7024JN-20
13/20ns
7024S-20
7024S15
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PDF
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22CV10AP
Abstract: 22cv10 nte quick cross ict peel 18CV8J palce programmer schematic blackjack vhdl code PA7140J-20 INTEL PLD910 PALCE610
Text: Data Book General Information PEEL Arrays PEEL Devices Special Products and Services Development Tools Application Notes and Reports Package Information PLACE Users Manual_ Introduction to PLACE PLACE Installation Getting Started with PLACE Operation Reference Guide
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TLC 555
Abstract: ICT Peel
Text: Commercial/ Industrial INC. PA7128 PEEL Array Programmable Electrically Erasable Logic Array Features CMOS Electrically Erasable Technology High-Speed Commercial and Industrial Versions - Reprogrammable in 28-pin DIP, SOIC and PLCC packages - As fast as 9ns/15ns tpdi/tpdx , 83.3M Hz (fMAX)
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OCR Scan
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PA7128
28-pin
9ns/15ns
25MHz,
04-02-027D
PA7128
PA7128P-15
PA7128J-15
PA7128S-15
PA7128P-20
TLC 555
ICT Peel
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PDF
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Untitled
Abstract: No abstract text available
Text: Preliminary Commercial PEEL 18LV8Z-25 CMOS Programmable Electrically Erasable Logic Device FEATURES • Low Voltage, Ultra Low Power Operation - Vcc = 2.7 to 3.6 V - Icc =25 uA typical at standby - Icc = 2 mA (typical) at 1 MHz - Meets JEDEC LV Interface Spec (JESD8-A)
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OCR Scan
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18LV8Z-25
20-Pin
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PDF
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Untitled
Abstract: No abstract text available
Text: Commercial INC. TM PA7128 PEEL Array Programmable Electrically Erasable Logic Array Features I CMOS Electrically Erasable Technology - Reprogrammable in 28-pin DIP, SOIC, and PLCC packages I High-Speed, Moderate Power Consumption - As fast as 9ns/15ns tpdi/tpdx , 76.9MHz fmax
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OCR Scan
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PA7128
28-pin
9ns/15ns
135mA
PA7128-1
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PDF
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Untitled
Abstract: No abstract text available
Text: Preliminary Commercial IN C . PEEL 22CV1 OAZ -15/-25 CMOS Programmable Electrically Erasable Logic Device Features Architectural Flexibility — 133 product term x 44 input AND array — Up to 22 inputs and 10 I/O pins — 12 possible macrocell configurations
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OCR Scan
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22CV1
24-pin
28-pin
25jiA
0G01bfi3
40-Pin
0001bfl4
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PDF
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Untitled
Abstract: No abstract text available
Text: Commercial/ Industrial INC. TM PA7128 PEEL Array Programmable Electrically Erasable Logic Array Features • CMOS Electrically Erasable Technology - Reprogrammable in 28-pin DIP, SOIC, and PLCC packages I Versatile Logic Array Architecture - 12 l/Os, 14 inputs, 36 registers/latches
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OCR Scan
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PA7128
28-pin
9ns/19.
25MHz,
9/15ns
12/20ns
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PDF
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