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    IEEE 802.3 CLAUSE 27 Search Results

    IEEE 802.3 CLAUSE 27 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    LBAA0QB1SJ-295 Murata Manufacturing Co Ltd SX1262 MODULE WITH OPEN MCU Visit Murata Manufacturing Co Ltd
    GRM-KIT-OVER100-DE-D Murata Manufacturing Co Ltd 0805-1210 over100uF Cap Kit Visit Murata Manufacturing Co Ltd
    LBUA5QJ2AB-828 Murata Manufacturing Co Ltd QORVO UWB MODULE Visit Murata Manufacturing Co Ltd
    LXMSJZNCMH-225 Murata Manufacturing Co Ltd Ultra small RAIN RFID chip tag Visit Murata Manufacturing Co Ltd
    LXMS21NCMH-230 Murata Manufacturing Co Ltd Ultra small RAIN RFID chip tag Visit Murata Manufacturing Co Ltd

    IEEE 802.3 CLAUSE 27 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    mtd981a

    Abstract: 100BASE-FX NC12 NC13 "clock collision" nrzi circuit diagram MLT-3 NC19 "network interface cards"
    Text: MTD981A MYSON TECHNOLOGY 10/100 Ethernet Transceiver FEATURES • · · · · · · · · 10BASE-T, 100BASE-TX, and 100BASE-FX IEEE-802.3 compliant transmit and receive functions IEEE 802.3u Clause 28 compliant Auto-Negotiation function Full duplex operation capable


    Original     		PDF MTD981A 10BASE-T, 100BASE-TX, 100BASE-FX IEEE-802 100-pin MTD981A MTD981AG My3045 NC12 NC13 "clock collision" nrzi circuit diagram MLT-3 NC19 "network interface cards"

    sgmii xilinx

    Abstract: traffic light controller vhdl coding sgmii sfp virtex IEEE 802.3 Clause 38 vhdl code for ethernet mac spartan 3 ENG-46158 1000BASE-X IEEE 802.3 Clause 39 VHDL code for traffic light controller sgmii mode sfp
    Text: Ethernet 1000BASE-X PCS/PMA or SGMII v10.2 DS264 June 24, 2009 Product Specification Introduction LogiCORE IP Facts Core Specifics The LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII core provides a flexible solution for connection to an Ethernet Media Access Controller MAC or


    Original     		PDF 1000BASE-X DS264 1000BASE-X ENG-46158) sgmii xilinx traffic light controller vhdl coding sgmii sfp virtex IEEE 802.3 Clause 38 vhdl code for ethernet mac spartan 3 ENG-46158 IEEE 802.3 Clause 39 VHDL code for traffic light controller sgmii mode sfp

    ENG-46158

    Abstract: verilog hdl code for traffic light control traffic light controller vhdl coding IEEE 802.3 Clause 38 vhdl code for ethernet mac spartan 3 verilog coding using instantiations 1000BASE-X sgmii xilinx 1000BASE-LX GTX 460
    Text: Ethernet 1000BASE-X PCS/PMA or SGMII v10.3 DS264 September 16, 2009 Product Specification Introduction LogiCORE IP Facts Core Specifics The LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII core provides a flexible solution for connection to an Ethernet Media Access Controller MAC or


    Original     		PDF 1000BASE-X DS264 1000BASE-X ENG-46158 verilog hdl code for traffic light control traffic light controller vhdl coding IEEE 802.3 Clause 38 vhdl code for ethernet mac spartan 3 verilog coding using instantiations sgmii xilinx 1000BASE-LX GTX 460

    AFBR-703ASDZ

    Abstract: IEC-61000-4-2 RIN12OMA SDD11 SFF-8431 10G SFP SCD11 042UI PRBS31
    Text: AFBR-703ASDZ 850nm Digital Diagnostic SFP+ Transceiver for 10Gb Ethernet 10GBASE-SR Characterization Report Description The AFBR-703ASDZ optical transceivers are reduced cost SFP+ 10 Gigabit Ethernet 10GBASE-SR modules for use on multimode fiber. • Receiver Rise and Fall Times RX TR and RX TF


    Original     		PDF AFBR-703ASDZ 850nm 10GBASE-SR AFBR-703ASDZ 10GBASE-SR SFF-8431 SDD22 SCC22) AV02-1900EN IEC-61000-4-2 RIN12OMA SDD11 10G SFP SCD11 042UI PRBS31

    AFBR-703SDZ

    Abstract: IEC-61000-4-2 RIN12OMA SDD11 SFF-8431 10G SFP PRBS31
    Text: AFBR-703SDZ 850nm Digital Diagnostic SFP+ Transceiver for 10Gb Ethernet 10GBASE-SR Characterization Report Description The AFBR-703SDZ optical transceivers are reduced cost SFP+ 10 Gigabit Ethernet 10GBASE-SR modules for use on multimode fiber. • Receiver Rise and Fall Times RX TR and RX TF


    Original     		PDF AFBR-703SDZ 850nm 10GBASE-SR AFBR-703SDZ 10GBASE-SR SFF-8431 SDD22 SCC22) AV02-1899EN IEC-61000-4-2 RIN12OMA SDD11 10G SFP PRBS31

    the RMII Consortium Specification

    Abstract: LC10 LC100 LS10 LS100 LU3X36FTR PN99-054LAN RMII Consortium
    Text: Product Brief March 1999 LU3X36FTR HEX-FET Fast Ethernet Transceiver for 10Base-T/100Base-TX/FX Overview The LU3X36FTR is a six-channel, single-chip complete transceiver designed specifically for dual-speed 10Base-T, 100Base-TX, and 100Base-FX switches and repeaters. It supports simultaneous operation in


    Original     		PDF LU3X36FTR 10Base-T/100Base-TX/FX LU3X36FTR 10Base-T, 100Base-TX, 100Base-FX 100Base-FX. the RMII Consortium Specification LC10 LC100 LS10 LS100 PN99-054LAN RMII Consortium

    10GBASE-T

    Abstract: RJ45 LAN port of motherboard CAT7 cables sgmii switch LDPC encoder APM96895 MACsec APM9689x 10gb RJ45 SMALL
    Text: Triveni Dual/Quad Port 10GBASE-T PHY PREL I M IN ARY PRO DU CT BRI EF The Triveni APM9689x family includes integrated dual and quad port PHYs supporting IEEE 802.3 10GBASE-T operation. Based on 40nm process technology and a state-of-the-art programmable DSP engine, the device is designed to


    Original     		PDF 10GBASE-T APM9689x RJ45 LAN port of motherboard CAT7 cables sgmii switch LDPC encoder APM96895 MACsec 10gb RJ45 SMALL

    ENG-46158

    Abstract: clause 37 AN3869 IEEE 802.3 Clause 27 eTSEC GMII Initial "IEEE 802.3" "Clause 27" RGMII to SGMII PHY sgmii specification ieee sgmii MPC8544
    Text: Freescale Semiconductor Application Note Document Number: AN3869 Rev. 0, 06/2009 Implementing SGMII Interfaces on the PowerQUICC III by 1 Networking and Multimedia Group Freescale Semiconductor, Inc. Austin, TX Introduction SGMII is a serial interface for gigabit Ethernet that replaces


    Original     		PDF AN3869 ENG-46158 clause 37 AN3869 IEEE 802.3 Clause 27 eTSEC GMII Initial "IEEE 802.3" "Clause 27" RGMII to SGMII PHY sgmii specification ieee sgmii MPC8544

    EMAC

    Abstract: MC9S12NE64 usb serial AN2692 HCS12 MC9S12NE64 MC9S12NE64-Family IEEE Standard 803.2 10Broad36 "controller area network" bus IEEE 802.3 Clause 4
    Text: Freescale Semiconductor Application Note AN2692 Rev. 0.2, 9/2004 MC9S12NE64 Integrated Ethernet Controller By Steven Torres 8/16 Bit System Engineering Austin, Texas Introduction Ethernet connectivity of embedded devices is a growing trend in industrial and consumer applications.


    Original     		PDF AN2692 MC9S12NE64 EMAC MC9S12NE64 usb serial AN2692 HCS12 MC9S12NE64-Family IEEE Standard 803.2 10Broad36 "controller area network" bus IEEE 802.3 Clause 4

    MDIO

    Abstract: MDIO clause 45 MDIO communication protocol MDIO clause 22 i2c software program visual i2c Serial communication I2C in USB-MPC-KIT
    Text: USB-MPC-KIT USB-MPC-KIT Let your PC Talk I2C & MDIO This Windows-based USB to Multi-Protocol Converter provides multiple communications capabilities supporting: I2C & MDIO. The USB-MPC product makes it easy to work with and develop with these interfaces. USB-MPC


    Original     		PDF 30-day MDIO MDIO clause 45 MDIO communication protocol MDIO clause 22 i2c software program visual i2c Serial communication I2C in USB-MPC-KIT

    the RMII Consortium Specification

    Abstract: IEEE 802.3 10BaseT RMII Consortium
    Text: 84221 84221 Quad 100BaseTX/10BaseT Physical Layer Device PRELIMINARY 99191 This document is an LSI Logic document. Any reference to SEEQ Technology should be considered LSI Logic. Note: Check for latest Data Sheet revision before starting any designs. SEEQ Data Sheets are now on the Web, access


    Original     		PDF 100BaseTX/10BaseT MD400184/A QQ84220 the RMII Consortium Specification IEEE 802.3 10BaseT RMII Consortium

    the RMII Consortium Specification

    Abstract: Mlt-3 LED1044 ST6179 4B5B decoder 842.21 ua 7809 10BT F840 LINK100
    Text: 84221 84221 Quad 100BaseTX/10BaseT Physical Layer Device PRELIMINARY 99191 Features Note: Check for latest Data Sheet revision before starting any designs. • Single Chip 100BaseTX/10BaseT Physical Layer Solution SEEQ Data Sheets are now on the Web, at www.lsilogic.com


    Original     		PDF 100BaseTX/10BaseT MD400184/A QQ84220 the RMII Consortium Specification Mlt-3 LED1044 ST6179 4B5B decoder 842.21 ua 7809 10BT F840 LINK100

    the RMII Consortium Specification

    Abstract: 4B5B decoder 84221 RMII Consortium
    Text: 84221 84221 Quad 100BaseTX/FX/10BaseT Physical Layer Device Technology Incorporated PRELIMINARY June 15, 1999 Note: Check for latest Data Sheet revision before starting any designs. Call SEEQ Technology 510 226-2903 —or— SEEQ Data Sheets are now on the Web, access


    Original     		PDF 100BaseTX/FX/10BaseT 100BaseTX/100BaseFX/10BaseT Base-TX/FX10 MD400184/­ QQ84220 the RMII Consortium Specification 4B5B decoder 84221 RMII Consortium

    80225

    Abstract: NQ80225 LSI 80225 10BASET LINK100 LED VOLT RXCLK16
    Text: 80225 80225 10/100 MbpsTX/10BT Ethernet Physical Layer Device PHY 99025 Features Note: Check for latest Data Sheet revision before starting any designs. • Single Chip 100Base-TX /10Base-T Physical Layer Solution SEEQ Data Sheets are now on the Web, at


    Original     		PDF MbpsTX/10BT 100Base-TX /10Base-T NQ80225 NQ80220 MD400182/A 80225 NQ80225 LSI 80225 10BASET LINK100 LED VOLT RXCLK16

    IP1000A

    Abstract: 93C46 LINK1000N LINK100N IP1000 1000Base-X 303112
    Text: IP1000A LF Preliminary Data Sheet Gigabit Ethernet NIC Single Chip – – – – – Features PCI & DMA Features – PCI Specification Revision 2.3 compliant – 32-bit, 33/66MHz bus master capability – Efficient DMA operation maximizes PCI band-width utilization


    Original     		PDF IP1000A 32-bit, 33/66MHz 93C46 128-pin IP1000A LINK1000N LINK100N IP1000 1000Base-X 303112

    L80225

    Abstract: HALO TG22-3506ND TG22-3506ND LINK100 ssd schematic l80225/b LSI L80225
    Text: L80225 10/100 MbpsTX/10BT Ethernet Physical Layer Device PHY Technical Manual Features • Single Chip 100Base-TX /10Base-T physical layer solution • On-chip wave shaping - no external filters required • Dual Speed - 10/100 Mbps • Baseline Wander Correction


    Original     		PDF L80225 MbpsTX/10BT 100Base-TX /10Base-T MD400182/B HALO TG22-3506ND TG22-3506ND LINK100 ssd schematic l80225/b LSI L80225

    PLRXPL-SC-S43-22-N

    Abstract: PLRXPL-SC-S43 SFf-8431 PLRXPL-SC-S43-xx-N sc om2 GR-468 IEC60825-1 RD12 "network interface cards"
    Text: COMMUNICATIONS MODULES & SUBSYSTEMS 10 G SFP+ 850 nm Limiting Transceiver, 10 Gigabit Ethernet Compliant PLRXPL-Sx-S43-22-N Series Key Features • Compliant to industrywide, 10 G link specifications • Uses a highly reliable, 850 nm oxide VCSEL • Lead-free and RoHS 6/6-compliant, with allowed exemptions


    Original     		PDF PLRXPL-Sx-S43-22-N 1-800-498-JDSU 800-5378-JDSU PLRXPL-SC-S43-22-N PLRXPL-SE-S43-22-N 498-JDSU 5378-JDSU PLRXPL-SC-S43-22-N PLRXPL-SC-S43 SFf-8431 PLRXPL-SC-S43-xx-N sc om2 GR-468 IEC60825-1 RD12 "network interface cards"

    usb-mpc-kit

    Abstract: MDIO clause 45 MDIO clause 22 MDIO Serial communication I2C in I2C cable USB CABLE
    Text: USB-MPC-KIT USB-MPC-KIT Let your PC Talk I2C & MDIO This USB to Multi-Protocol Converter MPC provides USB (V1.1 or V2.0) communications with I2C and MDIO devices. The provided Windows software drivers (2000 and XP) allow a user to quickly connect to a device,


    Original     		PDF 30-day usb-mpc-kit MDIO clause 45 MDIO clause 22 MDIO Serial communication I2C in I2C cable USB CABLE

    MFR62340A-J

    Abstract: MFR62340A-JO MFT62340A-J PS12 Do12c conductive strip tfc 719 zo100
    Text: MFR62340A-J Parallel Fiber Receiver Datasheet DS5397 ISSUE 3.0 December 2001 Ordering Information MFR62340A-JO MPO/MTP Connector Applications • • • • • Features • • • • • Data rate 155Mbps to 2.5Gbps per channel 12 parallel channels, total 30Gbps capacity


    Original     		PDF MFR62340A-J DS5397 MFR62340A-JO 155Mbps 30Gbps 400MHz MFT62340A-J MFT62340A-J MFR62340A-J MFR62340A-JO PS12 Do12c conductive strip tfc 719 zo100

    Untitled

    Abstract: No abstract text available
    Text: H General Description Features The DP83850C 100 Mb/s TX/T4 Repeater Interface Con­ troller, known as 100RIC, is designed specifically to meet the needs of today's high speed Ethernet networking sys­ tems. The DP83850C is fully compatible with the IEEE 802.3 repeater's clause 27.


    OCR Scan     		PDF DP83850C 100RIC DP83850C 100RICTM) 100RIC, 100RIC 100BASE-TX

    NQ80225

    Abstract: No abstract text available
    Text: 80225 Technology Incorporated 10/100 MbpsTX/10BT Ethernet Physical Layer Device PHY PRELIMINARY DATA SHEET Features • Single Chip 100Base-TX/10Base-T Physical Layer Solution U 3.3V Version of SEEQ 80221 ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Dual Speed -10/100 Mbps


    OCR Scan     		PDF MbpsTX/10BT 100Base-TX/10Base-T MD400182/A NQ80225

    Untitled

    Abstract: No abstract text available
    Text: 84221 LSI LOGIC Quad 100BaseTX/10BaseT Physical Layer Device PR ELIM INA R Y This document is an LSI Logic document. Any reference to SEEQ Technology should be considered LSI Logic. 99191 Note: Check for latest Data Sheet revision before starting any designs.


    OCR Scan     		PDF 100BaseTX/10BaseT 100BaseTX 10BaseT MD400184/A

    Untitled

    Abstract: No abstract text available
    Text: ls t murar 80225 10/100 Mbps TX/1 OB T Ethernet Physical Layer Device PHY 99025 This document is an LSI Logic document. Any reference to SEEQ Technology should be considered LSI Logic. Features • Single Chip ■ ■ ■ 3.3V Version of SEEQ 80221 Dual Speed -10/100 Mbps


    OCR Scan     		PDF MD400182/A

    Untitled

    Abstract: No abstract text available
    Text: 80225 Technology Incorporated 10/100 MbpsTX/10BT Ethernet Physical Layer Device PHY PRELIMINARY DATA SHEET Features • Single Chip 100Base-TX/10Base-T Physical Layer Solution ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 3.3V Version of SEEQ 80221


    OCR Scan     		PDF MbpsTX/10BT 100Base-TX/10Base-T MD400182/A