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    IESS 310 Search Results

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    IESS-308/309

    Abstract: IESS-308 standard iess 308 viterbi IESS-308/309 IESS-308 sCRAMBLER DMD15 IESS-308 code IESS-308 scrambler satellite v.35 IESS 310
    Text: DMD15 Universal IBS/IDR Satellite Modem DMD15 Universal Satellite Modem HIGHLIGHTS BPSK/QPSK/8PSK/16 QAM Operation 9.6 kbps to 10 Mbps, 1 bps Steps Configuration, Monitor and Control Features Fully User-Programmable Excellent Spurious Performance Fully Compliant with IESS 308/309/310


    Original     		PDF DMD15 DMD15 BPSK/QPSK/8PSK/16 IESS-308/309 IESS-308 standard iess 308 viterbi IESS-308/309 IESS-308 sCRAMBLER IESS-308 code IESS-308 scrambler satellite v.35 IESS 310

    Untitled

    Abstract: No abstract text available
    Text: PSM-500LT L-Band Satellite Terminal M500 Internal BUC Power Supply! Our new PSM-500LT L-Band Satellite Terminal combines the performance and reliability of our M500 Series modems with an integrated Power Supply and High Stability 10 MHz reference for most BUC and LNB system


    Original     		PDF PSM-500LT PSM-500 PSM-500L. EN55022 EN50082-1 EN60950 011009bk

    IESS 310

    Abstract: IESS-309 MIL-STD-188-165 IESS-308 standard
    Text: AMT 73L Modem Series DISA CERTIFIED Features •            MIL-STD-188-165A CERTIFIED Data Rates 64kbps – 52Mbps in 1bps steps Optional eTPC Rates from 0.5 to 0.92 eTPC Extends data rate to 110Mbps BPSK, QPSK, OQPSK, 8PSK & 16QAM


    Original     		PDF MIL-STD-188-165A 64kbps 52Mbps 110Mbps 16QAM OM-73 40dBc 2000MHz 70/140MHz EIA530/449, IESS 310 IESS-309 MIL-STD-188-165 IESS-308 standard

    Untitled

    Abstract: No abstract text available
    Text: DATA SHEET J U N E 1999 Revision 1.0 LXT350/351 Integrated T1/E1 S/H Transceivers with Crystai-iess Jitter Attenuation General Description The LXT350 and LXT351 are full-featured, fullyintegrated transceivers for T1 and E l short-haul applications. They are software switchable between T1 and


    OCR Scan     		PDF LXT350/351 LXT350 LXT351 dat29: 44-pin LXT350QE

    receiver in FTA asi out

    Abstract: TNF-G
    Text: Revision. 1.0 LXT350/351 Integrated T1/E1 S/H Transceivers With Crystal-iess Jitter Attenuation General Description Features The LXT350 and LXT351 are full-featured, fully-inte­ grated transceivers for T l and E l short-haul applications. • Fully integrated transceiver for short-haul T l or E l in­


    OCR Scan     		PDF LXT350/351 PDS-T350-0596-5k receiver in FTA asi out TNF-G

    Untitled

    Abstract: No abstract text available
    Text: SPECIFICATION 1. MATING CONTROL DRAWING INTERFACE DIMENSIONS P e r M IL -S T D -3 4 8 Fig. 304.2 N JACK . 2. ELECTRICAL FREQUENCY RANGE G H z -VSWR (MAX.) * -INSERTION LOSS (d B MAX.) * -NOMINAL IMPEDANCE (OHMS)-VOLTAGE RATING (MAX VRMS)-RF LEAKAGE (MIN. dB D O W N )-TEMPERATURE RATING (DEGREES CENTIGRADE) —


    OCR Scan     		PDF ZZ-R-785. QQ-P-35, QQ-N-290

    TDA 9370

    Abstract: tda 9370 ps tda 2572 z86c1112psc 5401 DM TDA 1101 TDA 5700 Z86C11 10P35
    Text: p r o d u c t s p e c ific a tio n < £ Z iI í3 G Z86C11 CMOS Z8 M i c r o c o n t r o l l e r FEATURES • 8 -b it C M O S m ic ro c o n tro lle r, 40 - or 44-pin p a c k a g e ■ Lo w EMI o p tio n ■ 4.5 to 5.5 V o lta g e o p e ra tin g ra n g e ■


    OCR Scan     		PDF 44-pin Z86C11 DC-2572-01 TDA 9370 tda 9370 ps tda 2572 z86c1112psc 5401 DM TDA 1101 TDA 5700 Z86C11 10P35

    Untitled

    Abstract: No abstract text available
    Text: A SFÜ lO Ptlllt Advance information 3.3V 128Kx8 lnTelliwatt'v low pow er CMOS SRAM Features • • • • irtelliw a t t activ e pow e r re d u c tio n c irc u itry 2 ,7V to 3 ,6V o p e ra tin g la n g e O rg a n iz a tio n : 1 3 1 ,0 7 2 w o r d s x 8 b it s


    OCR Scan     		PDF 128Kx8 AS7C31024LL

    zilog z8 mcu

    Abstract: 3 pin resonator CMOS-8
    Text: P r e l im in a r y P r o d u c t S p e c if ic a t io n Z86093 ROM less CMOS 8-B it Z8 MCU FEATURES ROM KB RAM* (Bytes) Speed (MHz) • Device Two Programmable 8-Bit Counter/Timers, Each with Two 6-Bit Programmable Prescaler Z86093 N/A 236 16 ■ Power-On Reset (POR)


    OCR Scan     		PDF Z86093 Z86093 40-Piri 44-Pin zilog z8 mcu 3 pin resonator CMOS-8

    Untitled

    Abstract: No abstract text available
    Text: P r e l im in a r y C u s t o m e r P r o c u r e m e n t S p e c if ic a t io n < £ > 2 iL 0 E Z86233/243 CMOS Z8 8K ROM C o n sum er Co n tr o ller Processor FEATURES Part ROM RAM Kbytes Kbytes I/O Z86233 Z86243 8 8 24 32 236 236 Package Information 28-pin


    OCR Scan     		PDF Z86233/243 Z86233 Z86243 28-pin 40-pin 44-pin Z86243

    Untitled

    Abstract: No abstract text available
    Text: ALUMINUM ELECTROLYTIC CAPACITORS PL n îc liic o n Extremely Low impedance, High Reliability series • Sa m e case size as P F series, but extrem ely low im pedance as little as 1/2 or P F series. • High reliability withstanding 5000 hours load life at + 1 0 5 ”C 3 0 0 0 /2 0 0 0 hours for sm aller


    OCR Scan     		PDF 120Hz, 10X12 10X15 16X15 18X15 16X20 16X25

    Untitled

    Abstract: No abstract text available
    Text: H igh Perform ance 128KX8 CMOS SRAM AS 7C1 0 2 4 A S7C 31024 1 2 8 K X 8 C M O S SRAM Features • T T L /L V T T L -c o m p a tib le , th r e e - s ta te I / O • H ig h s p e e d • 3 2 - p i n JEDEC s ta n d a r d p a c k a g e s - 3 0 0 m il P D IP a n d SOJ


    OCR Scan     		PDF 128KX8 ESD00 AS7C1024-20TPC AS7C31024-20TPC AS7C1024-15PC AS7C31024-15PC AS7C1024-15TPC AS7C31024-15TPC

    CD40358

    Abstract: M 1958 M
    Text: HARRIS SEMICOND SECTOR M ME D • 4305271 0037453 T HARRIS CMOS 4-Stage Parallel In/Parallel Out Shift Register with J-K Serial Inputs and True/ Complément Outputs High-Voltage Types 2 0-V o lt Rating ■ CD40358 is a four-stage clocked signal serial register w ith provision for syn­


    OCR Scan     		PDF CD40358 M3G2271 37M27 4035B 74SRJ Q9-97 CD4035BH. M 1958 M

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MCM67C618 64K x 18 Bit BurstRAM Synchronous Fast Static RAM With Burst Counter and Registered Outputs The MCM67C618 is a 1,179,648 bit synchronous static random access memory designed to provide a burstable, high -performance, secondary cache


    OCR Scan     		PDF MCM67C618 MCM67C618 MCM67C61 67C618 MCM67C618FN6 MCM67C618FN7 MCM67C618FN9

    2180f3

    Abstract: No abstract text available
    Text: TISP2125F3, TISP2150F3, TISP2t80F3 DUAL SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS _ SLPSEM • MAKCH IW4 - REVISED SKiTEMBER 1994 TELECOMMUNICATION SYSTEM SECONDARY PROTECTION • Ion-Implanted Breakdown Region Precise and Stable Voltage Low Voltage Overshoot under Surge


    OCR Scan     		PDF TISP2125F3, TISP2150F3, TISP2t80F3 2125F3 2150F3 2180F3

    7769

    Abstract: ta 7769 320C10
    Text: 06 7769 LC?M Aialog I/OPort ÆD ANALOG DEVICES FEA TU R ES T w o -C h a n n e l, 8-Bit 2.5 jis A D C T w o 8-Bit, 2.5 (jis D A C s w ith O utp u t A m p lifie rs Sp a n and O ffset of A D C and D A C F U N C T IO N A L B L O C K D IA G R A M AGND IADC AGNO (DAC)


    OCR Scan     		PDF 28-Lead P-28A) C1315 7769 ta 7769 320C10

    IESS 310

    Abstract: No abstract text available
    Text: M O TO RO LA SEM ICO NDUCTOR TECHNICAL DATA MCM62995A Product Preview 16K x 16 Bit Asynchronous/Latched Address Fast Static RAM The M C M 6 2 9 9 5 A is a 2 6 2 ,1 4 4 bit latc h e d a d d re s s s ta tic ra n d o m a c c e s s m e m o ry o rg a n iz e d a s 16,384 w o rd s of 16 bits, fa b ric a te d u sing M o to ro la 's h ig h -p e rfo rm a n c e s ilic o n -g a te C M O S


    OCR Scan     		PDF MCM62995A R3000 MCM62995 2995A MCM62995AFN12 MCM62995AFN15 MCM62995AFN20 MCM62995AFN25 IESS 310

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MCM62995 Advance Information 16K x 16 Bit Asynchronous/Latched Address Fast Static RAM T h e M C M 6 2 9 9 5 is a 2 6 2 ,1 4 4 bit la tc h e d a d d re s s s ta tic ra n d o m a c c e s s m e m o ry o rg a n iz e d a s 1 6 ,384 w o rd s o f 16 bits, fa b ric a te d using M o to ro la 's


    OCR Scan     		PDF MCM62995 R3000 MCM62995 62995F MCM62995FN20 MCM62995FN25

    86C91

    Abstract: Z86C9116PSC Z86C91 09-TP Z86C9112PSC
    Text: ^ZilCG MARCOM DC2566 DOCUMENT CONTROL MASTER “ P r o d u c t S p e c if ic a t io n Z86C9I Z 8 R 0 M less M ic ro c o n tr o ller Q2/91 P r o d u c t s p e c if ic a t io n Z86C91 CMOS Z8® ROMLESS M ic r o c o n t r o l l e r FEATURES • 8-bit C M O S m ic ro c o n tro lle r, 4 0 -p in DIP or 44 -pin PLC C


    OCR Scan     		PDF DC256 Z86C91 Q2/91 40-pin 44-pin DC-2566-01 86C91 Z86C9116PSC 09-TP Z86C9112PSC

    Untitled

    Abstract: No abstract text available
    Text: fax id: 1088 CY7C1333 ADVANCED INFORMATION 64Kx32 Flow-Through SRAM with NoBL Architecture Features Functional Description • S u p p o rts 6 6 -M H z bus o p e ra tio n s w ith zero w ait sta tes— D ata is tra n s ferred on ev e ry clock • In te rn ally se lf-tim e d o u tp u t b u ffe r co n tro l to elim in a te


    OCR Scan     		PDF CY7C1333 64Kx32

    Untitled

    Abstract: No abstract text available
    Text: D ecem b e r i 998 ^ÉL M icro Linear ML2652/ML2653 10Base-T Physical Interface Chip GENERAL DESCRIPTION FEATURES TheM L 2652, 10BASE-T P h y sic a l Interface C hip, i s a com p te te p h y sic a l interface ibrtw isted p a i r an d AU I E th e m e ta p p lic a tio n s . Itcom b in e s a 10BASE-T M AU ,


    OCR Scan     		PDF ML2652/ML2653 10Base-T

    Untitled

    Abstract: No abstract text available
    Text: P r o d u c t S p e c if ic a t io n <£>ZiLOE Z86C21 8K ROM Z8 CM0S MICROCONTROLLER FEATURES • 8-Bit CMOS MCU with 8 Kbytes of ROM ■ Full-Duplex UART ■ 256 Byte Register File - 236 Bytes of General-Purpose RAM - 1 6 Bytes Control/Status Registers - 4 Bytes for Ports


    OCR Scan     		PDF Z86C21 40-Pin 44-Pin 44-Pin Z86C2116PSC 89C21 Z89C21,

    31.500MHZ

    Abstract: VS900603A
    Text: ML6430/ML6431 Genlocking Sync Generator with Digital Audio Clock for NTSC, PAL & VGA G EN ERA L D ESCRIPTIO N FEA TU RES TheM L6430,i4 L 6431 aiem uM -standairi sin gle-chip BiCM 0 S v id eo G e n lo c k E s ferN TSC , PAL and VG A . They a ie d esign ed to p rovid e a stable c lo ck fiom an


    OCR Scan     		PDF ML6430/ML6431 L6430 L6430, 31.500MHZ VS900603A

    USART 8251

    Abstract: intel 8251 USART 8251 microprocessor block diagram 8251 UNIVERSAL SYNCHRONOUS ASYNCHRONOUS RECEIVER intel 8251 8251 usart 8251 programmable interface INTEL 8251A USART intel 8251 USART control word format 8251 intel
    Text: MA28151 Radiation Hard Program m able Com m unication Interface Marconi Electronic Devices FEATURES BLOCK DIAGRAM R ad iatio n Hard to 1M R ad Si Latch up free. High SEU im m unity Transm it B u ffe r D7-D0 Silicon-on-Sapphire techno log y S ynchro no us 5-8 Bit Characters; Internal or


    OCR Scan     		PDF MA28151 MAS-281 MA28151 MAS281 Commercial-55 MIL-M-38510 USART 8251 intel 8251 USART 8251 microprocessor block diagram 8251 UNIVERSAL SYNCHRONOUS ASYNCHRONOUS RECEIVER intel 8251 8251 usart 8251 programmable interface INTEL 8251A USART intel 8251 USART control word format 8251 intel