smd cross reference
Abstract: 89551 5962-95681 95811 UT54ACS04 nand schmit trigger 54ac74 diode cross reference UT54ACS00 UT54ACS02
Text: RadHard MSI Logic SMD Cross Reference Description Part Number Quadruple 2-Input NAND Gates Quadruple 2-Input NOR Gates Hex Inverters Quadrupple 2-Input AND Gates Triple 3-Input NAND Gates Triple 3-Input AND Gates Hex Inverter Schmit Trigger Dual 4-Input NAND Gates
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HCS02MS
54AC02
HCTS02MS
UT54ACS04
HCS04MS
54AC04
HCTS04MS
UT54ACS08
HCS08MS
54AC08
smd cross reference
89551
5962-95681
95811
UT54ACS04
nand schmit trigger
54ac74
diode cross reference
UT54ACS00
UT54ACS02
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DM74LS51
Abstract: 54LS51DMQB 54LS51FMQB 54LS51LMQB DM74LS51M DM74LS51N E20A J14A M14A 54LS51
Text: DM74LS51 Dual 2-Wide 2-Input, 2-Wide 3-Input AND-OR-INVERT Gates Each package contains one 2-wide 2-input and one 2-wide 3-input AND-OR-INVERT gates. General Description This device contains two independent combinations of gates each of which performs the logic AND-OR-INVERT function.
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DM74LS51
DS006369-1
54LS51DMQB,
54LS51FMQB,
54LS51LMQB,
DM74LS51M
DM74LS51N
DM74LS51
54LS51DMQB
54LS51FMQB
54LS51LMQB
DM74LS51N
E20A
J14A
M14A
54LS51
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DM74LS51
Abstract: AND-OR-INVERT 54LS51 54LS51DMQB 54LS51FMQB 54LS51LMQB DM74LS51M DM74LS51N E20A J14A
Text: 54LS51 DM74LS51 Dual 2-Wide 2-Input 2-Wide 3-Input AND-OR-INVERT Gates General Description This device contains two independent combinations of gates each of which performs the logic AND-OR-INVERT function Each package contains one 2-wide 2-input and one 2-wide 3-input AND-OR-INVERT gates
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54LS51
DM74LS51
54LS51DMQB
54LS51FMQB
54LS51LMQB
DM74LS51M
DM74LS51N
AND-OR-INVERT
54LS51FMQB
DM74LS51N
E20A
J14A
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Untitled
Abstract: No abstract text available
Text: 54ACTQ08 54ACTQ08 Quiet Series Quad 2-Input AND Gate Literature Number: SNOS581 54ACTQ08 Quiet Series Quad 2-Input AND Gate General Description The ’ACTQ08 contains four, 2-input AND gates and utilizes NSC Quiet Series technology to guarantee quiet output
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54ACTQ08
54ACTQ08
SNOS581
ACTQ08
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IDT74ALVC08
Abstract: ALVC08
Text: IDT74ALVC08 3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-AND GATE EXTENDED COMMERCIAL TEMPERATURE RANGE IDT74ALVC08 ADVANCE INFORMATION 3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-AND GATE DESCRIPTION: FEATURES: This quadruple 2-input positive-AND gate is built using advanced
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IDT74ALVC08
ALVC08
MIL-STD-883,
200pF,
SO14-1)
SO14-2)
SO14-3)
IDT74ALVC08
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AO222
Abstract: SL 220 AO211 AO22
Text: LOGIC CELLS Cell Names & Function Descriptions Cell Name Function Description AD2 2-Input AND with 1X Drive AD2D2 2-Input AND with 2X Drive AD2D4 2-Input AND with 4X Drive AD2D8 2-Input AND with 8X Drive AD2B 2-Input AND with one Inverted Input, 1X Drive AD2BD2
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STD131
AO222
SL 220
AO211
AO22
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AO211
Abstract: AO22 ao21
Text: LOGIC CELLS Cell Names & Function Descriptions Cell Name Function Description AD2_LP 2-Input AND with 1X Drive AD2D2_LP 2-Input AND with 2X Drive AD2D4_LP 2-Input AND with 4X Drive AD2D8_LP 2-Input AND with 8X Drive AD2B_LP 2-Input AND with one Inverted Input, 1X Drive
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STDL130
AO211
AO22
ao21
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74F11
Abstract: 74F10 N74F10D N74F10N N74F11D N74F11N
Text: INTEGRATED CIRCUITS 74F10 Triple 3-input NAND gate 74F11 Triple 3-input AND gate Product specification IC15 Data Handbook Philips Semiconductors 1989 Sep 20 Philips Semiconductors Product specification Gates 74F10, 74F11 74F10 Triple 3-input NAND gate 74F11 Triple 3-input AND gate
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74F10
74F11
74F10,
74F11
74F10
14-pin
N74F10N,
N74F10D
N74F10N
N74F11D
N74F11N
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circuit diagram of 7436 ic
Abstract: CD4073B CD4073BMS CD4081B CD4081BMS CD4082B CD4082BMS nor gate 7433
Text: CD4073BMS, CD4081BMS CD4082BMS CMOS AND Gate January 1993 Features Pinout • High-Voltage Types 20V Rating CD4073BMS TOP VIEW • CD4073BMS Triple 3-Input AND Gate • CD4081BMS Quad 2-Input AND Gate • CD4082BMS Dual 4-Input AND Gate • Medium Speed Operation:
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CD4073BMS,
CD4081BMS
CD4082BMS
CD4073BMS
CD4073BMS
CD4081BMS
100nA
CD4082BMS
circuit diagram of 7436 ic
CD4073B
CD4081B
CD4082B
nor gate 7433
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circuit diagram of 7436 ic
Abstract: CD4073B CD4073BMS CD4081B CD4081BMS CD4082B CD4082BMS
Text: CD4073BMS, CD4081BMS CD4082BMS CMOS AND Gate January 1993 Features Pinout • High-Voltage Types 20V Rating CD4073BMS TOP VIEW • CD4073BMS Triple 3-Input AND Gate • CD4081BMS Quad 2-Input AND Gate • CD4082BMS Dual 4-Input AND Gate • Medium Speed Operation:
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CD4073BMS,
CD4081BMS
CD4082BMS
CD4073BMS
CD4073BMS
CD4081BMS
100nA
CD4082BMS
circuit diagram of 7436 ic
CD4073B
CD4081B
CD4082B
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2-input & 3-input AND-OR-invert Gate
Abstract: 74F51 N74F51D N74F51N
Text: INTEGRATED CIRCUITS 74F51 Dual 2-wide 2-input, 2-wise 3-input AND-OR-invert gate Product specification IC15 Data Handbook Philips Semiconductors 1989 Mar 03 Philips Semiconductors Product specification Dual 2-wide 2-input, 2-wide 3-input AND-OR-invert gate
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74F51
14-pin
N74F51N
OT27-1
N74F51D
2-input & 3-input AND-OR-invert Gate
74F51
N74F51D
N74F51N
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BU4081B
Abstract: BU4081BF BU4081BFV SSOP-B14
Text: Standard ICs Quad 2-input AND gate BU4081B / BU4081BF / BU4081BFV The BU4081B, BU4081BF, and BU4081BFV are dual-input positive-logic AND gates with four circuits mounted on a single chip. An inverter-type buffer is added to the gate output, improving input / output transmission speed, and an
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BU4081B
BU4081BF
BU4081BFV
BU4081B,
BU4081BF,
BU4081BFV
DIP14
SSOP-B14
BU4081B
BU4081BF
SSOP-B14
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BU4081B
Abstract: BU4081BF BU4081BFV SSOP-B14
Text: Standard ICs Quad 2-input AND gate BU4081B / BU4081BF / BU4081BFV The BU4081B, BU4081BF, and BU4081BFV are dual-input positive-logic AND gates with four circuits mounted on a single chip. An inverter-type buffer is added to the gate output, improving input / output transmission speed, and an
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BU4081B
BU4081BF
BU4081BFV
BU4081B,
BU4081BF,
BU4081BFV
SSOP-B14
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74AHCT1G08GV
Abstract: 74AHC1G08 74AHC1G08GV 74AHC1G08GW 74AHCT1G08 74AHCT1G08GW JESD22-A114E SOT753 08 SOT353-1 Package
Text: 74AHC1G08; 74AHCT1G08 2-input AND gate Product data sheet 1. General description 74AHC1G08 and 74AHCT1G08 are high-speed Si-gate CMOS devices. They provide a 2-input AND function. The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.
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74AHC1G08;
74AHCT1G08
74AHC1G08
74AHCT1G08
OT353-1
OT753
JESD22-A114E:
JESD22-A115-A:
JESD22-C101C:
OT753
74AHCT1G08GV
74AHC1G08GV
74AHC1G08GW
74AHCT1G08GW
JESD22-A114E
SOT753 08
SOT353-1 Package
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all ic in one file
Abstract: EF4011
Text: HEF4011UB gates QUADRUPLE 2-INPUT NAND GATE: The HEF4011UB is a quadruple 2-input NAND gate. This unbuffered single stage version provides a direct implementation of the NAND function. The output impedance and ou :put transition time depends on the input voltage and input rise and fall times applied.
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HEF4011UB
HEF4011UB
HEFM511UB
7Z63056
EF4011
14-lead
OT27-1)
EF4011UBD
all ic in one file
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TC4011UB
Abstract: TC4011UBP 2 input nand gate 18v TC4001UBP
Text: TC4001UBP, TC4011UBP/UBFN C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC _ TC4001UB QUAD 2 INPUT NOR GATE TC4011UB QUAD 2 INPUT NAND GATE_ TC4001UB and TC4011UB are 2 input NOR gate and 2 input NAND gate respectively. The pin connections are same as
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TC4001UBP,
TC4011UBP/UBFN
TC4001UB
TC4011UB
TC4001B
TC4011B
TC4001UB
TC4011UB)
TC4011UBP
2 input nand gate 18v
TC4001UBP
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pin diagram of CD4081
Abstract: ic CD4081 pin diagram ic cd4081 CD4081 CD4073B CD4073BMS CD4081B CD4081BMS CD4082BMS
Text: CD4073BMS, CD4081BMS CD4082BMS Semiconductor CMOS AND Gate January 1993 Features Pinout High-Voltage Types 20V Rating CD4073BM S TOP VIEW CD4073BMS Triple 3-Input AND Gate CD4081BMS Quad 2-Input AND Gate KJ a CD4082BMS Dual 4-Input AND Gate Medium Speed Operation:
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CD4073BMS,
CD4081BMS
CD4082BMS
cd4073bms
CD4073BMS
CD4081
100nA
CD4081BMS,
pin diagram of CD4081
ic CD4081 pin diagram
ic cd4081
CD4073B
CD4081B
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hef4001
Abstract: l6530 HEF4001UBP
Text: HEF4001UB ^ _ QUADRUPLE 2-INPUT NOR GATE The HEF4001UB is a quadruple 2-input NOR gate. This unbuffered single staije version provides a direct implementation o f the NOR function. The ou tput impedance and output transition tim e depends on the input voltage and input rise and fall times applied.
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HEF4001UB
HEF4001UB
HEF4001
14-lead
OT27-1)
HEF4001UBD
l6530
HEF4001UBP
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TC4082B
Abstract: TC4082BP TC4073BP TC4081B
Text: C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC4073BP/BF/BFNJC4081BP/BF/BFN TC4082BP TC4073B TRIPLE 3 INPUT AND GATE TC4Q81B QUAD 2 INPUT AND GATE TC4082B DUAL 4 INPUT AND GATE TC4081BP, TC4073B and TC4082B are positive logic AND gates w ith tw o inputs, three inputs and fo ur inputs
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TC4073BP/BF/BFNJC4081BP/BF/BFN
TC4082BP
TC4073B
TC4Q81B
TC4082B
TC4081BP,
TC4073B
TC4073B)
TC4082BP
TC4073BP
TC4081B
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tc4082bp
Abstract: TC4073BP
Text: TC4073BP/BF/BFN, TC4081BP/BF/BFN C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC4082BP TC4073B TRIPLE 3 INPUT AND GATE TC4081B QUAD 2 INPUT AND GATE TC4082B DUAL 4 INPUT AND GATE TC4081 BP, TC4073B and TC4082B are positive logic AND gates with tw o inputs, three inputs and four inputs
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TC4073BP/BF/BFN,
TC4081BP/BF/BFN
TC4082BP
TC4073B
TC4081B
TC4082B
TC4081
TC4073B
tc4082bp
TC4073BP
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Untitled
Abstract: No abstract text available
Text: fW ï CSJ UADDIC CD4073BMS, CD4081BMS CD4082BMS CMOS AND Gate December 1992 Pinout Features CD4073BMS • High-Voltage Types 20V Rating TOP VIEW • CD4073BMS Triple 3-Input AND Gate • CD4081BMS Quad 2-Input AND Gate -w - • CD4082BMS Dual 4-Input AND Gate
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CD4073BMS,
CD4081BMS
CD4082BMS
CD4073BMS
CD4073BMS
CD4081BMS
100nA
CD4082BMS
CD4081BMS,
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Untitled
Abstract: No abstract text available
Text: 4081B 4082B 4073B INTERNATIONAL, INC CMOS AND GATES 4081B - Quad 2-Input AND 4082B • Dual 4-Input AND 4073B - Triple 3-Input AND CONNECTION DIAGRAMS all packages FEA TU R ES 4 4 4 Buffered Outputs Diode Protection on all Inputs Fully "B"-Series Compatible
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4081B
4082B
4073B
4081B
4073B
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Untitled
Abstract: No abstract text available
Text: LS TTL DN74LS Series DN74LS51 DN74LS51 bo 741*51 2-w ide 3-input, 2-w ide 2-input AND-OR-INVERT Gates • Description DN74LS51 contains tw o 2-input and tw o 3-input AND-ORINVERT gates. ■ Features • • • • Low pow er consum ption P d = 5.5mW typical
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DN74LS
DN74LS51
DN74LS51
MA161
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Untitled
Abstract: No abstract text available
Text: TC4S81F TOSHIBA C MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 2 INPUT AND GATE Tile TC4S81P contains S-input positive logic AND gates. Gate output with inverter buffer improves the input-output characteristics and if the load capacitance increases, it can stop any changes
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TC4S81F
TC4S81P
Ta-25
-AO-85
C/10sec.
CL-50pF)
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