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    ATGBICS VIP-SFP+-10GE-SR-C

    Compatible SFP+ 10G
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey VIP-SFP+-10GE-SR-C 7,466 1
    • 1 $32
    • 10 $32
    • 100 $30.4
    • 1000 $27.2
    • 10000 $27.2
    		Buy Now

    ATGBICS VIP-SFP+-10GE-LR-C

    Compatible SFP+ 10G
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey VIP-SFP+-10GE-LR-C 6,308 1
    • 1 $50
    • 10 $50
    • 100 $47.5
    • 1000 $42.5
    • 10000 $42.5
    		Buy Now

    ATGBICS VIP-SFP-1GE-LX-C

    Compatible SFP 1000Mb
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey VIP-SFP-1GE-LX-C 1
    • 1 $27
    • 10 $27
    • 100 $25.7
    • 1000 $23
    • 10000 $23
    		Buy Now

    ATGBICS VIP-SFP-1GE-SX-C

    Compatible SFP 1000Mb
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey VIP-SFP-1GE-SX-C 1
    • 1 $24
    • 10 $24
    • 100 $22.8
    • 1000 $20.4
    • 10000 $20.4
    		Buy Now

    Amphenol ProLabs VIP-SFP--10GE-SR-C

    Viptela SFP-10G-SR-S Compatible
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey VIP-SFP--10GE-SR-C 1
    • 1 $206.25
    • 10 $206.25
    • 100 $195.9375
    • 1000 $206.25
    • 10000 $206.25
    		Buy Now
    Find more IP SFP price and stock on Findchips.com

    IP SFP Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    RGMII constraints

    Abstract: axi ethernet lite software example XC7VX330T-FFG1761 ramb16bwer vhdl code for ethernet mac lite spartan 3 cisco 2821 SPARTAN-6 gtp 2011 0x000005fc XC7V585T-FFG1761 AXI4 lite verilog
    Text: LogiCORE IP AXI Ethernet v3.00a DS759 November 17, 2011 Product Specification Introduction LogiCORE IP Facts Table This document provides the design specification for the LogiCORE IP AXI Ethernet core. This core implements a tri-mode (10/100/1000 Mb/s) Ethernet


    Original     		PDF DS759 1000BASE-X 32-bit RGMII constraints axi ethernet lite software example XC7VX330T-FFG1761 ramb16bwer vhdl code for ethernet mac lite spartan 3 cisco 2821 SPARTAN-6 gtp 2011 0x000005fc XC7V585T-FFG1761 AXI4 lite verilog

    zynq cpri ethernet software example

    Abstract: virtex-7 GTH2 virtex7 zynq axi ethernet software example 3030 xilinx gtx 970
    Text: LogiCORE IP CPRI v5.1 DS611 April 24, 2012 Product Specification Introduction LogiCORE IP Facts The LogiCORE IP Common Packet Radio Interface CPRI™ core is a high-performance, low-cost flexible solution for implementation of the CPRI interface. This core


    Original     		PDF DS611 zynq cpri ethernet software example virtex-7 GTH2 virtex7 zynq axi ethernet software example 3030 xilinx gtx 970

    XC7VX330T-FFG1761

    Abstract: spartan6 block ram RGMII constraints verilog code for communication between fpga using pin diagram of ic 7489 clause 37 XC6slx4 SPARTAN-6 gtp 2012 fpga ethernet sgmii RAMB36E1
    Text: LogiCORE IP AXI Ethernet v3.01a DS759 July 25, 2012 Product Specification Introduction LogiCORE IP Facts Table This document provides the design specification for the LogiCORE IP AXI Ethernet core. This core implements a tri-mode (10/100/1000 Mb/s) Ethernet


    Original     		PDF DS759 1000BASE-X 32-bit XC7VX330T-FFG1761 spartan6 block ram RGMII constraints verilog code for communication between fpga using pin diagram of ic 7489 clause 37 XC6slx4 SPARTAN-6 gtp 2012 fpga ethernet sgmii RAMB36E1

    0X508

    Abstract: UG777 EF-DI-TEMAC-PROJ RGMII switch sp605 sfp artix7 ucf file vhdl code for ethernet mac spartan 3 example ml605 ethernet
    Text: ‘‘‘‘‘‘‘‘Tri-Mode LogiCORE IP Tri-Mode Ethernet MAC v5.2 DS818 January 18, 2012 Product Specification Introduction LogiCORE IP Facts Table The LogiCORE IP Tri-Mode Ethernet Media Access Controller TEMAC solution comprises the 10/100/1000 Mb/s Ethernet MAC, 1 Gb/s Ethernet


    Original     		PDF DS818 0X508 UG777 EF-DI-TEMAC-PROJ RGMII switch sp605 sfp artix7 ucf file vhdl code for ethernet mac spartan 3 example ml605 ethernet

    fpga frame buffer vhdl examples

    Abstract: axi wrapper matched filter in vhdl RGMII SGMII zynq axi ethernet software example 0x748 verilog code for 10 gb ethernet verilog code for mdio protocol vhdl code for ethernet mac spartan 3
    Text: ‘‘‘‘‘‘‘‘Tri-Mode LogiCORE IP Virtex-6 FPGA Embedded Tri-Mode Ethernet MAC Wrapper v2.3 DS835 April 24, 2012 Product Specification Introduction LogiCORE IP Facts Table The LogiCORE IP Virtex -6 FPGA Embedded Tri-Mode Ethernet MAC Wrapper is comprised of the


    Original     		PDF DS835 fpga frame buffer vhdl examples axi wrapper matched filter in vhdl RGMII SGMII zynq axi ethernet software example 0x748 verilog code for 10 gb ethernet verilog code for mdio protocol vhdl code for ethernet mac spartan 3

    virtex-6 ML605 user guide

    Abstract: verilog code for mdio protocol zynq axi ethernet software example fpga frame buffer vhdl examples example ml605 ethernet DS835 sgmii mode sfp axi wrapper verilog code for 10 gb ethernet vhdl code for ethernet mac spartan 3
    Text: ‘‘‘‘‘‘‘‘Tri-Mode LogiCORE IP Virtex-6 FPGA Embedded Tri-Mode Ethernet MAC Wrapper v2.2 DS835 October 19, 2011 Product Specification Introduction LogiCORE IP Facts Table The LogiCORE IP Virtex -6 FPGA Embedded Tri-Mode Ethernet MAC Wrapper is comprised of the


    Original     		PDF DS835 virtex-6 ML605 user guide verilog code for mdio protocol zynq axi ethernet software example fpga frame buffer vhdl examples example ml605 ethernet sgmii mode sfp axi wrapper verilog code for 10 gb ethernet vhdl code for ethernet mac spartan 3

    0x77C

    Abstract: iodelay IEEE1722 DS818 KC705 RGMII phy Xilinx UG474 UG777 UG472 verilog code for mdio protocol
    Text: ‘‘‘‘‘‘‘‘Tri-Mode LogiCORE IP Tri-Mode Ethernet MAC v5.3 DS818 April 24, 2012 Product Specification Introduction LogiCORE IP Facts Table The LogiCORE IP Tri-Mode Ethernet Media Access Controller TEMAC solution comprises the 10/100/1000 Mb/s Ethernet MAC, 1 Gb/s Ethernet


    Original     		PDF DS818 Zynq-7000, 0x77C iodelay IEEE1722 KC705 RGMII phy Xilinx UG474 UG777 UG472 verilog code for mdio protocol

    Untitled

    Abstract: No abstract text available
    Text: IP Video Monitor IPM400A Data Sheet Applications Diagnostic Monitoring of IP Video Contribution and Primary Distribution Cable Headend Monitoring Terrestrial Distribution DTH or Network Operator Satellite Uplink Monitoring IPTV Ingest and Headend Monitoring


    Original     		PDF IPM400A 2AW-24494-4

    PacketStorm Communications

    Abstract: No abstract text available
    Text: “Providing the Internet in a box” Introducing the PacketStorm 4XG ! 40 Gbps chassis capacity ! Two independent module slots ! Wire rate impairments ! GigE and 10GigE ports Features and Description The PacketStorm 4XG IP network emulator reproduces the unfavorable conditions of IP networks


    Original     		PDF 10GigE 40Gbps XG-10G XG-103 XG-10G PacketStorm Communications

    sgmii sfp virtex

    Abstract: xilinx virtex 5 mac 1.3 fpga rgmii fpga ethernet sgmii RGMII to MII iodelay GTP ethernet GTX 460 switch SGMII MII GMII Virtex-5 LXT Ethernet
    Text: DS550 April 24, 2009 Virtex-5 FPGA Embedded Tri-Mode Ethernet MAC Wrapper v1.6 Product Specification Introduction LogiCORE IP Facts The LogiCORE IP Virtex -5 FPGA Embedded Tri-Mode Ethernet MAC Wrapper automates the generation of HDL wrapper files for the Embedded


    Original     		PDF DS550 sgmii sfp virtex xilinx virtex 5 mac 1.3 fpga rgmii fpga ethernet sgmii RGMII to MII iodelay GTP ethernet GTX 460 switch SGMII MII GMII Virtex-5 LXT Ethernet

    SFP LVDS altera

    Abstract: DK-VIDEO-2SGX90N altera jtag ethernet SFP altera Altera 6G FPGA Dev Kit Stratix II GX FPGA Development Board Reference altera cyclone 3 fpga altera cyclone iv JTAG CONNECTOR cyclone iii fpga DK-PCIE-2SGX90N
    Text: Stratix II GX Transceivers with Integrity High-Speed Serial I/O Workshops Q4, 2006 and Q1, 2007 Version 02/2007 2007 Altera Corporation—Confidential Agenda „ „ Stratix II GX overview Complete solution − Transceiver building blocks − Hard IP and IP cores


    Original     		PDF SK-PCIE-2SGX90N DK-VIDEO-2SGX90N SFP LVDS altera DK-VIDEO-2SGX90N altera jtag ethernet SFP altera Altera 6G FPGA Dev Kit Stratix II GX FPGA Development Board Reference altera cyclone 3 fpga altera cyclone iv JTAG CONNECTOR cyclone iii fpga DK-PCIE-2SGX90N

    Untitled

    Abstract: No abstract text available
    Text: Datasheet | integrated Multiservice Access Platform iMAP Express 7112 integrated Multiservice Access Platform The iMAP Express 7112 is a member of Allied Telesyn’s iMAP family of IP-based integrated multiservice access platforms. The 7112 is 1RU and is optimal for delivery IP based services


    Original     		PDF

    sgmii xilinx

    Abstract: traffic light controller vhdl coding sgmii sfp virtex IEEE 802.3 Clause 38 vhdl code for ethernet mac spartan 3 ENG-46158 1000BASE-X IEEE 802.3 Clause 39 VHDL code for traffic light controller sgmii mode sfp
    Text: Ethernet 1000BASE-X PCS/PMA or SGMII v10.2 DS264 June 24, 2009 Product Specification Introduction LogiCORE IP Facts Core Specifics The LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII core provides a flexible solution for connection to an Ethernet Media Access Controller MAC or


    Original     		PDF 1000BASE-X DS264 1000BASE-X ENG-46158) sgmii xilinx traffic light controller vhdl coding sgmii sfp virtex IEEE 802.3 Clause 38 vhdl code for ethernet mac spartan 3 ENG-46158 IEEE 802.3 Clause 39 VHDL code for traffic light controller sgmii mode sfp

    ENG-46158

    Abstract: verilog hdl code for traffic light control traffic light controller vhdl coding IEEE 802.3 Clause 38 vhdl code for ethernet mac spartan 3 verilog coding using instantiations 1000BASE-X sgmii xilinx 1000BASE-LX GTX 460
    Text: Ethernet 1000BASE-X PCS/PMA or SGMII v10.3 DS264 September 16, 2009 Product Specification Introduction LogiCORE IP Facts Core Specifics The LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII core provides a flexible solution for connection to an Ethernet Media Access Controller MAC or


    Original     		PDF 1000BASE-X DS264 1000BASE-X ENG-46158 verilog hdl code for traffic light control traffic light controller vhdl coding IEEE 802.3 Clause 38 vhdl code for ethernet mac spartan 3 verilog coding using instantiations sgmii xilinx 1000BASE-LX GTX 460

    verilog code for mdio protocol

    Abstract: DS200 fpga rgmii fpga ethernet sgmii gmii phy gmii sfp RGMII constraints 1000BASE-X UG331 MDIO clause 22
    Text: - DISCONTINUED PRODUCT -1 1-Gigabit Ethernet MAC v8.5 DS200 April 24, 2009 Product Specification Introduction LogiCORE IP Facts Core Specifics The LogiCORE IP 1-Gigabit Ethernet Media Access Controller GEMAC core supports full-duplex operation at 1 Gigabit per second (Gbps), and can be used


    Original     		PDF DS200 769-R verilog code for mdio protocol fpga rgmii fpga ethernet sgmii gmii phy gmii sfp RGMII constraints 1000BASE-X UG331 MDIO clause 22

    traffic light controller vhdl coding

    Abstract: ENG-46158 1000BASE-X sfp sgmii sgmii specification ieee 1000base-x xilinx verilog code for 10 gb ethernet vhdl code for mac transmitter vhdl code for ethernet mac spartan 3 gtx 970 verilog hdl code for traffic light control
    Text: LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII v11.3 DS264 April 24, 2012 Product Specification Introduction LogiCORE IP Facts Table The LogiCORE Ethernet 1000BASE-X PCS/PMA or Serial Gigabit Media Independent Interface SGMII core provides a flexible solution for connection to an Ethernet Media Access


    Original     		PDF 1000BASE-X DS264 ENG-46158) traffic light controller vhdl coding ENG-46158 1000BASE-X sfp sgmii sgmii specification ieee 1000base-x xilinx verilog code for 10 gb ethernet vhdl code for mac transmitter vhdl code for ethernet mac spartan 3 gtx 970 verilog hdl code for traffic light control

    PM8374

    Abstract: gmii sfp PM8380 QuadSMX 3G CXE-2130 Cxe switchcore 2130 ip dslam PM8380 PM8363 PM8373
    Text: www.pmc-sierra.com AM IP-Based DSLAMs and Access Concentrators z 8: :0 04 IP-Based DSLAM Description ur sd Device 04 20 t, us ug z 2A z ,1 z ay Low cost, low power, robust serial interconnect Guaranteed Jitter Performance Extremely low bit error rates Widely deployed proven devices


    Original     		PDF PM8380 PM8374 PMC-2040993 PM8374 gmii sfp PM8380 QuadSMX 3G CXE-2130 Cxe switchcore 2130 ip dslam PM8380 PM8363 PM8373

    xilinx tcp vhdl

    Abstract: TEMAC fpga ethernet sgmii 1000BASE-X MDIO communication protocol UCF virtex4 application TEMAC DS297 IMPLEMENTATION OF IEEE 802.3 MAC TRANSMITTER USING VHDL
    Text: ‘‘‘‘‘‘‘‘Tri-Mode Tri-Mode Ethernet MAC v4.2 DS297 June 24, 2009 Product Specification Introduction LogiCORE IP Facts The LogiCORE IP Tri-Mode Ethernet Media Access Controller TEMAC core supports half-duplex and full-duplex operation at 10 Mbps, 100 Mbps, and 1 Gbps.


    Original     		PDF DS297 xilinx tcp vhdl TEMAC fpga ethernet sgmii 1000BASE-X MDIO communication protocol UCF virtex4 application TEMAC IMPLEMENTATION OF IEEE 802.3 MAC TRANSMITTER USING VHDL

    Technitrol

    Abstract: sfp plus 3126 04 00
    Text: 62,5 R E F Q ty Per: TRAY PART NUMBER SF P P -31 2 6-L No. D E S C R IP A T IO N 01 SFP 02 CONNECTOR 03 L IG H T 04 EMI CAGE P IP E S GASKET N o n -L o g o CARTDN 36 STATEMENT S F P PLUS/INNER&DUTER LIGHT P IP E S S F P PLU S/IN N ER LIGHT P IP E S S F P PLUS/DUTER LIGHT P IP E S


    OCR Scan     		PDF SFPP-3126-L CSFPP-3126-L CSFPP-3126-L SFpp-31g6-L Technitrol sfp plus 3126 04 00

    A 3120 V

    Abstract: 31c0 T16 DM SFPP-31
    Text: 58,8 Q ty P er: TRAY CARTDN 36 P A R T NUMBER S F P P -3 1 E Q -L D ESCRIPTION SFP 02 03 04 CAGE CO N N ECTO R LIG H T P IP E S EMI TAB N o n -Lo go ST A T E M EN T S F P P L U S / IN N E R & D U T E R L IG H T P IP E S S F P P L U S / IN N E R LIG H T P IP E S


    OCR Scan     		PDF SFPP-31P0-L C5FPP-3120-L SFPP-3120-L CSRPR-312Q-L SEPP-31C0-L A 3120 V 31c0 T16 DM SFPP-31

    Untitled

    Abstract: No abstract text available
    Text: 85.75 Q t y P er: TRAY CARTDN 3 18 P A R T NUMBER ST A T E M E N T S F P O -3 0 1 0 - L _ - - - IN N E R / E U T E R LIG H T P IP E S IN N E R L IG H T P IP E S □ U TER L IG H T P IP E S _ N o.


    OCR Scan     		PDF CSFP0-3010-L

    Untitled

    Abstract: No abstract text available
    Text: FULL RADIUS TYP, UN END DF PINS TD ASSIST E N T R Y INTO PCB HDLES Q ty P e r: TRAY CARTEIN 3 18 ST A T E M EN T P ART NUMBER IN N E R / D U T E R LIG H T P IP E S IN N E R LIG H T P IP E S □U TER LIG H T P IP E S F P 0 3 2 -L - -_


    OCR Scan     		PDF SFP032-L CSFP032-L SFPQ32-L CSFP032-L SFp032

    Untitled

    Abstract: No abstract text available
    Text: FU LL RADIUS TYP, UN END DF PINS TD ASSIST EN T R Y INTO PCB HDLES Q ty P e r: TRAY CARTEIN 3 18 ST A T E M EN T P ART NUMBER IN N E R / D U T E R LIG H T P IP E S IN N E R LIG H T P IP E S □U TER LIG H T P IP E S F P 0 3 2 -L - -_


    OCR Scan     		PDF

    301Q

    Abstract: No abstract text available
    Text: 85.75 Q t y P er: TRAY CARTDN 3 18 P A R T NUMBER ST A T E M EN T S F P O -3 0 1 0 - L _ - - IN N E R / E U T E R LIG H T P IP E S IN N E R L IG H T P IP E S □U TER L IG H T P IP E S _- No. D E S C R I P A T IO N


    OCR Scan     		PDF SEPO-3010-L CSFP0-3010-L SFP0-3010-L CSPP0-3010-L SPP0-3010-L 301Q