Untitled
Abstract: No abstract text available
Text: NEC jUPD75112 A , 75116(A) 11. Electrical Specifications Absolute Maximum Ratings (Ta = 25 °C) Param eter Sym bol Pow er supply voltage V dd Input voltage Vn Vl2*1 Ratings Unit -0 .3 to +7.0 V -0 .3 to V dd +0.3 V - 0 .3 to V d d +0.3 V - 0 .3 to +13 V -0 .3 to V dd +0.3
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uPD75112
uPD75116
PD75112
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Untitled
Abstract: No abstract text available
Text: jUPD75112 A , 75116(A) 8. Reset Functions The reset signal (RES) generator is configured as shown in Figure 8-1. Figure 8-1 Reset Signal Generator P O N F settin g (1) by SET1 in stru ctio n is not po ssible. 26 NEC NEC ¿¿PD75112(A), 75116(A) The power-on reset circuit generates the internal reset
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uPD75112
uPD75116
PD75112
PTH00
PTH03
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0031h
Abstract: 75116
Text: NEC jUPD75112 A , 75116(A) 12. Packing Information 64 PIN PLASTIC SHRINK DIP (750 mil) 64 33 J u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u u 1 32 A NOTE 1) 2) ITEM M ILLIM E T E R S IN C H ES Each lead ce n te rlin e is lo ca te d w ith in 0.1 7 mm (0.007 inch) of
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uPD75112
uPD75116
551tg
07lto
//PD75112
64-Pin
0031h
75116
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75108GF
Abstract: EP-75108GF-R e language nec D 1308
Text: NEC jUPD75112 A , 75116(A) ★ APPENDIX C. Related Documentations List of Device Related Documentations D o cu m e n t N u m b e r D o cu m e n t N am e IEM -1260 U se r's M an u a l In s tru c tio n A p p lic a tio n T able — A p p lic a tio n N ote (1) In tro d u c to ry V o lu m e
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uPD75112
uPD75116
IEM-1281
IEA-1278
IF-1027
IE-75000-R/IE-75001-R
IE-75000-R-EM
EP-75108CW-R
EP-75108GF-R
PGEEU-1294
75108GF
e language
nec D 1308
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rom 512x4
Abstract: No abstract text available
Text: NEC jUPD75112 A , 75116(A) Defferences between ¿¿PD75112(A), 75116(A) and ¿¿PD75112, 75116 ~~~ -— Product Nam e Item '— - •— ^ jUPD75112(A), 75116(A) Q uality grade Special Electrical specifications ¿iPD75112, 75116 Standard Absolute m axim um ratings
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uPD75112
uPD75116
PD75112
PD75112,
iPD75112,
iPD75112
iPD75116
512x4
rom 512x4
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fd1h
Abstract: No abstract text available
Text: NEC jUPD75112 A , 75116(A) 5. Peripheral Hardware Functions 5.1 Digital Input/Output Port The digital Input/output port has the fo llo w in g tree types. • CMOS Input (PORTO, 1) : 8 • CMOS Input/output (PORT 2 to PORT 9) : 32 • N-ch open-draln Inpul/output (PORT 12 to PORT 14): 12
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uPD75112
uPD75116
PORT12
PORT13
PORT14
fd1h
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Untitled
Abstract: No abstract text available
Text: jUPD75112 A , 75116(A) 1. Pin Configuration (Top View) 64-Pin Plastic Shrink DIP (750 mil) 4 NEC NEC ¿¿PD75112(A), 75116(A) 64-Pin Plastic QFP (14 x 20 mm) CM CO O 00 Cl Cl Cl CM CO Q 00 00 00 Q Cl Cl Cl > O <•sf Cl Cl CM sf Cl 00 ■sf Cl O C«5 Cl - + 0
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uPD75112
uPD75116
64-Pin
PD75112
P03/SI
PTH00
PTH01
P00-P03
P10-P13
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nec 14 t
Abstract: 512x4
Text: NEC jUPD75112 A , 75116(A) * APPENDIX A. Differences between ¿/PD751xx(A) Series Products and Related PROM Prod ucts ^ ^ - ^ P r o d u c t Nam e Item ,uPD75104(A) ,uPD75106(A) ROM C o n fig u ra tio n ROM (bit) I/O line 0000H to 177FH 6016x8 0000H to 1F7FH
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uPD75112
uPD75116
uPD75108
P075112
iiP075116
iPD75P108B
iPD75P116
/PD751xx
0000H
nec 14 t
512x4
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PT01
Abstract: No abstract text available
Text: O [S3 "O E o o 7T o ^1 cn BITSEQ. BUFFERI16) &) Q BASIC INTERVAL 3 TIMER PORTO INTBT PROGRAM CY SP PORT1 4 PI 0-P13 COUNTER #0 > cn aj TIMEREVENT PTOQ/P20 3 ^1 COUNTER 114) TIO PO0-P03 BANK PORT2 , 4 > P20-P23 PORT3 , 4 > P30-P33 PORT4 , 4 > P40-P43 PORTS
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BUFFERI16)
PTOQ/P20
PO0-P03
0-P13
P20-P23
P30-P33
PT01/P21
P40-P43
P60-P63
P50-P53
PT01
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Untitled
Abstract: No abstract text available
Text: NEC ¿¿PD75112 A , 75116(A) 3. Pin Functions 3.1 Port Pins F un ctio n Pin N am e In p u t/ O u tp u t Dual F un ctio n Pin POO In p u t INT4 P01 In p u t/o u tp u t SCK P02 In p u t/o u tp u t SO E P03 In p u t SI P10 In p u t INTO In p u t ® In p u t
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uPD75112
uPD75116
P00/INT4,
uPD75P116
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IEM-922
Abstract: 2000H-2FFFH EEU-730 2000H-2F7FH
Text: NEC /iPD75112 A , 75116(A) 9. Instruction Set Identifier (1) Operand identifier and description method re g reg i X, A, B, C, D, E, H, L X, B, C, D, E, H, L In the operand colum n of each instruction, describe the corresponding operand in accordance w ith the de
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RA75X
EEU-730)
/xPD751xx
IEM922)
IEM-922
2000H-2FFFH
EEU-730
2000H-2F7FH
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P130T
Abstract: Z57F
Text: ¿¿PD75112, 75116 4-Bit Single-Chip Microcomputer Data Sheet Description Please refer to "Quality Grade on NEC Semicon ductor Devices" Document number IEI-1209 published by NEC Corporation to know the speci fication of quality grade on the devices and its
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PD75112,
IEI-1209)
/zPD75116
/iPD75116
tPD75108.
PD75116
mPD751
EEU-1346
EEU-1343
EEU-1291
P130T
Z57F
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f80h
Abstract: No abstract text available
Text: NEC ¿¿PD75112 A , 75116(A) 4. Mem ory Configuration • Program M em ory (ROM) 12160 x 8 bits (0000H to 2F7FH):/xPD75112(A) 16256 x 8 bits (0000H to 3F7FH): /iPD75116(A) • 0000H to 0001H: Vector table for writing the program start address by reset • 0002H to 000BH: Vector table for writing the
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0000H
uPD75112
uPD75116
0001H:
0002H
000BH:
PD75112
0020H
f80h
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