Untitled
Abstract: No abstract text available
Text: 74LVC1G14 Single Schmitt-trigger inverter Rev. 12 — 6 August 2012 Product data sheet 1. General description The 74LVC1G14 provides the inverting buffer function with Schmitt-trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free
|
Original
|
PDF
|
74LVC1G14
74LVC1G14
|
application note tssop5 nxp
Abstract: No abstract text available
Text: 74LVC1G06 Inverter with open-drain output Rev. 10 — 29 June 2012 Product data sheet 1. General description The 74LVC1G06 provides the inverting buffer. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.
|
Original
|
PDF
|
74LVC1G06
74LVC1G06
application note tssop5 nxp
|
STM32F051
Abstract: STM32F051R8 RM0091 STM32F0 STM32 IWDG STM32F051x STM32F051K STM32F051R stm32f05 STM32F051C8
Text: STM32F051x4 STM32F051x6 STM32F051x8 Low- and medium-density advanced ARM -based 32-bit MCU with 16 to 64 Kbytes Flash, timers, ADC, DAC and comm. interfaces Datasheet − production data Features • Core: ARM 32-bit Cortex™-M0 CPU, frequency up to 48 MHz
|
Original
|
PDF
|
STM32F051x4
STM32F051x6
STM32F051x8
32-bit
STM32F051
STM32F051R8
RM0091
STM32F0
STM32 IWDG
STM32F051x
STM32F051K
STM32F051R
stm32f05
STM32F051C8
|
Untitled
Abstract: No abstract text available
Text: 74LVC1G08 Single 2-input AND gate Rev. 9 — 9 December 2011 Product Specification 1. General description The 74LVC1G08 provides one 2-input AND function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.
|
Original
|
PDF
|
74LVC1G08
74LVC1G08
771-LVC1G08GWDG125
74LVC1G08GW/DG
|
marking VU SOT363
Abstract: No abstract text available
Text: 74LVC1G11 Single 3-input AND gate Rev. 7 — 4 July 2012 Product data sheet 1. General description The 74LVC1G11 provides a single 3-input AND gate. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.
|
Original
|
PDF
|
74LVC1G11
74LVC1G11
marking VU SOT363
|
Marking code V7
Abstract: No abstract text available
Text: 74LVC2G00 Dual 2-input NAND gate Rev. 11 — 22 June 2012 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.
|
Original
|
PDF
|
74LVC2G00
74LVC2G00
Marking code V7
|
74LVC646A
Abstract: 74LVC646AD 74LVC646ADB 74LVC646APW SO24 SSOP24 TSSOP24
Text: 74LVC646A Octal bus transceiver/register; 3-state Rev. 04 — 29 June 2004 Product data sheet 1. General description The 74LVC646A is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.
|
Original
|
PDF
|
74LVC646A
74LVC646A
74LVC646AD
74LVC646ADB
74LVC646APW
SO24
SSOP24
TSSOP24
|
74LVCH32245A
Abstract: 74LVCH32245AEC LVCH32245A
Text: 74LVCH32245A 32-bit bus transceiver with direction pin; 5 V tolerant; 3-state Rev. 03 — 20 August 2007 Product data sheet 1. General description The 74LVCH32245A is a 32-bit transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The device features four output enable nOE
|
Original
|
PDF
|
74LVCH32245A
32-bit
74LVCH32245A
74LVCH32245AEC
LVCH32245A
|
74LVC595A
Abstract: 74LVC595ABQ 74LVC595AD 74LVC595APW DHVQFN16 TSSOP16
Text: 74LVC595A 8-bit serial-in/serial-out or parallel-out shift register; 3-state Rev. 01 — 29 May 2007 Product data sheet 1. General description The 74LVC595A is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks.
|
Original
|
PDF
|
74LVC595A
74LVC595A
74LVC595ABQ
74LVC595AD
74LVC595APW
DHVQFN16
TSSOP16
|
74LVC1G04
Abstract: 74LVC1G04GF 74LVC1G04GM 74LVC1G04GV 74LVC1G04GW JESD22-A114E MO-203
Text: 74LVC1G04 Single inverter Rev. 08 — 27 April 2009 Product data sheet 1. General description The 74LVC1G04 provides one inverting buffer. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.
|
Original
|
PDF
|
74LVC1G04
74LVC1G04
74LVC1G04GF
74LVC1G04GM
74LVC1G04GV
74LVC1G04GW
JESD22-A114E
MO-203
|
74LVC1G06
Abstract: 74LVC1G06GF 74LVC1G06GM 74LVC1G06GV 74LVC1G06GW JESD22-A114E
Text: 74LVC1G06 Inverter with open-drain output Rev. 07 — 12 July 2007 Product data sheet 1. General description The 74LVC1G06 provides the inverting buffer. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.
|
Original
|
PDF
|
74LVC1G06
74LVC1G06
74LVC1G06GF
74LVC1G06GM
74LVC1G06GV
74LVC1G06GW
JESD22-A114E
|
74LVC2G126
Abstract: 74LVC2G126DC 74LVC2G126DP 74LVC2G126GD 74LVC2G126GM 74LVC2G126GT JESD22-A114E MO-187
Text: 74LVC2G126 Dual bus buffer/line driver; 3-state Rev. 08 — 5 May 2008 Product data sheet 1. General description The 74LVC2G126 is a dual non-inverting buffer/line driver with 3-state outputs. Each 3-state output is controlled by an output enable input pin nOE . A LOW-level at pin nOE
|
Original
|
PDF
|
74LVC2G126
74LVC2G126
74LVC2G126DC
74LVC2G126DP
74LVC2G126GD
74LVC2G126GM
74LVC2G126GT
JESD22-A114E
MO-187
|
74LVC4245A
Abstract: 74LVC4245ABQ 74LVC4245AD 74LVC4245ADB 74LVC4245APW JESD22-A114E SO24 SSOP24
Text: 74LVC4245A Octal dual supply translating transceiver; 3-state Rev. 06 — 18 January 2008 Product data sheet 1. General description The 74LVC4245A is an octal dual supply translating transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. It is designed to
|
Original
|
PDF
|
74LVC4245A
74LVC4245A
74LVC4245ABQ
74LVC4245AD
74LVC4245ADB
74LVC4245APW
JESD22-A114E
SO24
SSOP24
|
74LVC2G241
Abstract: 74LVC2G241DC 74LVC2G241DP 74LVC2G241GD 74LVC2G241GM 74LVC2G241GT JESD22-A114E
Text: 74LVC2G241 Dual buffer/line driver; 3-state Rev. 09 — 10 June 2008 Product data sheet 1. General description The 74LVC2G241 is a dual non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE:
|
Original
|
PDF
|
74LVC2G241
74LVC2G241
74LVC2G241DC
74LVC2G241DP
74LVC2G241GD
74LVC2G241GM
74LVC2G241GT
JESD22-A114E
|
|
|
SOT536-1
Abstract: 74LVC32245A 74LVC32245AEC
Text: 74LVC32245A 32-bit bus transceiver with direction pin; 5 V tolerant; 3-state Rev. 01 — 20 August 2007 Product data sheet 1. General description The 74LVC32245A is a 32-bit transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The device features four output enable nOE
|
Original
|
PDF
|
74LVC32245A
32-bit
74LVC32245A
SOT536-1
74LVC32245AEC
|
stm32l052k
Abstract: No abstract text available
Text: STM32L052x6 STM32L052x8 Ultra-low-power 32-bit MCU ARM -based Cortex®-M0+, up to 64 KB Flash, 8 KB SRAM, 2 KB EEPROM, USB, ADC, DAC Datasheet - production data Features • • • • Ultra-low-power platform – 1.65 V to 3.6 V power supply – -40 to 125 °C temperature range
|
Original
|
PDF
|
STM32L052x6
STM32L052x8
32-bit
DocID025936
stm32l052k
|
RM0091
Abstract: No abstract text available
Text: STM32F048xx ARM -based 32-bit MCU, 32 KB Flash, crystal-less USB FS 2.0, 8 timers, ADC & comm. interfaces, 1.8 V Datasheet - preliminary data Features • Core: ARM 32-bit Cortex-M0 CPU, frequency up to 48 MHz CRC calculation unit Power management
|
Original
|
PDF
|
STM32F048xx
32-bit
DocID026007
RM0091
|
STM32F429N
Abstract: STM32F429Ni
Text: STM32F427xx STM32F429xx ARM Cortex-M4 32b MCU+FPU, 225DMIPS, up to 2MB Flash/256+4KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 20 comm. interfaces, camera & LCD-TFT Datasheet - production data Features &"'! • Core: ARM 32-bit Cortex®-M4 CPU with FPU,
|
Original
|
PDF
|
STM32F427xx
STM32F429xx
225DMIPS,
Flash/256
32-bit
64-KB
DocID024030
STM32F429N
STM32F429Ni
|
Untitled
Abstract: No abstract text available
Text: STM32F437xx STM32F439xx ARM Cortex-M4 32b MCU+FPU, 225DMIPS, up to 2MB Flash/256+4KB RAM, crypto, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 20 comm. interfaces, camera&LCD-TFT Datasheet - production data Features &"'! • Core: ARM 32-bit Cortex®-M4 CPU with FPU,
|
Original
|
PDF
|
STM32F437xx
STM32F439xx
225DMIPS,
Flash/256
32-bit
64-KB
DocID024244
|
UQFPN28
Abstract: No abstract text available
Text: STM32F042x ARM -based 32-bit MCU, up to 32 KB Flash, crystal-less USB FS 2.0, CAN, 8 timers, ADC & comm. interfaces, 2.0 - 3.6 V Datasheet - production data Features • Core: ARM 32-bit Cortex-M0 CPU, frequency up to 48 MHz Memories – 16 to 32 Kbytes of Flash memory
|
Original
|
PDF
|
STM32F042x
32-bit
DocID025832
UQFPN28
|
WLCSP49
Abstract: No abstract text available
Text: STM32F401xB STM32F401xC ARM Cortex-M4 32b MCU+FPU, 105 DMIPS, 256KB Flash/64KB RAM, 10 TIMs, 1 ADC, 11 comm. interfaces Datasheet - production data Features • Core: ARM 32-bit Cortex -M4 CPU with FPU, Adaptive real-time accelerator ART Accelerator™ allowing 0-wait state execution
|
Original
|
PDF
|
STM32F401xB
STM32F401xC
256KB
Flash/64KB
32-bit
4-to-26
DocID024738
WLCSP49
|
Untitled
Abstract: No abstract text available
Text: STM32L053C6 STM32L053C8 STM32L053R6 STM32L053R8 Ultra-low-power 32-bit MCU ARM -based Cortex®-M0+, up to 64KB Flash, 8KB SRAM, 2KB EEPROM, LCD, USB, ADC, DAC Datasheet - production data Features • • • Ultra-low-power platform – 1.65 V to 3.6 V power supply
|
Original
|
PDF
|
STM32L053C6
STM32L053C8
STM32L053R6
STM32L053R8
32-bit
DocID025844
|
arm stm32 f103
Abstract: stm32f103z STM32F103VG STM32F103VF STM32F103ZG stm32f103xg stm32 f103 100 pin STM32F103Rx LQFP100 LQFP144
Text: STM32F103xF STM32F103xG XL-density performance line ARM-based 32-bit MCU with 768 KB to 1 MB Flash, USB, CAN, 17 timers, 3 ADCs, 13 communication interfaces Preliminary data Features FBGA • Core: ARM 32-bit Cortex -M3 CPU with MPU – 72 MHz maximum frequency,
|
Original
|
PDF
|
STM32F103xF
STM32F103xG
32-bit
arm stm32 f103
stm32f103z
STM32F103VG
STM32F103VF
STM32F103ZG
stm32f103xg
stm32 f103 100 pin
STM32F103Rx
LQFP100
LQFP144
|
STM32F100xC
Abstract: STM32F1 STM32F100 STM32F100RC intel 8080 RM0059 stm32F100vc STM32F100RE STM32F100xD LQFP100 footprint
Text: STM32F100xC STM32F100xD STM32F100xE High-density value line, advanced ARM-based 32-bit MCU with 256 to 512 KB Flash, 16 timers, ADC, DAC & 11 comm interfaces Features • Core: ARM 32-bit Cortex -M3 CPU – 24 MHz maximum frequency, 1.25 DMIPS /MHz Dhrystone 2.1 performance
|
Original
|
PDF
|
STM32F100xC
STM32F100xD
STM32F100xE
32-bit
4-to-24
STM32F100xC
STM32F1
STM32F100
STM32F100RC
intel 8080
RM0059
stm32F100vc
STM32F100RE
LQFP100 footprint
|