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    Text: O M lF < § » Ä T D [ i i] in te i 80960MC EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING-POINT UNIT AND MEMORY MANAGEMENT UNIT Military High-Performance Embedded Architecture — 25 MIPS Burst Execution at 25 MHz — 9.4 MIPS* Sustained Execution at


    OCR Scan     		80960MC 32-BIT 80-Bit 512-Byte LA051LADn 00fl7ti75 PDF