Untitled
Abstract: No abstract text available
Text: AS3953A 1 4 4 4 3 H i g h S p e e d P a s s i v e Ta g I n t e r f a c e 1 General Description The AS3953A supports ISO 14443A up to Level-4, meaning a contactless smart card or an NFC forum compatible tag Tag Type 4 can be built. Having a NFC Forum compatible tag interface allows
|
Original
|
PDF
|
AS3953A
AS3953A
4443A
|
Untitled
Abstract: No abstract text available
Text: A S3 9 5 3 1 44 4 3 H i g h S p e e d P a s s i v e Ta g I n te r fa c e 1 General Description The AS3953 supports ISO 14443A up to Level-4, meaning a contactless smart card or an NFC forum compatible tag Tag Type 4 can be built. Having a NFC Forum compatible tag interface allows
|
Original
|
PDF
|
AS3953
4443A
|
Untitled
Abstract: No abstract text available
Text: MV1821 Purchase of GEC Plessey I2C components conveys a licence under the Philips I2C Patent rights to use these components in an I2C System, provided that the system conforms to the I2C Standard Specification as defined by Philips. HEADQUARTERS OPERATIONS
|
Original
|
PDF
|
MV1821
9375MHz
MV1821
|
UPD 552 C
Abstract: LC1 D12 P7 XC2000 XC3000 XC4000 XC5200 XC5202 XC5204 XC5206 XC5210
Text: XC5200 Field Programmable Gate Arrays June 1, 1996 Version 4.0 Preliminary Product Specification Features • Fully supported by XACTstep Development System - Includes complete support for XACT-Performance™, X-BLOX™, Unified Libraries, Relationally Placed
|
Original
|
PDF
|
XC5200
PQ100
VQ100
XC5202
XC5204
XC5206
XC5210
XC5215
TQ144
PG156
UPD 552 C
LC1 D12 P7
XC2000
XC3000
XC4000
XC5200
XC5202
XC5204
XC5206
XC5210
|
LC1 D12 P7
Abstract: XC2000 XC3000 XC4000 XC5200 XC5202 XC5204 XC5206 XC5210 XC5215
Text: XC5200 Field Programmable Gate Arrays August 6, 1996 Version 4.01 Preliminary Product Specification Features • Fully supported by XACTstep Development System - Includes complete support for XACT-Performance™, X-BLOX™, Unified Libraries, Relationally Placed
|
Original
|
PDF
|
XC5200
PQ100
VQ100
XC5202
XC5204
XC5206
XC5210
XC5215
TQ144
PG156
LC1 D12 P7
XC2000
XC3000
XC4000
XC5200
XC5202
XC5204
XC5206
XC5210
XC5215
|
Untitled
Abstract: No abstract text available
Text: MV1822 Purchase of GEC Plessey I2C components conveys a licence under the Philips I2C Patent rights to use these components in an I2C System, provided that the system conforms to the I2C Standard Specification as defined by Philips. HEADQUARTERS OPERATIONS
|
Original
|
PDF
|
MV1822
602858F
MV1822
9375MHz
|
XC1728
Abstract: xc17256 XC2000 XC4000 XC5200 XC5202 XC5204 XC5206 XC5210 XC5215
Text: Technical Data R XC5200 Logic Cell Array Family Preliminary v1.0 • April 1995 R and XACT are registered trademarks of Xilinx. All XCprefix product designations, XACT-Performance, X-BLOX, XChecker, XDM, LCA, Logic Cell, Express, VersaBlock, and VersaRing are
|
Original
|
PDF
|
XC5200
PQ160
PG191
PQ208
PG223
PQ240
XC5206
XC5210
XC1728
xc17256
XC2000
XC4000
XC5200
XC5202
XC5204
XC5206
XC5210
XC5215
|
NL256204AM15-01
Abstract: nec 1167 CCF1N R451007 THC63LVD823 THC63LVD824 1167 circuit diagram add2 lvds TFT LCD DUAL PIXEL g22 touch
Text: DOD-M-1167 1/35 TFT MONOCHROME LCD MODULE NL256204AM15-01 51cm 20.1 Type QSXGA PRELIMINARY DATA SHEET (1st edition) All information is subject to change without notice. Please confirm the delivery specification before starting to design your system. NEC Corporation
|
Original
|
PDF
|
DOD-M-1167
NL256204AM15-01
DOD-M1167
NL256204AM15-01
nec 1167
CCF1N
R451007
THC63LVD823
THC63LVD824
1167 circuit diagram
add2 lvds
TFT LCD DUAL PIXEL
g22 touch
|
Untitled
Abstract: No abstract text available
Text: XC5200 Series Field Programmable Gate Arrays R November 5, 1998 Version 5.2 7* Product Specification Features - • Low-cost, register/latch rich, SRAM based reprogrammable architecture - 0.5µm three-layer metal CMOS process technology - 256 to 1936 logic cells (3,000 to 23,000 “gates”)
|
Original
|
PDF
|
XC5200
dedicated24
PQ160
TQ176
PG191
HQ208
PQ208
PG223
BG225
HQ240
|
X9009
Abstract: r13-112 switch XC3000 XC4000 XC5200 XC5202 XC5204 XC5206 X-9009 XC5215
Text: XC5200 Series Field Programmable Gate Arrays R November 5, 1998 Version 5.2 7* Product Specification Features - • Low-cost, register/latch rich, SRAM based reprogrammable architecture - 0.5µm three-layer metal CMOS process technology - 256 to 1936 logic cells (3,000 to 23,000 “gates”)
|
Original
|
PDF
|
XC5200
PQ160
TQ176
PG191
HQ208
PQ208
PG223
BG225
HQ240
PQ240
X9009
r13-112 switch
XC3000
XC4000
XC5202
XC5204
XC5206
X-9009
XC5215
|
KS57C3016
Abstract: 114CH
Text: KS57C3016 S M SUN G 4-BIT CMOS Microcontroller Product Specification OVERVIEW The KS57C3016 single-chip CMOS microcontroller is designed for very high performance using Samsung's newest 4-bit development approach, SAM4 Samsung Arrangeable Microcontrollers . With an up-to-16-digit LCD
|
Original
|
PDF
|
KS57C3016
KS57C3016
up-to-16-digit
100-pin
114CH
|
LC1 D18 wiring diagram
Abstract: 8165 input chip chart XC520 XC5200 Family XC5202 XC5204 XC5206 XC5210 XC5215 XC3000
Text: Product Obsolete or Under Obsolescence XC5200 Series Field Programmable Gate Arrays R November 5, 1998 Version 5.2 7* Product Specification Features - • Low-cost, register/latch rich, SRAM based reprogrammable architecture - 0.5µm three-layer metal CMOS process technology
|
Original
|
PDF
|
XC5200
PQ160
TQ176
PG191
HQ208
PQ208
PG223
BG225
HQ240
PQ240
LC1 D18 wiring diagram
8165 input chip chart
XC520
XC5200 Family
XC5202
XC5204
XC5206
XC5210
XC5215
XC3000
|
AS 108-120
Abstract: LC1 D12 10 K1882 nec d 882 p datasheet XAPP 138 data XC5200 XC3000 XC4000 XC5202 XC5204
Text: XC5200 Series Field Programmable Gate Arrays R November 5, 1998 Version 5.2 7* Product Specification Features - • Low-cost, register/latch rich, SRAM based reprogrammable architecture - 0.5µm three-layer metal CMOS process technology - 256 to 1936 logic cells (3,000 to 23,000 “gates”)
|
Original
|
PDF
|
XC5200
TQ176
PG191
HQ208
PQ208
PG223
BG225
HQ240
PQ240
XC5210-6PQ208C
AS 108-120
LC1 D12 10
K1882
nec d 882 p datasheet
XAPP 138 data
XC3000
XC4000
XC5202
XC5204
|
AS 108-120
Abstract: LC1 D12 10 LC1 D18 wiring diagram X4963 LC1 D12 P7 XC3000 XC4000 XC5200 XAPP 017 XC5204
Text: 1 1 XC5200 Series Field Programmable Gate Arrays December 10, 1997 Version 5.0 1 4* Features Product Specification • • Low-cost, process-optimized, register/latch rich, SRAM based reprogrammable architecture - 0.5µm three-layer metal CMOS process technology
|
Original
|
PDF
|
XC5200
XC5202
XC5204
XC5206
XC5210
XC5215
PQ100
VQ100
TQ144
PG156
AS 108-120
LC1 D12 10
LC1 D18 wiring diagram
X4963
LC1 D12 P7
XC3000
XC4000
XAPP 017
XC5204
|
|
Untitled
Abstract: No abstract text available
Text: NS9775 Datasheet The NetSilicon NS9775 is a high-performance, 32-bit microprocessor for color network printers and multi-function devices. Integrating an ARM926EJ-S processor core with 10/100BaseT Ethernet, USB, IEEE 1284 interfaces, a 4-channel video interface with four inline JBIG decompressors LCD
|
Original
|
PDF
|
NS9775
32-bit
ARM926EJ-S
10/100BaseT
|
NS9750B
Abstract: HFP15 RMII PHY ARM926EJ-S SN74LVC1GU04 NS9750B-A1 NS9750 M25AD PCI AHB DMA ae1 tft
Text: NS9750B-A1 Datasheet The Digi NS9750B-A1 is a single chip 0.13 m CMOS network-attached processor. The CPU is the ARM926EJ-S core with MMU, DSP extensions, Jazelle Java accelerator, and 8 kB of instruction cache and 4 kB of data cache in a Harvard architecture. The NS9750B-A1 runs up to 200 MHz, with a 100
|
Original
|
PDF
|
NS9750B-A1
ARM926EJ-S
ARM926EJ-S
125MHz
NS9750B
HFP15
RMII PHY
SN74LVC1GU04
NS9750
M25AD
PCI AHB DMA
ae1 tft
|
Untitled
Abstract: No abstract text available
Text: GEC PLESSEY ADVANCE INFORMATION S T M I C O N D L1 C T O K S MV1821 VIDEO CASSETTE RECORDER PDC AND VPS INTERFACE CIRCUIT The MV1821 is a member of the Enhanced Video Automation EVA family for receiving Programme Delivery Control (PDC) messages broadcast in World System Teletext
|
OCR Scan
|
PDF
|
MV1821
MV1821
|
Untitled
Abstract: No abstract text available
Text: w GEC PLESSEY S E M I C O N D U C T O R S MV1821 VIDEO CASSETTE RECORDER PDC AND VPS INTERFACE CIRCUIT Supersedes version in April 1994 Consumer 1C Handbook, HB3120-2.0 The MV1821 is a member of the Enhanced Video Automation (EVA) family for receiving Programme Delivery
|
OCR Scan
|
PDF
|
MV1821
HB3120-2
MV1821
QD25337
|
Untitled
Abstract: No abstract text available
Text: Si GEC PLESSEY ADVANCE INFORMATION S E M I C O N D U C T O R S D.S. 3913 3.0 M V 1 8 2 2 PDC, VPS AND TIME RECEIVER Supersedes version in October 1995 Media 1C Handbook, HB3120 -3 .0 The MV1822 is a member of the Enhanced Video Automation (EVA) family for receiving Programme Delivery
|
OCR Scan
|
PDF
|
HB3120
MV1822
37bfl522
MV1822
MV1822,
160ms
37bB522
E74b2
|
TMS34082
Abstract: CID20 TMS34082A TMS34082B-40 MSA15-0 TMS34020 emulator
Text: TMS34082A, TMS34082B GRAPHICS FLOATING-POINT PROCESSOR SCGS001A - D315Q, SEPTEMBER 1988 - REVISED SEPTEMBER 1992 • High-Performance Floating-Point RISC Processor Optimized for Graphics • TWo Operating Modes - Floating-Point Coprocessor for TMS34020 Graphics System Processor
|
OCR Scan
|
PDF
|
TMS34082A,
TMS34082B
SCGS001A
D315Q,
TMS34020
TMS34082
TMS34082A-40,
TMS34082B-40
CID20
TMS34082A
MSA15-0
TMS34020 emulator
|
Untitled
Abstract: No abstract text available
Text: SMJ34082A GRAPHICS FLOATING-POINT PROCESSOR SGUS012A - D3592. SEPTEMBER 1 9 9 0 - REVISED MAY 1991 • Military Temperature Range ~55°C to • Sequencer Executes Internal or User-Programmed Instructions 125°C • Class B, High-Reliability Processing •
|
OCR Scan
|
PDF
|
SMJ34082A
SGUS012A
D3592.
64-Bit
SMJ34020
Subtrati54
D3592,
S6US012A_
|
Untitled
Abstract: No abstract text available
Text: K S57C 3016 4-BIT CMOS Microcontroller ELEC TR ONIC S Product Specification OVERVIEW The KS57C3016 single-chip CMOS microcontroller is designed for very high performance using Samsung's newest 4-bit development approach, SAM4 Samsung Arrangeable Microcontrollers . With an up-to-16-digit LCD
|
OCR Scan
|
PDF
|
KS57C3016
up-to-16-digit
100-pin
KS57C3016â
D02fei73Q
71b4142
002b731
|
Untitled
Abstract: No abstract text available
Text: GEC PLESSEY S i PRELIMINARY INFORMATION SEMICONDUCTORS MV1822 PDC, VPS AND TIME RECEIVER The MV1822 is a member of the Enhanced Video Automation EVA family for receiving Programme Delivery Control (PDC) messages, packet 8/30 Format 2, broadcast in World System Teletext (WST). It will automatically switch to
|
OCR Scan
|
PDF
|
MV1822
MV1822
002534b
MV1822,
625x64
isx64
160ms
G025347
|
Untitled
Abstract: No abstract text available
Text: SAMSUN KS 57 C 3016 4-BIT CMOS Microcontroller Product Specification OVERVIEW The KS57C3016 single-chip CMOS microcontroller is designed for very high performance using Samsung's newest 4-bit development approach, SAM4 Samsung Arrangeable Microcontrollers . With an up-to-16-digit LCD
|
OCR Scan
|
PDF
|
KS57C3016
up-to-16-digit
100-pin
100-TQFP-1420A
003b2fl3
|