Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    LCC 124 PIN Search Results

    LCC 124 PIN Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    CS-DSDMDB09MF-010 Amphenol Cables on Demand Amphenol CS-DSDMDB09MF-010 9-Pin (DB9) Deluxe D-Sub Cable - Copper Shielded - Male / Female 10ft Datasheet
    CS-DSDMDB15MF-002.5 Amphenol Cables on Demand Amphenol CS-DSDMDB15MF-002.5 15-Pin (DB15) Deluxe D-Sub Cable - Copper Shielded - Male / Female 2.5ft Datasheet
    CS-DSDMDB15MM-025 Amphenol Cables on Demand Amphenol CS-DSDMDB15MM-025 15-Pin (DB15) Deluxe D-Sub Cable - Copper Shielded - Male / Male 25ft Datasheet
    CS-DSDMDB25MM-010 Amphenol Cables on Demand Amphenol CS-DSDMDB25MM-010 25-Pin (DB25) Deluxe D-Sub Cable - Copper Shielded - Male / Male 10ft Datasheet
    CS-DSDMDB37MM-002.5 Amphenol Cables on Demand Amphenol CS-DSDMDB37MM-002.5 37-Pin (DB37) Deluxe D-Sub Cable - Copper Shielded - Male / Male 2.5ft Datasheet

    LCC 124 PIN Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    UM61256FK-15

    Abstract: YD 6409 philips diode PH 33J um61256 um61256ak-15 PZ 5805 PHILIPS UM6164 KM6264BLS-7 UM61256ak sram IDT8M624
    Text: QUICKSWITCH PRODUCTS HIGH-SPEED CMOS QUICKSWITCH QUAD 2:1 MUX/DEMUX QS3257 QS32257 FEATURES/BENEFITS DESCRIPTION • • • • • • • • The QS3257 is a high-speed CMOS LVTTL-compatible Quad 2:1 multiplexer/demultiplexer. The QS3257 is a function and pinout compatible QuickSwitch


    Original     		74F257, 74FCT257, 74FCT257T QS32257 QS3257 QS32257 UM61256FK-15 YD 6409 philips diode PH 33J um61256 um61256ak-15 PZ 5805 PHILIPS UM6164 KM6264BLS-7 UM61256ak sram IDT8M624 PDF

    Untitled

    Abstract: No abstract text available
    Text: Commercial/Industrial PA7572 PEEL Array Programmable Electrically Erasable Logic Array CMOS Electrically Erasable Technology - Reprogrammable in 40-pin DIP, 44-pin PLCC and TQFP packages Versatile Logic Array Architecture - 24 I/Os, 14 inputs, 60 registers/latches


    Original     		PA7572 13ns/20ns PDF

    THX 201

    Abstract: PA7572 PEEL programming Anachip USA
    Text: PA7572 PEEL Array Programmable Electrically Erasable Logic Array CMOS Electrically Erasable Technology - Reprogrammable in 40-pin DIP, 44-pin PLCC and TQFP packages Flexible Logic Cell - Up to 3 output functions per logic cell - D,T and JK registers with special features


    Original     		PA7572 40-pin 44-pin 4-02-050A THX 201 PEEL programming Anachip USA PDF

    THX 201

    Abstract: PA7572 "Programmable Electrically Erasable Logic Array" loadable counter with timing diagram PA7572P-20 PA7572F-20
    Text: PA7572 PEEL Array Programmable Electrically Erasable Logic Array CMOS Electrically Erasable Technology - Reprogrammable in 40-pin DIP, 44-pin PLCC and TQFP packages Flexible Logic Cell - Up to 3 output functions per logic cell - D,T and JK registers with special features


    Original     		PA7572 40-pin 44-pin THX 201 "Programmable Electrically Erasable Logic Array" loadable counter with timing diagram PA7572P-20 PA7572F-20 PDF

    Untitled

    Abstract: No abstract text available
    Text: Commercial/Industrial PA7572 PEEL Array Programmable Electrically Erasable Logic Array CMOS Electrically Erasable Technology - Reprogrammable in 40-pin DIP, 44-pin PLCC and TQFP packages Versatile Logic Array Architecture - 24 I/Os, 14 inputs, 60 registers/latches


    Original     		PA7572 13ns/20ns 4-02-050A PDF

    Untitled

    Abstract: No abstract text available
    Text: To find out if the package you need is available, contact Customer Service PA7572 PEEL Array Programmable Electrically Erasable Logic Array CMOS Electrically Erasable Technology - Reprogrammable in 40-pin DIP, 44-pin PLCC and TQFP packages Flexible Logic Cell


    Original     		PA7572 13ns/20ns PDF

    Untitled

    Abstract: No abstract text available
    Text: A Table Of Contents ^Arrays Pages Pin Grid Arrays / Zero Insertion Force PG A/ZIF PG A/ZIF PG A/ZIF Open top PG A/ZIF (Interstitial) PGA / ZIF (Open Top, Interstitial) NP89 NP161 NP171 NP236 NP178 9-10 11-12 13-14 15-16 17-18 IC264 NP276 19 20-21 Ball Grid Arrays


    OCR Scan     		NP161 NP171 NP236 NP178 IC264 NP276 IC280 NP291 NP351 IC-176 PDF

    Untitled

    Abstract: No abstract text available
    Text: L O G IC D E V IC E S IN C 2bE D • S S tS ^ O S Q Four 8-bit Registers □ Implements Double 2-Stage Pipe­ line or Single 4-Stage Pipeline Register Q Hold, Shift, Load Instructions □ Separate Data In and Data Out Pins Q High Speed, Low Power CMOS Technology


    OCR Scan     		MILSTD-883, AM29520 AM29521 24-pin 28-pin L29C520/521 PDF

    51C55

    Abstract: l 7251 3.1 HCA6306 motorola gate array CERAMIC LEADLESS CHIP CARRIER LCC 124 HCA6348
    Text: MO T OR O LA SC -CM EdORY/ASIO SI De | 636,7251 M O T O R O L A SC MEMORY/ASIC HDSiiLnfi ! 31C 55658 H J • - T - 42-'H~ O') J HGA6300 SERIES GENERAL DESCRIPTION The periphery consists of input and I/O buffer cells used to implement the interface between the internal array and


    OCR Scan     		HGA6300 HCA6300 HCA6306 HCA6312 HCA6324 HCA6348 HCA6306 HCA6312 HCA6324 HCA6348 51C55 l 7251 3.1 motorola gate array CERAMIC LEADLESS CHIP CARRIER LCC 124 PDF

    philips diode PH 33J

    Abstract: UM61256FK-15 sem 2106 inverter diagram IDT7024L70GB um61256 UM61256ak sram um61256fk15 HIGH VOLTAGE ISOLATION DZ 2101 C5584 IDT74LVC1G07ADY
    Text: QUICKSWITCH PRODUCTS HIGH-SPEED LOW POWER CMOS 10-BIT BUS SWITCHES QS3L384 QS3L2384 FEATURES/BENEFITS DESCRIPTION • • • • • • • • • The QS3L384 and QS3L2384 provide a set of ten high-speed CMOS TTL-compatible bus switches. The low ON resistance of the QS3L384 allows inputs to be connected to outputs without


    Original     		10-BIT QS3L384) QS3L2384 QS3L384 QS3L2384 philips diode PH 33J UM61256FK-15 sem 2106 inverter diagram IDT7024L70GB um61256 UM61256ak sram um61256fk15 HIGH VOLTAGE ISOLATION DZ 2101 C5584 IDT74LVC1G07ADY PDF

    Untitled

    Abstract: No abstract text available
    Text: / g x _ ^ VME 3000/3010 September 1989 VMEbus _ Interrupt Generator Distinctive Features_ Applications_ • • • • • • • • • Provides random logic and high current drive for VMEbus interrupt generator in 300 mil 24 pin DIP or 28


    OCR Scan     		VME3000 300mil PDF

    240x320 Color LCD 37 pin

    Abstract: 240x320 Color LCD 39 pin IS61WV51216 IS61WV51216BLL-44TSOP 240x320 Color LCD schematic SST25VF016B-75-4I-S2AF SST25VF016B754IS2AF A30-A31 IS61WV51216BLL AC162039
    Text: TABLE 1: SIGNAL INTERFACE FOR DISPLAY CONNECTOR CONTINUED Pin No. Symbol Level Description B27 CS I/O A28 SCK I/O B28 SDO (MOSI) I/O B29 SDI (MISO) I/O A30-A31, B30-B31 A32, B32 NC GND — GND Can be used for SPI Chip Select (CS) or as general purpose I/O


    Original     		A30-A31, B30-B31 SST25VF016B-75-4I-S2AF CL570-0203 FX10A-120S/12-SV LM1117MPX-3 LM1117MPX-5 DS51966A 240x320 Color LCD 37 pin 240x320 Color LCD 39 pin IS61WV51216 IS61WV51216BLL-44TSOP 240x320 Color LCD schematic SST25VF016B-75-4I-S2AF SST25VF016B754IS2AF A30-A31 IS61WV51216BLL AC162039 PDF

    Untitled

    Abstract: No abstract text available
    Text: EPM 7128 E P LD □ □ □ Information □ □ Figure 21. EPM7128 Package Pin-Out Diagrams Package outlines not drawn to scale. See Tables 7 and 8 in this data sheet for pin-out information. o q o q z q q q nnnnnnn nn nn nn nn nn nn nn Pin 1 I/O c I □ I/O


    OCR Scan     		EPM7128 PDF

    Untitled

    Abstract: No abstract text available
    Text: -d % — - anuEH Fi 1 COMPONENTS fl AC552 30 TO 500 MHz TO-8 CASCADABLE AC552 Typical Values High Gain. Low Noise F ig u r e .


    OCR Scan     		AC552 PDF

    EPM7160

    Abstract: J-Lead, QFP 6773E
    Text: EPM7160 EPLD □ □ □ □ Figure 25. EPM7160 Package Pin-Out Diagrams Package outlines not drawn to scale. See Tables 9 and 10 in this data sheet for pin-out intormation. nnnnnnnnnnnnnnnnnnnnn I/Oc I □ I □ ! D □ I 3 vcc c I/O c I/o c Æ n n iü ô S v


    OCR Scan     		EPM7160 84-pin 160-pin 100-Pin J-Lead, QFP 6773E PDF

    ICT Peel

    Abstract: PA7572
    Text: Commercial/Industrial PA7572 PEEL Array Programmable Electrically Erasable Logic Array CMOS Electrically Erasable Technology - Reprogrammable in 40-pin DIP, 44-pin PLCC and TQFP packages Flexible Logic Cell - Up to 3 output functions per logic cell - D,T and JK registers with special features


    Original     		PA7572 40-pin 44-pin 4-02-050A ICT Peel PDF

    PAS109B

    Abstract: 16JL monochrome cmos IMAGE SENSOR cmos image sensor D0001100000111000111 qqvga 60fps
    Text: p & iP t 100011000001110001110 011100011110000001110 100011000011000001110 U O I1 1 0 0 1 1 1 0 0 0 1 1 1 1 oooc PAS109B • QQVGA COLOR CMOS IMAGE SENSO 0000111000111000011100111001110 T t1000111100000011100001110000110000 10001100001100000111000111000011100111


    OCR Scan     		D0001100000111000111 PAS109B PAS109B proprietary0011000001110001110000111001 16JL monochrome cmos IMAGE SENSOR cmos image sensor D0001100000111000111 qqvga 60fps PDF

    Untitled

    Abstract: No abstract text available
    Text: ADVANCED INTERCONNECTIONS LCC Adapters 5 Energy Way, P.O. Box 1019, West Warwick, Rl 02893 Tel. 401-823-5200 Adapters for Jedec .050" 1.27 mm Pitch Chip Carriers FAX 401-823-8723 (Leadless Type B, C & D) Features: • Adapter allows present LCC devices to be solderable or socketable.


    OCR Scan     		1705-20-S 1705-20-SP 1705-28-S 1705-28-SP 1705-44-S 1705-44-SP 1705-52-SP 1705-68-S 1705-68-SP 1705-84-S PDF

    Untitled

    Abstract: No abstract text available
    Text: ADVANCED LCC Adapters INTERCONNECTIONS. 5 Energy Way, P.0. Box 1019, West Warwick, Rl 02893 USA Tel. 800-424-9850 / 401-823-5200 •Fax 401-823-8723-Email advintcorp@aol.com • Internet http://www.advintcorp.com Adapters for Jedec .050" 1.27mm Pitch LCC’s


    OCR Scan     		401-823-8723-Email t05-44-SP 1705-52-SP 1705-68-S 1705-68-SP 1705-84-S 1705-84-SP 1705-100-S 1705-100-SP 1705-124-S PDF

    Untitled

    Abstract: No abstract text available
    Text: INTERNATIONAL CMOS TECHNOLOGY, INC. Preliminary Data TM PA7040 PEEL Array CMOS Programmable Electrically Erasable Logic Array Features Flexible Architecture User-Configurable High Density Logic Array — — — — Create multi-level l/O-buried logic circuits


    OCR Scan     		PA7040 120mA PDF

    pin diagram and block diagram of 74ls74

    Abstract: TTL 74LS74 Micron TLC 74ls74 timing setup hold pin DIAGRAM OF IC 74ls74
    Text: nn.„ n r u u u lu AMI • Semiconductors CMOS Programmable Electrically Erasable Logic Amy Device Preliminary Data PEEL PA7040 General Description Features U ser-C o n fig u ra b le High D ensity Lo g ic A rray • • • • Create multi-level l/O-buried logic circuits


    OCR Scan     		PA7040 PA7040 PA7040s pin diagram and block diagram of 74ls74 TTL 74LS74 Micron TLC 74ls74 timing setup hold pin DIAGRAM OF IC 74ls74 PDF

    C620

    Abstract: No abstract text available
    Text: Z-COMMUNICATIONS INC 4SE 0GD03SU D Z~Communications, Inc. 2 « Z C I VCO MODEL C-620 9939 Via Pasar • San Diego, California 92126 Phone 619 621-2700 FAX (619) 621 -2722 T 5 0-tS r P A G E 1 PHASE NOISE (1Hz BW) (TYP) FEATURES Small Size Pin Version Fast Tuning


    OCR Scan     		0GD03SU C-620 10KHz CS-1191 C620 PDF

    Untitled

    Abstract: No abstract text available
    Text: . MICRON TECHNOLOGY INC I m C Z R O N MT5C1001 883C 1 MEG X ! SRAM _ SSE D • 1 MEGx 1 SRAM AVAILABLE AS MILITARY SPECIFICATIONS PIN ASSIGNMENT Top View • MIL-STD-883, Class B • Radiation tolerant (consult factory) 28-Pin DIP


    OCR Scan     		MT5C1001 MIL-STD-883, 28-Pin 32-Pin MIL-STD-883 MT5CJ001 PDF

    LD3320

    Abstract: No abstract text available
    Text: L O G IC D E V IC E S IN C 2bE D • S S tS ^ O S Q Four 8-bit Registers □ Implements Double 2-Stage Pipe­ line or Single 4-Stage Pipeline Register Q Hold, Shift, Load Instructions □ Separate Data In and Data Out Pins Q High Speed, Low Power CMOS Technology


    OCR Scan     		L29C520/521 MIL-STD-883, AM29520 AM29521 24-pin 28-pin LD3320 PDF