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    MARK V58 Search Results

    MARK V58 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    MG8097/B Rochester Electronics LLC 8097 - Math Coprocessor - Dual marked (8506301ZA) Visit Rochester Electronics LLC Buy
    5490/BCA Rochester Electronics LLC 5490 - Decade Counter - Dual marked (M38510/01307BCA) Visit Rochester Electronics LLC Buy
    5405/BCA Rochester Electronics LLC 5405 - Gate - Dual marked (M38510/00108BCA) Visit Rochester Electronics LLC Buy
    54AC20/SDA-R Rochester Electronics LLC 54AC20/SDA-R - Dual marked (M38510R75003SDA) Visit Rochester Electronics LLC Buy
    UHD503R/883 Rochester Electronics LLC UHD503R/883 - Dual marked (5962-8855101CA) Visit Rochester Electronics LLC Buy

    MARK V58 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: V58C2256324SA HIGH PERFORMANCE LOW POWER 2.5 VOLT 8M X 32 DDR SDRAM 4 BANKS X 2M X 32 28 33 36 4 5 System Frequency fCK 350 MHz 300 MHz 275 MHz 250MHz 200MHz Clock Cycle Time (tCK3) 4.0 4.0 4.5 5.0 6.0 Clock Cycle Time (tCK4) 3.3 3.3 3.6 4.0 5.0 Clock Cycle Time (tCK5)


    Original     		PDF V58C2256324SA 250MHz 200MHz V58C2256324SA

    V58C2256324

    Abstract: No abstract text available
    Text: V58C2256324SA HIGH PERFORMANCE LOW POWER 2.5 VOLT 8M X 32 DDR SDRAM 4 BANKS X 2M X 32 28 33 36 4 5 System Frequency fCK 350 MHz 300 MHz 275 MHz 250MHz 200MHz Clock Cycle Time (tCK3) 4.0 4.0 4.5 5.0 6.0 Clock Cycle Time (tCK4) 3.3 3.3 3.6 4.0 5.0 Clock Cycle Time (tCK5)


    Original     		PDF V58C2256324SA 250MHz 200MHz V58C2256324

    Untitled

    Abstract: No abstract text available
    Text: V58C2256324SA HIGH PERFORMANCE LOW POWER 2.5 VOLT 8M X 32 DDR SDRAM 4 BANKS X 2M X 32 28 33 36 4 5 System Frequency fCK 350 MHz 300 MHz 275 MHz 250MHz 200MHz Clock Cycle Time (tCK3) 4.0 4.0 4.5 5.0 6.0 Clock Cycle Time (tCK4) 3.3 3.3 3.6 4.0 5.0 Clock Cycle Time (tCK5)


    Original     		PDF V58C2256324SA 250MHz 200MHz

    Untitled

    Abstract: No abstract text available
    Text: V58C2256324SA HIGH PERFORMANCE LOW POWER 2.5 VOLT 8M X 32 DDR SDRAM 4 BANKS X 2M X 32 28 33 36 4A 4 5 System Frequency fCK 350 MHz 300 MHz 275 MHz 250 MHz 250 MHz 200 MHz Clock Cycle Time (tCK3) 4.0 4.0 4.0 4.0 5.0 5.0 Clock Cycle Time (tCK4) 3.3 3.3 3.6


    Original     		PDF V58C2256324SA

    DMX chip

    Abstract: No abstract text available
    Text: V58C2256324SA HIGH PERFORMANCE LOW POWER 2.5 VOLT 8M X 32 DDR SDRAM 4 BANKS X 2M X 32 28 33 36 4A 4 5 System Frequency fCK 350 MHz 300 MHz 275 MHz 250 MHz 250 MHz 200 MHz Clock Cycle Time (tCK3) 4.0 4.0 4.0 4.0 5.0 5.0 Clock Cycle Time (tCK4) 3.3 3.3 3.6


    Original     		PDF V58C2256324SA DMX chip

    V58C2256324SA

    Abstract: No abstract text available
    Text: V58C2256324SA HIGH PERFORMANCE LOW POWER 2.5 VOLT 8M X 32 DDR SDRAM 4 BANKS X 2M X 32 28 30 33 36 4A 4 5 System Frequency fCK 350 MHz 333 MHz 300 MHz 275 MHz 250 MHz 250 MHz 200 MHz Clock Cycle Time (tCK3) 4.0 4.0 4.0 4.0 4.0 5.0 5.0 Clock Cycle Time (tCK4)


    Original     		PDF V58C2256324SA V58C2256324SA

    Untitled

    Abstract: No abstract text available
    Text: V58C2256324SA HIGH PERFORMANCE LOW POWER 2.5 VOLT 8M X 32 DDR SDRAM 4 BANKS X 2M X 32 28 33 36 40 System Frequency fCK 350 MHz 300 MHz 275 MHz 250MHz Clock Cycle Time (tCK3) 4.0 4.0 4.5 5.0 Clock Cycle Time (tCK4) 3.3 3.3 3.6 4.0 Clock Cycle Time (tCK5)


    Original     		PDF V58C2256324SA 250MHz

    Untitled

    Abstract: No abstract text available
    Text: V58C2256324SA HIGH PERFORMANCE LOW POWER 2.5 VOLT 8M X 32 DDR SDRAM 4 BANKS X 2M X 32 28 3 33 36 4A 4 5 System Frequency fCK 350 MHz 333 MHz 300 MHz 275 MHz 250 MHz 250 MHz 200 MHz Clock Cycle Time (tCK3) 4.0 4.0 4.0 4.0 4.0 5.0 5.0 Clock Cycle Time (tCK4)


    Original     		PDF V58C2256324SA

    NC7SV57

    Abstract: NC7SV57L6X NC7SV57P6X NC7SV58 NC7SV58L6X NC7SV58P6X
    Text: Revised March 2004 NC7SV57 • NC7SV58 TinyLogic ULP-A Universal Configurable 2-Input Logic Gates General Description Features The NC7SV57 and NC7SV58 are universal configurable 2-input logic gates from Fairchild’s Ultra Low Power ULP-A Series of TinyLogic. ULP-A is ideal for applications that require extreme high speed, high drive and low


    Original     		PDF NC7SV57 NC7SV58 NC7SV57 NC7SV58 NC7SV57L6X NC7SV57P6X NC7SV58L6X NC7SV58P6X

    pin configuration of logic gates

    Abstract: NC7SV57 NC7SV57FHX NC7SV57L6X NC7SV57P6X NC7SV58 NC7SV58FHX NC7SV58L6X NC7SV58P6X logic gates pin configuration
    Text: NC7SV57 / NC7SV58 TinyLogic ULP-A Universal Configurable Two-Input Logic Gates Features Description ƒ ƒ 0.9V to 3.6V VCC Supply Operation ƒ Extremely High Speed tPD - 2.5ns: Typical for 2.7V to 3.6V VCC - 3.1ns: Typical for 2.3V to 2.7V VCC - 4.0ns: Typical for 1.65V to 1.95V VCC


    Original     		PDF NC7SV57 NC7SV58 NC7SV58 NC7SV57 NC7V58 pin configuration of logic gates NC7SV57FHX NC7SV57L6X NC7SV57P6X NC7SV58FHX NC7SV58L6X NC7SV58P6X logic gates pin configuration

    NC7SV57

    Abstract: NC7SV57L6X NC7SV57P6X NC7SV58 NC7SV58L6X NC7SV58P6X
    Text: Revised June 2002 NC7SV57 • NC7SV58 TinyLogic ULP-A Universal Configurable 2-Input Logic Gates General Description Features The NC7SV57 and NC7SV58 are universal configurable 2-input logic gates from Fairchild’s Ultra Low Power ULP-A Series of TinyLogic. ULP-A is ideal for applications


    Original     		PDF NC7SV57 NC7SV58 NC7SV57 NC7SV58 NC7SV57L6X NC7SV57P6X NC7SV58L6X NC7SV58P6X

    NC7SV57

    Abstract: NC7SV57P6X NC7SV58 NC7SV58L6X NC7SV58P6X NC7SV57L6X 2-input XOR using 4 2-input NAND gates mark v58 NC7SV57P6
    Text: Revised January 2003 NC7SV57 • NC7SV58 TinyLogic ULP-A Universal Configurable 2-Input Logic Gates General Description Features The NC7SV57 and NC7SV58 are universal configurable 2-input logic gates from Fairchild’s Ultra Low Power ULP-A Series of TinyLogic. ULP-A is ideal for applications that require extreme high speed, high drive and low


    Original     		PDF NC7SV57 NC7SV58 NC7SV57 NC7SV58 NC7SV57P6X NC7SV58L6X NC7SV58P6X NC7SV57L6X 2-input XOR using 4 2-input NAND gates mark v58 NC7SV57P6

    NC7SV57

    Abstract: No abstract text available
    Text: NC7SV57 / NC7SV58 TinyLogic ULP-A Universal Configurable Two-Input Logic Gates Features Description ̇ ̇ 0.9V to 3.6V VCC Supply Operation ̇ Extremely High Speed tPD - 2.5ns: Typical for 2.7V to 3.6V VCC - 3.1ns: Typical for 2.3V to 2.7V VCC - 4.0ns: Typical for 1.65V to 1.95V VCC


    Original     		PDF NC7SV57 NC7SV58 NC7SV58 NC7SV57 NC7V58

    NC7SV57

    Abstract: No abstract text available
    Text: Revised September 2002 NC7SV57 • NC7SV58 TinyLogic ULP-A Universal Configurable 2-Input Logic Gates General Description Features The NC7SV57 and NC7SV58 are universal configurable 2-input logic gates from Fairchild’s Ultra Low Power ULP-A Series of TinyLogic. ULP-A is ideal for applications


    Original     		PDF NC7SV57 NC7SV58 NC7SV57

    NC7SV57

    Abstract: CMOS XNOR Gates NC7SV57FHX NC7SV57L6X NC7SV57P6X NC7SV58 NC7SV58FHX NC7SV58L6X NC7SV58P6X TinyLogic h4
    Text: NC7SV57 / NC7SV58 TinyLogic ULP-A Universal Configurable Two-Input Logic Gates Features Description ƒ ƒ 0.9V to 3.6V VCC Supply Operation ƒ Extremely High Speed tPD - 2.5ns: Typical for 2.7V to 3.6V VCC - 3.1ns: Typical for 2.3V to 2.7V VCC - 4.0ns: Typical for 1.65V to 1.95V VCC


    Original     		PDF NC7SV57 NC7SV58 NC7SV58 NC7SV57 NC7V58 CMOS XNOR Gates NC7SV57FHX NC7SV57L6X NC7SV57P6X NC7SV58FHX NC7SV58L6X NC7SV58P6X TinyLogic h4

    logic gates pin configuration

    Abstract: pin configuration of logic gates 2-input-XNOR using nand and not NC7SV58FHX NC7SV57 NC7SV57FHX NC7SV57L6X NC7SV57P6X NC7SV58 NC7SV58L6X
    Text: NC7SV57 / NC7SV58 TinyLogic ULP-A Universal Configurable Two-Input Logic Gates Features Description ƒ ƒ 0.9V to 3.6V VCC Supply Operation ƒ Extremely High Speed tPD - 2.5ns: Typical for 2.7V to 3.6V VCC - 3.1ns: Typical for 2.3V to 2.7V VCC - 4.0ns: Typical for 1.65V to 1.95V VCC


    Original     		PDF NC7SV57 NC7SV58 NC7SV58 NC7SV57 NC7V58 logic gates pin configuration pin configuration of logic gates 2-input-XNOR using nand and not NC7SV58FHX NC7SV57FHX NC7SV57L6X NC7SV57P6X NC7SV58L6X

    Untitled

    Abstract: No abstract text available
    Text: V58C3643204SAT HIGH PERFORMANCE 3.3 VOLT 2M X 32 DDR SDRAM 4 X 512K X 32 MOSEL VITELIC System Frequency fCK 45 50 55 60 250MHz 200 MHz 183 MHz 166 MHz 5 ns 5.5 ns 6 ns Clock Cycle Time (tCK3) Clock Cycle Time (tCK4) PRELIMINARY 4.5 ns Features Description


    Original     		PDF V58C3643204SAT 250MHz

    ba 5888

    Abstract: V58C3643204SAT
    Text: MOSEL VITELIC V58C3643204SAT HIGH PERFORMANCE 3.3 VOLT 2M X 32 DDR SDRAM 4 X 512K X 32 System Frequency fCK 45 50 55 60 225MHz 200 MHz 183 MHz 166 MHz 5 ns 5.5 ns 6 ns Clock Cycle Time (tCK3) Clock Cycle Time (tCK4) PRELIMINARY 4.5 ns Features Description


    Original     		PDF V58C3643204SAT 225MHz ba 5888 V58C3643204SAT

    R61509V

    Abstract: S695 diode
    Text: Target Spec R61509V 260k-color, 240RGB x 432-dot graphics liquid crystal controller driver for Amorphous-Silicon TFT Panel REJxxxxxxx-xxxx Rev.0.11 April 25, 2008 Description . 6


    Original     		PDF R61509V 260k-color, 240RGB 432-dot R61509 R61509V. R61509V S695 diode

    ba 5888

    Abstract: No abstract text available
    Text: V58C365164SAT HIGH PERFORMANCE 3.3 VOLT 4M X 16 DDR SDRAM 4 BANKS X 1Mbit X 16 MOSEL VITELIC PRELIMINARY 55 6 7 8 System Frequency fCK 183 MHz 166 MHz 143 MHz 125 MHz Clock Cycle Time (tCK3) 5.5 ns 6 ns 7 ns 8 ns 6 ns 6.5 ns 7.5 ns 9 ns 6.5 ns 7ns 8ns 10ns


    Original     		PDF V58C365164SAT ba 5888

    ba 5888

    Abstract: dll 1501 V58C365164S
    Text: MOSEL VITELIC V58C365164S 64 Mbit DDR SDRAM 4M X 16, 3.3VOLT PRELIMINARY 4 45 5 55 System Frequency fCK 250 MHz 225 MHz 200 MHz 183 MHz Clock Cycle Time (tCK3) 4 ns 4.5 ns 5 ns 5.5 ns 4.8 ns 5.4 ns 6 ns 6.6 ns 6 ns 6.75 ns 7.5 ns 8.25 ns Clock Cycle Time (tCK2.5)


    Original     		PDF V58C365164S ba 5888 dll 1501 V58C365164S

    200MHZ

    Abstract: 4MX16 V58C365164S rcda amplifier
    Text: MOSEL VITELIC V58C365164S 64 Mbit DDR SDRAM 4M X 16, 3.3VOLT PRELIMINARY 36 4 5 System Frequency fCK 275 MHz 250 MHz 200 MHz Clock Cycle Time (tCK3) 3.6 ns 4 ns 5 ns Clock Cycle Time (tCK2.5) 4.3ns 4.8 ns 6 ns Clock Cycle Time (tCK2) 5.4ns 6 ns 7.5 ns Features


    Original     		PDF V58C365164S V58C365164S 200MHZ 4MX16 rcda amplifier

    V58C265164S

    Abstract: No abstract text available
    Text: MOSEL VITELIC V58C265164S HIGH PERFORMANCE 2.5 VOLT 4M X 16 DDR SDRAM 4 BANKS X 1Mbit X 16 PRELIMINARY 6 7 8 System Frequency fCK 166 MHz 143 MHz 125 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 8 ns 6.5 ns 7.5 ns 9 ns 7ns 8ns 10ns Clock Cycle Time (tCK2.5) Clock Cycle Time (tCK2)


    Original     		PDF V58C265164S V58C265164S

    NS4250

    Abstract: BA1A11
    Text: MOSEL VITELIC V58C365164S 64 Mbit DDR SDRAM 4M X 16, 3.3VOLT PRELIMINARY 35 4 5 System Frequency fCK 275 MHz 250 MHz 200 MHz Clock Cycle Time (tCK3) 3.5 ns 4 ns 5 ns Clock Cycle Time (tCK2.5) 4.2 ns 4.8 ns 6 ns 5.25 ns 6 ns 7.5 ns Clock Cycle Time (tCK2)


    Original     		PDF V58C365164S NS4250 BA1A11