TH4B
Abstract: No abstract text available
Text: PHAST-3N STM-1/STS-3/STS-3c SDH/SONET Overhead Terminator with Telecom Bus Interface TXC-06103 DATA SHEET • • • • • • • • • • • • • • • • • Bit-serial SDH/SONET line interface - Pseudo-ECL interface with clock recovery and synthesis
|
Original
|
TXC-06103
64-byte
TXC-06103-MB
TH4B
|
PDF
|
marking code j1n Transistor
Abstract: tlc 250 PDI 45A 017h Alarm Clock by using ttl marking 43F TXC 04216 marking A23 1101 01A 6401H MARKING 09F
Text: PHAST-3N STM-1/STS-3/STS-3c SDH/SONET Overhead Terminator with Telecom Bus Interface TXC-06103 DATA SHEET • • • • • • • • • • • • • • • • Byte-parallel SDH/SONET line interface - Parity detection/generation with optional frame pulse input
|
Original
|
TXC-06103
64-byte
TXC-06103-MB
marking code j1n Transistor
tlc 250
PDI 45A
017h
Alarm Clock by using ttl
marking 43F
TXC 04216 marking
A23 1101 01A
6401H
MARKING 09F
|
PDF
|
TXC 04216 marking
Abstract: 447h txc-06103
Text: PHAST-3N STM-1/STS-3/STS-3c SDH/SONET Overhead Terminator with Telecom Bus Interface TXC-06103 DATA SHEET • • • • • • • • • • • • • • • • • Byte-parallel SDH/SONET line interface - Parity detection/generation with optional frame pulse input
|
Original
|
TXC-06103
64-byte
TXC-06103-MB,
TXC 04216 marking
447h
|
PDF
|
Untitled
Abstract: No abstract text available
Text: PHAST-3N STM-1/STS-3/STS-3c SDH/SONET Overhead Terminator with Telecom Bus Interface TXC-06103 DESCRIPTION • Bit-serial SDH/SONET line interface - Pseudo-ECL interface with clock recovery and synthesis • Byte-parallel SDH/SONET line interface - Parity detection/generation with optional frame pulse input
|
Original
|
TXC-06103
64-byte
TXC-06103-MB
|
PDF
|
TXC 04216 marking
Abstract: 6401H X-00H
Text: PHAST-3N STM-1/STS-3/STS-3c SDH/SONET Overhead Terminator with Telecom Bus Interface TXC-06103 DATA SHEET • • • • • • • • • • • • • • • • Bit-serial SDH/SONET line interface - Pseudo-ECL interface with clock recovery and synthesis
|
Original
|
TXC-06103
64-byte
TXC-06103-MB
TXC 04216 marking
6401H
X-00H
|
PDF
|
4N15
Abstract: 1038 0E1 txc-06103arbg
Text: PHAST-3N Device STM-1/STS-3/STS-3c SDH/SONET Overhead Terminator with Telecom Bus Interface TXC-06103 DATA SHEET TXC-06103-MB, Ed. 8 December 2007 FEATURES APPLICATIONS • Byte-parallel SDH/SONET line interface, parity detection/generation with optional frame pulse input
|
Original
|
TXC-06103
TXC-06103-MB,
64-byte
4N15
1038 0E1
txc-06103arbg
|
PDF
|
Untitled
Abstract: No abstract text available
Text: PHAST-3N STM-1/STS-3/STS-3c SDH/SONET Overhead Terminator with Telecom Bus Interface TXC-06103 DATA SHEET PRODUCT PREVIEW DESCRIPTION • Bit-serial SDH/SONET line interface - Pseudo-ECL interface with clock recovery and synthesis • Byte-parallel SDH/SONET line interface
|
Original
|
TXC-06103
64-byte
TXC-06103-MB
|
PDF
|
566h
Abstract: marking 5c8 transistor marking 5c8 CRC-16 CRC-32 lcd power board schematic APS 254 ttc 474 222 marking code POH capacitor ATM 46D
Text: PHAST-3P Device STM-1/STS-3c SDH/SONET Overhead Terminator with CDB/PPP UTOPIA Interface TXC-06203 DATA SHEET DESCRIPTION LINE SIDE Bit-Serial / Byte-Parallel Clock, Data, and Parity Bit-Serial / Byte-Parallel Clock, Data, and Parity Boundary Scan, Clocks, Data,
|
Original
|
TXC-06203
TXC-06203)
trac203
TXC-06203-MB
566h
marking 5c8
transistor marking 5c8
CRC-16
CRC-32
lcd power board schematic APS 254
ttc 474 222
marking code POH capacitor
ATM 46D
|
PDF
|
marking codes all16
Abstract: 1au41 298029
Text: Intel WB1501 High-Density SDH/SONET STM-1/STS-3 Framing Processor Datasheet Order Number: 274015-002 October 2004 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN
|
Original
|
WB1501
5/99-064R2,
5/99-066R1,
5/00-126R2,
5/00-129R1,
marking codes all16
1au41
298029
|
PDF
|
040 d10
Abstract: marking code 51C G1M1
Text: PHAST-3P Device STM-1/STS-3c SDH/SONET Overhead Terminator with CDB/PPP UTOPIA Interface TXC-06203 DATA SHEET TXC-06203-MB, Ed. 4 December 2007 FEATURES APPLICATIONS • ATM cells over SDH/SONET - ATM cell delineation - Single-bit error correction and multiple-bit error detection
|
Original
|
TXC-06203
TXC-06203-MB,
CRC-16
CRC-32
040 d10
marking code 51C
G1M1
|
PDF
|
24C024
Abstract: WB1510 298029 RD237
Text: Intel WB1510 SDH/SONET 2 x STM-4/STS-12 or STM-1/STS-3 Framer Datasheet Order Number: 274042-003 October 2004 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL ® PRODUCTS. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS
|
Original
|
WB1510
STM-4/STS-12
5/99-064R2,
5/99-066R1,
5/00-126R2,
5/00-129R1,
24C024
WB1510
298029
RD237
|
PDF
|
cdb 404
Abstract: lcd power board schematic APS 254 cdb 442 CDB 447 MARKING 09F marking 5c8 PHAST-3P transistor marking 5c8 CRC-16 CRC-32
Text: PHAST-3P Device STM-1/STS-3c SDH/SONET Overhead Terminator with CDB/PPP UTOPIA Interface TXC-06203 DESCRIPTION • ATM cells over SDH/SONET - ATM cell delineation - Single-bit error correction and multiple-bit error detection - ATM Scrambler/descrambler option x43 +1
|
Original
|
TXC-06203
CRC-16
CRC-32
TXC-06203-MB
cdb 404
lcd power board schematic APS 254
cdb 442
CDB 447
MARKING 09F
marking 5c8
PHAST-3P
transistor marking 5c8
|
PDF
|
ic MB 16651 G
Abstract: MB 16651 MPC860 jtag tdm RECEIVER 221-217 0xE302 oscillator 10ppm MB 16651 G DS3-M13 V 22916
Text: Preliminary Information This document contains information on a product under development. The parametric information contains target parameters that are subject to change. M29320 12-Port DS3/E3/STS-1 Electrical Integrated Line Termination Device for Transport Networks
|
Original
|
M29320
12-Port
M29320
29320-DSH-001-D
ic MB 16651 G
MB 16651
MPC860 jtag
tdm RECEIVER
221-217
0xE302
oscillator 10ppm
MB 16651 G
DS3-M13
V 22916
|
PDF
|
ic MB 16651 G
Abstract: MB 16651 G MB 16651 tdm RECEIVER 221-217 DS3-M23 MPC860 jtag 29320-DSH-001-C DATASHEET OF BS 107A DS3-M13
Text: Preliminary Information This document contains information on a product under development. The parametric information contains target parameters that are subject to change. M29320 12-Port DS3/E3/STS-1 Electrical Integrated Line Termination Device for Transport Networks
|
Original
|
M29320
12-Port
M29320
29320-DSH-001-C
ic MB 16651 G
MB 16651 G
MB 16651
tdm RECEIVER
221-217
DS3-M23
MPC860 jtag
29320-DSH-001-C
DATASHEET OF BS 107A
DS3-M13
|
PDF
|
|
Untitled
Abstract: No abstract text available
Text: EtherPHAST -48 Plus Device OC-48/STM-16 SONET/SDH Ethernet Mapper TXC-06742 DATA SHEET PRODUCT PREVIEW TXC-06742-MB, Ed. 4 December 2005 FEATURES APPLICATIONS • 1x STS-48/STM-16 or 4x STS-12/STM-4 framer with TOH processing, 4x 622 LVDS line side interface
|
Original
|
OC-48/STM-16
TXC-06742
TXC-06742-MB,
STS-48/STM-16
STS-12/STM-4
AU-4-16c/AU-4-4c/AU-4/AU-3/TU-3
OC-12/4x
EtherPHAST-48
|
PDF
|
2 pin crystal oscillator 50mhZ-200mhz
Abstract: Maker Communications idc 14 pin out CDC586 MXT3010 AGS fuses
Text: Maker MXT3010EP Hardware Reference Application Note Application Note #10 Revision 3.2 May 18, 1999 Order Number 100316-03 Maker Communications, Inc. 73 Mount Wayte Avenue, Framingham, MA 01702 508.628.0622 •Fax 508.628.0256 May 1999 Copyright 1999 by Maker Communications, Inc. All rights reserved. Printed in the United States of America.
|
Original
|
MXT3010EP
32-bit
16-bit
2 pin crystal oscillator 50mhZ-200mhz
Maker Communications
idc 14 pin out
CDC586
MXT3010
AGS fuses
|
PDF
|
QQ-W-343
Abstract: marking code POH capacitor
Text: REO l i VED FEB 2 0 1955 POH INT 'M T ROL .REVISIONS LETTER NO DESCRIPTION NOTES: .0 0 5 MAX @ 25* C, 1 KHZ. 1. DIS 2. CAPACITANCE: 90 - 1 1 0 PF. 3. DIELECTRIC WITHSTANDING VOLTAGE: 11 KV RATED,
|
OCR Scan
|
U101A113R000
7W970
100PF
11000WVDC
QQW343)
1000W
QQ-W-343
marking code POH capacitor
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SIEMENS Dala Sheet 01.98 Advance Information C161RI Revision History: 1998-01 Advance Information Previous Releases: 1997-12 Advance Information Page Subjects 7 RSTIN description completed with bidirectional reset. Edition 1998-01 Published by Siemens AG, Bereich Halbleiter, Marketing-Kommunikation
|
OCR Scan
|
C161RI
D-81541
GPR05365
P-TQFP-100-1
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SIEMENS C166-Family of High-Performance CMOS 16-Bit Microcontrollers C163-L Data Sheet C163-L • • • • • • • • • • • • • • 16-Bit Microcontroller High Performance 16-bit CPU with 4-Stage Pipeline - 80 ns Instruction Cycle Time at 25 MHz CPU Clock
|
OCR Scan
|
C166-Family
16-Bit
C163-L
16-Priority-Level
P-TQFP-100-3
2IA-BIDI100X
|
PDF
|
SERVICE MANUAL tv TCL
Abstract: ED06 ED08 internal circuit diagram for ic 4047 C161 C161RI C166 SAB-C161RI-LF SAB-C161RI-LM SAF-C161RI-LM
Text: SIEMENS Data Sheet 0198 Advance Information This Material C o p yright ed By Its Respec tive Ma nufac turer C161RI Revision History: 1998-01 A dvance Inform ation P revious Releases: 1997-12 A dvance Inform ation P age S ubjects 7 RSTIN description com pleted with bidirectional reset.
|
OCR Scan
|
C161RI
D-81541
25max
C161RI
P-TQFP-100-1
DTH14x
SERVICE MANUAL tv TCL
ED06
ED08
internal circuit diagram for ic 4047
C161
C166
SAB-C161RI-LF
SAB-C161RI-LM
SAF-C161RI-LM
|
PDF
|
mh msc-6 power factor controller
Abstract: ic 8272 78p312 NT 78310 upd78312a nec 78312 a upd78310 IA-118 pd78310 UPD78310ACW
Text: USER’S MANUAL NEC uP D 7 8 3 1 2 A SINGLE-CHIP MICROCOMPUTER JÍ/PD7831 OA ^P D 78312A /¿ P D 78P 312A ^P D 7 8 3 1 OA A //P D 7831 2 A (A ) Document No. IE U -1265D (O.D.No. IE M -5 0 8 6 F ) Date Published October 1993 P Printed in Japan USER’S MANUAL
|
OCR Scan
|
uPD7831
uPD78312A
uPD78P312A
uPD78310A
-1265D
PD7831OA
PA-78P312CW:
PA-78P312GF:
PA-78P312GQ:
mh msc-6 power factor controller
ic 8272
78p312
NT 78310
nec 78312 a
upd78310
IA-118
pd78310
UPD78310ACW
|
PDF
|
SDA6102
Abstract: 4.43 MHZ crystal oscillator p j6nd SDA6102X marking code POH capacitor SMD MARKING CODE p4 S 187 Siemens SMD TRANSISTOR N10
Text: SIEMENS TV-SAT-PLL with I2C-Bus and Four Chip Addresses SDA 6102X Bipolar IC Preliminary Data Features • 1-chip system for MPU control I2C-bus • 4 programmable chip addresses • Short pull-in time for quick channel switch-over and optimized loop stability
|
OCR Scan
|
SDA6102X
P-DSO-16
6102X
Q67000-A5016
6102X
UE004050
SDA6102
4.43 MHZ crystal oscillator
p j6nd
SDA6102X
marking code POH capacitor
SMD MARKING CODE p4
S 187 Siemens
SMD TRANSISTOR N10
|
PDF
|
stk 8770
Abstract: KJE 6A Siemens Digital Book SAK-C167CR-16R33M Infineon saf-c167cr-lm C167 siemens MDL 3088 3800P KJE T5
Text: Data Sheet V3.0, April. 2000 C167CR C167SR 1NFNSOS040 1 6-Bit Single-Chip IR IM R E s H I M i c r o c o jf t r o t i « *' Microcontrollers Infineon N e v e r s t o p t INFNS05040 Edition 2000-04 Published by Infineon Technologies AG, St.-Martin-Strasse 53,
|
OCR Scan
|
C167CR
C167SR
1NFNSOS040
INFNS05040
D-81541
-X-76oo
DA04002.
stk 8770
KJE 6A
Siemens Digital Book
SAK-C167CR-16R33M
Infineon saf-c167cr-lm
C167 siemens
MDL 3088
3800P
KJE T5
|
PDF
|
HA1314
Abstract: PMB2251
Text: Wireless Components Transm itter PLL Up-Conversion Loop Modulator PMB 2251 Version 1.3 Specification August 1999 preliminary Revision History: Current Version: 08.99 Previous Version:Data Sheet Page (in previous Version) Page (in current Version) Subjects (major changes since last revision)
|
OCR Scan
|
100nF
291nF
100nFl
HA1314
PMB2251
|
PDF
|