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    MARKING V74 Search Results

    MARKING V74 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    MG8097/B Rochester Electronics LLC 8097 - Math Coprocessor - Dual marked (8506301ZA) Visit Rochester Electronics LLC Buy
    5490/BCA Rochester Electronics LLC 5490 - Decade Counter - Dual marked (M38510/01307BCA) Visit Rochester Electronics LLC Buy
    5405/BCA Rochester Electronics LLC 5405 - Gate - Dual marked (M38510/00108BCA) Visit Rochester Electronics LLC Buy
    54AC20/SDA-R Rochester Electronics LLC 54AC20/SDA-R - Dual marked (M38510R75003SDA) Visit Rochester Electronics LLC Buy
    UHD503R/883 Rochester Electronics LLC UHD503R/883 - Dual marked (5962-8855101CA) Visit Rochester Electronics LLC Buy

    MARKING V74 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    FET marking code g5d

    Abstract: PG2179TB marking code C3E SOT-89 marking code C1E mmic marking code C1G mmic 2SC3357/NE85634 PG2163T5N sot-23 g6g PC8230TU marking code C1H mmic
    Text: RF AND MICROWAVE DEVICES PRODUCT LINEUP www.renesas.com 2010.07 This document covers “Silicon Microwave Transistors”, “Silicon Microwave Monolithic ICs” and “Microwave GaAs Devices”. Caution GaAs Products This product uses gallium arsenide GaAs .


    Original     		PDF R09CL0001EJ0100 PX10727EJ02V0PF) FET marking code g5d PG2179TB marking code C3E SOT-89 marking code C1E mmic marking code C1G mmic 2SC3357/NE85634 PG2163T5N sot-23 g6g PC8230TU marking code C1H mmic

    nec mosfet marked v75

    Abstract: NEC Ga FET marking code T79 FET marking code g5d marking code C1G mmic LGA 1155 PIN diagram PB1507 marking code C1E mmic marking code C1H mmic PC8230TU MMIC SOT 363 marking CODE 77
    Text: お客様各位 カタログ等資料中の旧社名の扱いについて 2010 年 4 月 1 日を以って NEC エレクトロニクス株式会社及び株式会社ルネサステクノロジ が合併し両社の全ての事業が当社に承継されております。従いまして、本資料中には旧社


    Original     		PDF G0706 PX10727EJ02V0PF nec mosfet marked v75 NEC Ga FET marking code T79 FET marking code g5d marking code C1G mmic LGA 1155 PIN diagram PB1507 marking code C1E mmic marking code C1H mmic PC8230TU MMIC SOT 363 marking CODE 77

    Untitled

    Abstract: No abstract text available
    Text: 74LVC2G74-Q100 Single D-type flip-flop with set and reset; positive edge trigger Rev. 1 — 24 December 2012 Product data sheet 1. General description The 74LVC2G74-Q100 is a single positive-edge triggered D-type flip-flop. It has individual data D inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary


    Original     		PDF 74LVC2G74-Q100 74LVC2G74-Q100 74LVC2G74

    Untitled

    Abstract: No abstract text available
    Text: 74LVC1G74-Q100 Single D-type flip-flop with set and reset; positive edge trigger Rev. 1 — 7 August 2012 Product data sheet 1. General description The 74LVC1G74-Q100 is a single positive edge triggered D-type flip-flop. It has individual data D inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary


    Original     		PDF 74LVC1G74-Q100 74LVC1G74-Q100 74LVC1G74

    BC517 spice model

    Abstract: bc547 spice model bc548 spice model h1 m6c MPS6595 bc557 Spice Model BF245 A spice spice model bf199 BC640 SPICE model transistor motorola Selector Guide Plastic-Encapsulated Transistors GreenLineTM Portfolio Devices S
    Text: Selector Guide 1 Plastic-Encapsulated Transistors 2 GreenLine Portfolio Devices 3 Small-Signal Field-Effect Transistors and MOSFETs 4 Small-Signal Tuning and Switching Diodes 5 Tape and Reel Specifications and Packaging Specifications 6 Surface Mount Information


    Original     		PDF VN2410L BC517 spice model bc547 spice model bc548 spice model h1 m6c MPS6595 bc557 Spice Model BF245 A spice spice model bf199 BC640 SPICE model transistor motorola Selector Guide Plastic-Encapsulated Transistors GreenLineTM Portfolio Devices S

    74LVC1G74DP V74

    Abstract: DASF00507 74LVC1G74 74LVC1G74DC 74LVC1G74DP 74LVC1G74GD 74LVC1G74GM 74LVC1G74GT 74lvc1g74gf
    Text: 74LVC1G74 Single D-type flip-flop with set and reset; positive edge trigger Rev. 08 — 3 December 2009 Product data sheet 1. General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data D inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q


    Original     		PDF 74LVC1G74 74LVC1G74 74LVC1G74DP V74 DASF00507 74LVC1G74DC 74LVC1G74DP 74LVC1G74GD 74LVC1G74GM 74LVC1G74GT 74lvc1g74gf

    Untitled

    Abstract: No abstract text available
    Text: 74LVC1G74-Q100 Single D-type flip-flop with set and reset; positive edge trigger Rev. 2 — 14 May 2013 Product data sheet 1. General description The 74LVC1G74-Q100 is a single positive edge triggered D-type flip-flop. It has individual data D inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary


    Original     		PDF 74LVC1G74-Q100 74LVC1G74-Q100 74LVC1G74

    74LVC2G74

    Abstract: 74LVC2G74DC 74LVC2G74DP 74LVC2G74GD 74LVC2G74GM 74LVC2G74GT
    Text: 74LVC2G74 Single D-type flip-flop with set and reset; positive edge trigger Rev. 06 — 23 December 2009 Product data sheet 1. General description The 74LVC2G74 is a single positive-edge triggered D-type flip-flop with individual data D inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q


    Original     		PDF 74LVC2G74 74LVC2G74 74LVC2G74DC 74LVC2G74DP 74LVC2G74GD 74LVC2G74GM 74LVC2G74GT

    Untitled

    Abstract: No abstract text available
    Text: 74LVC2G74 Single D-type flip-flop with set and reset; positive edge trigger Rev. 03 — 9 August 2007 Product data sheet 1. General description The 74LVC2G74 is a single positive edge triggered D-type flip-flop with individual data D inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q


    Original     		PDF 74LVC2G74 74LVC2G74

    74LVC2G74

    Abstract: 74LVC2G74DC 74LVC2G74DP 74LVC2G74GT MO-187
    Text: 74LVC2G74 Single D-type flip-flop with set and reset; positive edge trigger Rev. 01 — 3 November 2005 Product data sheet 1. General description The 74LVC2G74 is a high-performance, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.


    Original     		PDF 74LVC2G74 74LVC2G74 74LVC2G74DC 74LVC2G74DP 74LVC2G74GT MO-187

    74LVC1G74DP V74

    Abstract: 74LVC1G74 74LVC1G74DC 74LVC1G74DP 74LVC1G74GD 74LVC1G74GM 74LVC1G74GT JESD22-A114E MO-187
    Text: 74LVC1G74 Single D-type flip-flop with set and reset; positive edge trigger Rev. 07 — 26 June 2008 Product data sheet 1. General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data D inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q


    Original     		PDF 74LVC1G74 74LVC1G74 74LVC1G74DP V74 74LVC1G74DC 74LVC1G74DP 74LVC1G74GD 74LVC1G74GM 74LVC1G74GT JESD22-A114E MO-187

    74LVC2G74

    Abstract: 74LVC2G74DC 74LVC2G74DP 74LVC2G74GD 74LVC2G74GM 74LVC2G74GT JESD22-A114E MO-187
    Text: 74LVC2G74 Single D-type flip-flop with set and reset; positive edge trigger Rev. 05 — 30 June 2008 Product data sheet 1. General description The 74LVC2G74 is a single positive-edge triggered D-type flip-flop with individual data D inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q


    Original     		PDF 74LVC2G74 74LVC2G74 74LVC2G74DC 74LVC2G74DP 74LVC2G74GD 74LVC2G74GM 74LVC2G74GT JESD22-A114E MO-187

    Untitled

    Abstract: No abstract text available
    Text: 74LVC2G74 Single D-type flip-flop with set and reset; positive edge trigger Rev. 02 — 14 December 2006 Product data sheet 1. General description The 74LVC2G74 is a high-performance, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.


    Original     		PDF 74LVC2G74 74LVC2G74

    74LVC1G74DC

    Abstract: 74LVC1G74DP 74LVC1G74 74LVC1G74GM 74LVC1G74GT MO-187
    Text: 74LVC1G74 Single D-type flip-flop with set and reset; positive edge trigger Rev. 06 — 19 February 2008 Product data sheet 1. General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data D inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q


    Original     		PDF 74LVC1G74 74LVC1G74 74LVC1G74DC 74LVC1G74DP 74LVC1G74GM 74LVC1G74GT MO-187

    74LVC1G74DC

    Abstract: 74LVC1G74 74LVC1G74DP 74LVC1G74GD 74LVC1G74GM 74LVC1G74GT
    Text: 74LVC1G74 Single D-type flip-flop with set and reset; positive edge trigger Rev. 9 — 5 August 2010 Product data sheet 1. General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data D inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q


    Original     		PDF 74LVC1G74 74LVC1G74 74LVC1G74DC 74LVC1G74DP 74LVC1G74GD 74LVC1G74GM 74LVC1G74GT

    74LVC1G74

    Abstract: 74lvc1g74GF
    Text: 74LVC1G74 Single D-type flip-flop with set and reset; positive edge trigger Rev. 12 — 2 April 2013 Product data sheet 1. General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data D inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q


    Original     		PDF 74LVC1G74 74LVC1G74 74lvc1g74GF

    74LVC1G74

    Abstract: 74LVC1G74DC 74LVC1G74DP 74LVC1G74GM 74LVC1G74GT MO-187
    Text: 74LVC1G74 Single D-type flip-flop with set and reset; positive edge trigger Rev. 05 — 9 August 2007 Product data sheet 1. General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data D inputs, clock (CP) inputs, set (SD) and (RD) inputs, and complementary Q and Q outputs.


    Original     		PDF 74LVC1G74 74LVC1G74 74LVC1G74DC 74LVC1G74DP 74LVC1G74GM 74LVC1G74GT MO-187

    74LVC1G74DP

    Abstract: No abstract text available
    Text: 74LVC1G74 Single D-type flip-flop with set and reset; positive edge trigger Rev. 04 — 7 December 2006 Product data sheet 1. General description The 74LVC1G74 is a high-performance, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.


    Original     		PDF 74LVC1G74 74LVC1G74 74LVC1G74DP

    Untitled

    Abstract: No abstract text available
    Text: 74LVC2G74 Single D-type flip-flop with set and reset; positive edge trigger Rev. 10 — 2 April 2013 Product data sheet 1. General description The 74LVC2G74 is a single positive-edge triggered D-type flip-flop with individual data D inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q


    Original     		PDF 74LVC2G74 74LVC2G74

    74LVC2G74

    Abstract: 74LVC2G74DC 74LVC2G74DP 74LVC2G74GD 74LVC2G74GM 74LVC2G74GT 74LVC2G74 marking
    Text: 74LVC2G74 Single D-type flip-flop with set and reset; positive edge trigger Rev. 7 — 11 October 2010 Product data sheet 1. General description The 74LVC2G74 is a single positive-edge triggered D-type flip-flop with individual data D inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q


    Original     		PDF 74LVC2G74 74LVC2G74 74LVC2G74DC 74LVC2G74DP 74LVC2G74GD 74LVC2G74GM 74LVC2G74GT 74LVC2G74 marking

    74lvc1g74gf

    Abstract: No abstract text available
    Text: 74LVC1G74 Single D-type flip-flop with set and reset; positive edge trigger Rev. 10 — 2 December 2011 Product data sheet 1. General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data D inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q


    Original     		PDF 74LVC1G74 74LVC1G74 74lvc1g74gf

    Untitled

    Abstract: No abstract text available
    Text: 74LVC1G74 Single D-type flip-flop with set and reset; positive edge trigger Rev. 11 — 4 June 2012 Product data sheet 1. General description The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data D inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q


    Original     		PDF 74LVC1G74 74LVC1G74

    DIODE marking ED

    Abstract: SOT223 Package
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA M V7404T1 Silicon Hyper-Abrupt Ttining Diode Motorola Preferred Device This silicon tuning diode is designed for high capacitance and a tuning ratio of greater than 10 tim es over a bias range of 2.0 to 10 volts. It provides tuning over


    OCR Scan     		PDF T-223 OT-223 7404T1 DIODE marking ED SOT223 Package

    diode MARKING ED

    Abstract: V7404 Am tuning DIODE DIODE ED 26
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MV7404T1 Silicon H yper-A brupt Tuning Diode Motorola Preferred Device This silicon tuning diode is designed for high capacitance and a tuning ratio of greater than 10 times over a bias range of 2.0 to 10 volts. It provides tuning over a


    OCR Scan     		PDF OT-223 MV7404T1 C2/C10 7404T diode MARKING ED V7404 Am tuning DIODE DIODE ED 26