9541A
Abstract: I2C-bus specification 3 HVQFN16 JESD22-A114 JESD22-A115 JESD78 TSSOP16 PCA9541AD-01 PCA9541A
Text: PCA9541A 2-to-1 I2C-bus master selector with interrupt logic and reset Rev. 03 — 16 July 2009 Product data sheet 1. General description The PCA9541A is a 2-to-1 I2C-bus master selector designed for high reliability dual master I2C-bus applications where system operation is required, even when one master
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PCA9541A
PCA9541A
9541A
I2C-bus specification 3
HVQFN16
JESD22-A114
JESD22-A115
JESD78
TSSOP16
PCA9541AD-01
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JESD22-A114
Abstract: JESD22-A115 JESD78 PCA9541 TSSOP16 PCA9541A
Text: PCA9541A 2-to-1 I2C-bus master selector with interrupt logic and reset Rev. 02 — 4 June 2009 Product data sheet 1. General description The PCA9541A is a 2-to-1 I2C-bus master selector designed for high reliability dual master I2C-bus applications where system operation is required, even when one master
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PCA9541A
PCA9541A
JESD22-A114
JESD22-A115
JESD78
PCA9541
TSSOP16
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Untitled
Abstract: No abstract text available
Text: PCA9541 2-to-1 I2C-bus master selector with interrupt logic and reset Rev. 06 — 11 September 2008 Product data sheet 1. General description The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual master I2C-bus applications where system operation is required, even when one master fails or
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PCA9541
PCA9541
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HVQFN16
Abstract: JESD22-A114 JESD22-A115 JESD78 PCA9541 TSSOP16
Text: PCA9541 2-to-1 I2C-bus master selector with interrupt logic and reset Rev. 07 — 2 July 2009 Product data sheet 1. General description The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual master I2C-bus applications where system operation is required, even when one master fails or
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PCA9541
PCA9541
HVQFN16
JESD22-A114
JESD22-A115
JESD78
TSSOP16
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JESD22-A114
Abstract: JESD22-A115 JESD78 PCA9541 TSSOP16
Text: PCA9541 2-to-1 I2C-bus master selector with interrupt logic and reset Rev. 04 — 4 January 2006 Product data sheet 1. General description The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual master I2C-bus applications where system operation is required, even when one master fails or
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PCA9541
PCA9541
JESD22-A114
JESD22-A115
JESD78
TSSOP16
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PCA9541A
Abstract: No abstract text available
Text: PCA9541 2-to-1 I2C-bus master selector with interrupt logic and reset Rev. 07 — 2 July 2009 Product data sheet 1. General description The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual master I2C-bus applications where system operation is required, even when one master fails or
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PCA9541
PCA9541
PCA9541A
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JESD22-A114
Abstract: JESD22-A115 JESD78 PCA9541 TSSOP16
Text: PCA9541 2-to-1 I2C-bus master selector with interrupt logic and reset Rev. 05 — 1 October 2007 Product data sheet 1. General description The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual master I2C-bus applications where system operation is required, even when one master fails or
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PCA9541
PCA9541
JESD22-A114
JESD22-A115
JESD78
TSSOP16
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KEIL
Abstract: No abstract text available
Text: PSoC Creator Component Datasheet I2C Master/Multi-Master/Slave 3.30 Features • Industry-standard NXP® I2C bus interface • Supports slave, master, multi-master and multi-master-slave operation Requires only two pins SDA and SCL to interface to I2C bus
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Untitled
Abstract: No abstract text available
Text: PSoC Creator Component Datasheet I2C Master/Multi-Master/Slave 3.10 Features • Industry-standard NXP® I2C bus interface • Supports slave, master, multi-master and multi-master-slave operation Requires only two pins SDA and SCL to interface to I2C bus
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Untitled
Abstract: No abstract text available
Text: PSoC Creator Component Datasheet I2C Master/Multi-Master/Slave 3.0 Features • Industry-standard NXP® I2C bus interface • Supports Slave, Master, Multi-Master and Multi-Master-Slave operation Only two pins SDA and SCL required to interface to I2C bus
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Untitled
Abstract: No abstract text available
Text: PSoC Creator Component Datasheet I2C Master/Multi-Master/Slave 3.20 Features • Industry-standard NXP® I2C bus interface • Supports slave, master, multi-master and multi-master-slave operation Requires only two pins SDA and SCL to interface to I2C bus
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Untitled
Abstract: No abstract text available
Text: PSoC Creator Component Datasheet I2C Master/Multi-Master/Slave 3.1 Features • Industry-standard NXP® I2C bus interface • Supports slave, master, multi-master and multi-master-slave operation Requires only two pins SDA and SCL to interface to I2C bus
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RNW RESISTOR
Abstract: arbitrage verilog code for I2C MASTER
Text: PSoC Creator Component Data Sheet I2C Master/Multi-Master/Slave 2.10 Features • Industry standard Philips® I2C bus interface • Supports Slave, Master, Multi-Master and Multi-Master-Slave operation • Only two pins SDA and SCL required to interface to I2C bus
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Untitled
Abstract: No abstract text available
Text: PSoC Creator Component Datasheet I2C Master/Multi-Master/Slave 2.20 Features • Industry standard Philips® I2C bus interface • Supports Slave, Master, Multi-Master and Multi-Master-Slave operation Only two pins SDA and SCL required to interface to I 2C bus
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MPC860
Abstract: No abstract text available
Text: PCI 9054 PCI Bus Master I/O Accelerator Chip Highlights • PCI v2.2 compliant 32-bit 33MHz Bus Master Interface Controller enables PCI Burst Transfers up to 132Mbytes/second ■ General Purpose Bus Master Interface featuring an advanced Data Pipe Architecture which
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32-bit
33MHz
132Mbytes/second
MPC860
9054-SIL-PB-P2-2
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Untitled
Abstract: No abstract text available
Text: HSL Master Controllers PCI-7853 / PCI-7854 High Speed Link Master Controllers Block Diagram User AP Driver PCI Bus PCI Bus Controller HSL Link Master Slave Scan Controller PCI Bus Controller On-board Memory Parallel to Serial Controller TX RX Trans/Receiver
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PCI-7853
PCI-7854
PCI-7853
RJ-45
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MPC860
Abstract: No abstract text available
Text: PCI 9054 PCI Bus Master I/O Accelerator Chip Highlights • PCI v2.2 compliant 32-bit 33MHz Bus Master Interface Controller enables PCI Burst Transfers up to 132Mbytes/second ■ General Purpose Bus Master Interface featuring an advanced Data Pipe Architecture which
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32-bit
33MHz
132Mbytes/second
MPC860
9054-SIL-PB-P2-2
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9541A
Abstract: PCA9541A
Text: PCA9541A 2-to-1 I2C-bus master selector with interrupt logic and reset Rev. 4 — 24 August 2012 Product data sheet 1. General description The PCA9541A is a 2-to-1 I2C-bus master selector designed for high reliability dual master I2C-bus applications where system operation is required, even when one master
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PCA9541A
PCA9541A
9541A
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Untitled
Abstract: No abstract text available
Text: PCI 9060SD MAY 1996 VERSION 0.6 PCI Bus Master Interface Chip for Master and Slave Adapters General Description _ Featu res_ • • PCI Specification 2.1 compliant PCI Bus Master Interface supporting master and slave adapters
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9060SD
PCI9060SD
9060SD.
hflSS14^
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H 9032
Abstract: SA3000
Text: EISA 9032 T% APRIL 1993 EISA Bus Master Interface Chip Intel 82596 Mode Patent Pending_ Features_ General Description_ * EISA Bus Master Interface Chip containing all The EISA 9032 is an EISA bus master chip which can be
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82596C
H 9032
SA3000
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DP83932
Abstract: EISA9032 lh 9032 intel 82596 fci dh 22 T35 12H ix031 LA23-LA13 9010 plx LHi 954
Text: EISA 9032 T •CHNOLOBV^ EISA Bus Master Interface Chip Intel 82596 Mode APRIL 1993 Patent Pending_ Features_ General Description_ • EISA Bus Master Interface Chip containing all The EISA 9032 is an EISA bus master chip which can be
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82596CA
DP83932
EISA9032
lh 9032
intel 82596
fci dh 22
T35 12H
ix031
LA23-LA13
9010 plx
LHi 954
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OJP 201
Abstract: T45 12H
Text: EISA 9032 T•CHNOLOBV^ EISA Bus Master Interface Chip Intel 82596 Mode APRIL 1993 Patent Pending_ Features_ General Description_ • EISA Bus Master Interface Chip containing all The EISA 9032 is an EISA bus master chip which can be
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Untitled
Abstract: No abstract text available
Text: 24 993 EISA 9032 r . c^TTSTS-rrr EISA Bus Master Interface Chip Intel 82596 Mode MARCH 1993 Patent Pending_ Features_ General Description_ • EISA Bus Master Interface Chip containing all The EISA 9032 is an EISA bus master chip which can be
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82596CA
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Untitled
Abstract: No abstract text available
Text: PCI 9060SD T E C H N □ L □ EY November 1995 PRELIMINARY VERSION 0.5 PCI Bus Master Interface Chip for Master and Slave Adapters General Description_ Featu res_ • • PCI Specification 2.1 compliant PCI Bus Master Interface supporting master and
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9060SD
PCI9060SD
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