F381

Contextual Info: The MC54/74F182 is a high-speed carry lookahead generator. It is generally used with the F181, F381 or 29F01 4-bit arithmetic logic unit to provide high-speed lookahead over word lengths of more than four bits. • Provides Lookahead Carries Across a Group of Four ALUs

74F568

Abstract: MC54/74F568 MC74FXXXDW
Contextual Info: MC54/74F568 MC54/74F569 4-BIT BIDIRECTIONAL COUNTERS WITH 3-STATE OUTPUTS The MC54/ 74F568 and MC54/74F569 are fully synchronous, reversible counters with 3-state outputs. The F568 is a BCD decade counter; the F569 is a binary counter. They feature preset capability for programmable operation, carry lookahead for easy cascading, and a U/D input to control the direction of counting. For maximum flexibility there are both synchronous and master asynchronous reset inputs as well as both Clocked Carry (CC) and

TS 4142

Abstract: F169
Contextual Info: MC54/74F168 MC54/74F169 4-STAGE SYNCHRONOUS BIDIRECTIONAL COUNTERS The MC54/74F168 and MC54/74F169 are fully synchronous 4-stage up/ down counters. The F168 is a BCD decade counter; the F169 is a modulo-16 binary counter. Both feature a preset capability for programmable operation,

motorola F74

Abstract: 74F109
Contextual Info: The MC54/74F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop refer to F74 data sheet by connecting the J and K inputs together.

16 line to 4 line priority encoder

Abstract: MC54/74F14 F148 4 line to 2 line priority encoder ttl priority encoder 74F148
Contextual Info: MC54/74F148 8-LINE TO 3-LINE PRIORITY ENCODER The MC54/74F148 provides three bits of binary coded output representing the position of the highest order active input, along with an output indicating the presence of any active input. It is easily expanded via input and output enables to provide priority encoding over many bits.

3-bit binary adder circuit

Abstract: 16C4 F283 circuit diagram of full adder circuit diagram of full adder circuit using nor 8 bit full adder 74
Contextual Info: LIFETIME BUY The MC54/74F283 high-speed 4-bit binary full adder with internal carry lookahead, accepts two 4-bit binary words A0–A3, B0–B3 and a Carry input (C0). It generates the binary Sum outputs (S0–S3) and the Carry output (C4) from the most significant bit. The F283 will operate with either active-HIGH or

74f259 motorola

Abstract: 74f259
Contextual Info: LIFETIME BUY The MC54/74F259 is a high-speed 8-bit addressable latch designed for general purpose storage applications in digital systems. It is a multifunctional device capable of storing single line data in eight addressable latches, and also a 1-of-8 decoder and demultiplexer with active HIGH outputs. The device

f125 motorola

Abstract: f126 751A-02 F125 74f125 motorola
Contextual Info: MC54/74F125 MC54/74F126 3-STATE QUAD BUFFERS • High Impedance NPN Base Inputs for Reduced Loading QUAD BUFFERS, 3-STATE FAST SHOTTKY TTL MC54/74F125 VCC 4C 4A 4Y 3C 3A 3Y 14 13 12 11 10 9 8 J SUFFIX CERAMIC CASE 632-08 14 1 2 3 4 5 6 7 1C 1A 1Y 2C 2A

F151

Contextual Info: MC54/74F151 8-INPUT MULTIPLEXER The MC54/74F151 is a high-speed 8-input digital multiplexer. It provides in one package, the ability to select one line of data from up to eight sources. The F151 can be used as a universal function generator to generate any logic

74F534

Abstract: F374 MC54 MC74FXXXDW
Contextual Info: OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS The MC54 / 74F534 is a high-speed, low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. A buffered Clock CP and Output Enable (OE) are

74F538

Abstract: MC54 MC74FXXXDW
Contextual Info: 1-OF-8 DECODER WITH 3-STATE OUTPUTS The MC54 / 74F538 decoder/demultiplexer accepts three Address A0 – A2 input signals and decodes them to select one of eight mutually exclusive outputs. A polarity control input (P) determines whether the outputs are active

MC74FXXXDW

Abstract: 74F245
Contextual Info: 3 MC54/74F245 OCTAL BIDIRECTIONAL TRANSCEIVER WITH 3-STATE INPUTS/OUTPUTS OCTAL BIDIRECTIONAL TRANSCEIVER WITH 3-STATE INPUTS/OUTPUTS The MC54/74F245 contains eight noninverting bidirectional buffers with 3-state outputs and is intended for bus-oriented applications. Current sinking

dual d flip-flop

Abstract: t flipflop 74F109
Contextual Info: MOTOROLA DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP The MC54/74F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking_operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D

Contextual Info: M O r O H O L A MC54/74F125 MC54/74F126 3-STATE QUAD BUFFERS • High Impedance NPN Base Inputs for Reduced Loading QUAD BUFFERS, 3-STATE FAST SHOTTKY TTL MC54/74F125 VCC 40 4A 4Y 30 3A 3Y 14 13 12 11 10 9 8 J SUFFIX CERAMIC CASE 632-08 14 1 2 1C 1A 3 4

Contextual Info: The MC54/74F182 is a high-speed carry lookahead generator. It is generally used with the F181, F381 or 29F01 4-bit arithmetic logic unit to provide high-speed lookahead over word lengths of more than four bits. • Provides Lookahead Carries Across a Group of Four ALUs

F374

Abstract: MC74FXXXDW F534 74f534
Contextual Info: M MOTOROLA MC54/74F534 OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS T h e M C 5 4 /7 4 F 5 3 4 is a h ig h -sp e e d , lo w -p o w e r o cta l D -typ e flip -flo p fe a tu rin g se p a ra te D -typ e in p u ts fo r e ach flip -flo p and 3 -sta te o u tp u ts fo r bus

F169

Abstract: 74F168 8count
Contextual Info: MC54/74F168 MC54/74F169 4-STAGE SYNCHRONOUS BIDIRECTIONAL COUNTERS The MC54/74F168 and MC54/74F169 are fully synchronous 4-stage up/ down counters. The F168 is a BCD decade counter; the F169 is a modulo-16 binary counter. Both feature a preset capability for programmable operation,

t569

Contextual Info: MOTOROLA 4-BIT BIDIRECTIONAL COUNTERS WITH 3-STATE OUTPUTS T h e M C 5 4 /7 4 F 5 6 8 and M C 5 4 /7 4 F 5 6 9 a re fu lly s yn ch ro n o u s, re versib le c o u n te rs w ith 3 -sta te o utp uts. T h e F568 is a B C D d e ca d e co un ter; th e F569 is a b in a ry coun ter. T h e y fe a tu re p re se t ca p a b ility fo r p ro g ra m m a b le o p e ra ­

Contextual Info: M MOTOROLA MC54/74F381 4-BIT ARITHMETIC LOGIC UNIT The MC54/74F381 performs three arithmetic and three logic operations on two 4-bit words, A and B. Two additional Select input codes force the Function outputs LOW or HIGH. Carry Propagate and Generate outputs are provided

CD Octal D-type flip-flop

Contextual Info: M MOTOROLA MC54/74F374 OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS The MC54/74F374 is a high-speed, low-power octal D-type flip-flop featur­ ing separate D-type inputs for each flip-flop and 3-state outputs for bus ori­ ented applications. A buffered C lock (CP) and Output Enable (OE) are com ­

Contextual Info: M O T O R O L A . MC54/74F251 8-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS The MC54/74F251 is a high-speed 8-input digital multiplexer. It provides, in one package, the ability to select one bit of data from up to eight sources. It can be used as a universal function generator to generate any logic function

Contextual Info: MOTOROLA MC54/74F367 MC54/74F368 HEX BUFFER/DRIVER 4-BIT PLUS 2-BIT, NONINVERTING AND INVERTING, 3-STATE F367 HEX BUFFER/DRIVER 4-BIT PLUS 2-BIT, NONINVERTING 3-STATE CONNECTION DIAGRAMS MC54/74F367 VCC 0 E2 I K, I ü I 1 F368 HEX BUFFER/DRIVER 4-BIT PLUS 2-BIT,

Contextual Info: <g> MOTOROLA MC54/74F365 MC54/74F366 HEX BUFFER/DRIVER GATED ENABLE NONINVERTING AND INVERTING, 3-STATE F365 HEX BUFFER/DRIVER GATED ENABLE NONINVERTING, 3-STATE CONNECTION DIAGRAM MC54/74F365 Vcc oe 2 I I F366 HEX BUFFER/DRIVER GATED ENABLE INVERTING, 3-STATE

Contextual Info: g MOTOROLA MC54/74F132 QUAD 2-INPUT NAND SCHMITT TRIGGER The MC54/74F132 contains four 2-input NAND gates which accept stan­ dard TTL input signals and provide standard TTL output levels. They are ca­ pable of transforming slowly changing input signals into sharply defined, jitter-free output signals. In addition, they have greater noise margin than