Untitled
Abstract: No abstract text available
Text: 256K x 72 SSRAM Multi-Chip Package Optimum Density and Performance in One Package WEDPY256K72V-XBX* • Designed as L2 Cache for advanced processors see other side for typical application block diagram Performance Features AR Y Fast clock speeds: 200, 166, 150, 133 and 100MHz
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Original
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PDF
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WEDPY256K72V-XBX*
100MHz
WEDPY256K72V
MIF2012
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Untitled
Abstract: No abstract text available
Text: 256K x 72 SSRAM Multi-Chip Package Optimum Density and Performance in One Package WEDPY256K72V-XBX* • Designed as L2 Cache for advanced processors see other side for typical application block diagram Fast clock speeds: 200, 166, 150, 133 and 100MHz High performance 2-1-1-1 access rate
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Original
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PDF
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WEDPY256K72V-XBX*
100MHz
256KX72pkgdim
WEDPY256K72V
MIF2012
|
WEDPY256K72V-XBX
Abstract: No abstract text available
Text: 256K x 72 SSRAM Multi-Chip Package Optimum Density and Performance in One Package WEDPY256K72V-XBX* Designed as L2 Cache for advanced processors see other side for typical application block diagram Performance Features • Fast clock speeds: 200, 166, 150, 133 and 100MHz
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Original
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PDF
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WEDPY256K72V-XBX*
100MHz
200mm2
560mm2
308mm
WEDPY256K72V
MIF2012
WEDPY256K72V-XBX
|
Untitled
Abstract: No abstract text available
Text: 256K x 72 SSRAM Multi-Chip Package ▼ Optimum Density and Performance in One Package WEDPY256K72V-XBX* Designed as L2 Cache for advanced processors see other sidefor typical application block diagram Performance Features • • • • • • • •
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Original
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PDF
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WEDPY256K72V-XBX*
100MHz
256KX72sbd
WEDPY256K72V
MIF2012
|
Untitled
Abstract: No abstract text available
Text: 256K x 72 SSRAM Multi-Chip Package Optimum Density and Performance in One Package WEDPY256K72V-XBX* Designed as L2 Cache for advanced processors see other side for typical application block diagram Performance Features • Fast clock speeds: 200, 166, 150, 133 and 100MHz
|
Original
|
PDF
|
WEDPY256K72V-XBX*
100MHz
200mm2
560mm2
308mm
WEDPY256K72V
MIF2012
|
WEDPY256K72V-XBX
Abstract: No abstract text available
Text: 256K x 72 SSRAM Multi-Chip Package Optimum Density and Performance in One Package WEDPY256K72V-XBX* • Designed as L2 Cache for advanced processors see other side for typical application block diagram Performance Features • • • • • • • •
|
Original
|
PDF
|
WEDPY256K72V-XBX*
100MHz
256KX72sbd
WEDPY256K72V
MIF2012
WEDPY256K72V-XBX
|
WEDPY256K72V-XBX
Abstract: No abstract text available
Text: 256K x 72 SSRAM Multi-Chip Package Optimum Density and Performance in One Package WEDPY256K72V-XBX* • Designed as L2 Cache for advanced processors see other side for typical application block diagram Fast clock speeds: 200, 166, 150, 133 and 100MHz High performance 2-1-1-1 access rate
|
Original
|
PDF
|
WEDPY256K72V-XBX*
100MHz
256KX72pkgdim
WEDPY256K72V
MIF2012
WEDPY256K72V-XBX
|