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    74AUP1G00GW

    Abstract: 74AUP1G00 74AUP1G00GF 74AUP1G00GM
    Text: 74AUP1G00 Low-power 2-input NAND gate Rev. 3 — 7 October 2010 Product data sheet 1. General description The 74AUP1G00 provides the single 2-input NAND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


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    74AUP1G00 74AUP1G00 74AUP1G00GW 74AUP1G00GF 74AUP1G00GM PDF

    74LVC1G00

    Abstract: 74LVC1G00GW
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC1G00 Single 2-input NAND gate Product specification Supersedes data of 2000 Nov 08 File under Integrated Circuits, IC24 2001 Apr 05 Philips Semiconductors Product specification Single 2-input NAND gate 74LVC1G00 FEATURES


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    74LVC1G00 74LVC1G00 613508/02/pp12 74LVC1G00GW PDF

    74AUP1G00

    Abstract: 74AUP1G00GM 74AUP1G00GW JESD22-A114-C MO-203 SC88A
    Text: 74AUP1G00 Low-power 2-input NAND gate Rev. 01 — 11 July 2005 Product data sheet 1. General description The 74AUP1G00 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


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    74AUP1G00 74AUP1G00 74AUP1G00GM 74AUP1G00GW JESD22-A114-C MO-203 SC88A PDF

    Untitled

    Abstract: No abstract text available
    Text: 74HC1G00-Q100; 74HCT1G00-Q100 2-input NAND gate Rev. 1 — 16 September 2013 Product data sheet 1. General description The 74HC1G00-Q100; 74HCT1G00-Q100 is a single 2-input NAND gate. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages


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    74HC1G00-Q100; 74HCT1G00-Q100 74HCT1G00-Q100 AEC-Q100 74HC1G00-Q100. HCT1G00 PDF

    74AUP1G132GF

    Abstract: 74AUP1G132GM 74AUP1G132GW JESD22-A114E MO-203
    Text: 74AUP1G132 Low-power 2-input NAND Schmitt trigger Rev. 02 — 15 June 2009 Product data sheet 1. General description The 74AUP1G132 provides the single 2-input NAND Schmitt trigger function which accept standard input signals. They are capable of transforming slowly changing input signals


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    74AUP1G132 74AUP1G132 74AUP1G132GF 74AUP1G132GM 74AUP1G132GW JESD22-A114E MO-203 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G00 Low-power 2-input NAND gate Rev. 6 — 27 June 2012 Product data sheet 1. General description The 74AUP1G00 provides the single 2-input NAND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


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    74AUP1G00 74AUP1G00 PDF

    SOT353-1 thermal resistance

    Abstract: No abstract text available
    Text: 74AUP1G132 Low-power 2-input NAND Schmitt trigger Rev. 5 — 29 June 2012 Product data sheet 1. General description The 74AUP1G132 provides the single 2-input NAND Schmitt trigger function which accept standard input signals. They are capable of transforming slowly changing input signals


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    74AUP1G132 74AUP1G132 SOT353-1 thermal resistance PDF

    MARKING CODE SMD IC A00

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS DATA SHEET 74AHC1G00; 74AHCT1G00 2-input NAND gate Product specification Supersedesdata of 2001 Jan 31 File under Integrated Circuits, IC06 2002 Feb 27 Philips Semiconductors Product specification 2-input NAND gate 74AHC1G00; 74AHCT1G00


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    74AHC1G00; 74AHCT1G00 EIA/JESD22-A114-A EIA/JESD22-A115-A EIA/JESD22-C101 74AHCT1G00 74AHC1G/AHCT1G00 SCA74 613508/04/pp16 MARKING CODE SMD IC A00 PDF

    Untitled

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC1G00 Single 2-input NAND gate Product specification Supersedes data of 2002 May 15 2002 Oct 04 Philips Semiconductors Product specification Single 2-input NAND gate 74LVC1G00 FEATURES DESCRIPTION • Wide supply voltage range from 1.65 to 5.5 V


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    74LVC1G00 JESD8B/JESD36 PDF

    74AHC1G00

    Abstract: 74AHC1G00GW 74AHCT1G00 74AHCT1G00GW SC88A
    Text: INTEGRATED CIRCUITS DATA SHEET 74AHC1G00; 74AHCT1G00 2-input NAND gate Product specification Supersedes data of 1998 Nov 25 File under Integrated Circuits, IC06 1999 Jan 27 Philips Semiconductors Product specification 2-input NAND gate FEATURES • Symmetrical output impedance


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    74AHC1G00; 74AHCT1G00 EIA/JESD22-A114-A EIA/JESD22-A115-A SCA61 245002/00/02/pp12 74AHC1G00 74AHC1G00GW 74AHCT1G00 74AHCT1G00GW SC88A PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G132 Low-power 2-input NAND Schmitt trigger Rev. 5 — 29 June 2012 Product data sheet 1. General description The 74AUP1G132 provides the single 2-input NAND Schmitt trigger function which accept standard input signals. They are capable of transforming slowly changing input signals


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    74AUP1G132 74AUP1G132 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC1G00 Single 2-input NAND gate Rev. 9 — 7 December 2011 Product data sheet 1. General description The 74LVC1G00 provides the single 2-input NAND function. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.


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    74LVC1G00 74LVC1G00 PDF

    74AUP1G00

    Abstract: 74AUP1G00GF 74AUP1G00GM 74AUP1G00GW JESD22-A114-C MO-203
    Text: 74AUP1G00 Low-power 2-input NAND gate Rev. 02 — 29 June 2006 Product data sheet 1. General description The 74AUP1G00 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


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    74AUP1G00 74AUP1G00 74AUP1G00GF 74AUP1G00GM 74AUP1G00GW JESD22-A114-C MO-203 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G00 Low-power 2-input NAND gate Rev. 02.00 — 16 May 2006 Product data sheet 1. General description The 74AUP1G00 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


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    74AUP1G00 74AUP1G00 PDF

    74HCT1G00

    Abstract: 74HC1G00 74HC1G00GV 74HC1G00GW 74HCT1G00GV 74HCT1G00GW 74hct1g
    Text: INTEGRATED CIRCUITS DATA SHEET 74HC1G00; 74HCT1G00 2-input NAND gate Product specification Supersedes data of 2001 Mar 02 2002 May 15 Philips Semiconductors Product specification 2-input NAND gate 74HC1G00; 74HCT1G00 FEATURES DESCRIPTION • Wide supply voltage range from 2.0 to 6.0 V


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    74HC1G00; 74HCT1G00 74HC1G/HCT1G00 74HC/HCT00. SCA74 613508/03/pp16 74HCT1G00 74HC1G00 74HC1G00GV 74HC1G00GW 74HCT1G00GV 74HCT1G00GW 74hct1g PDF

    "NAND Gate"

    Abstract: R20 marking 74LVC1G00 74LVC1G00GM 74LVC1G00GV 74LVC1G00GW
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC1G00 Single 2-input NAND gate Product specification Supersedes data of 2002 Nov 15 2004 Sep 07 Philips Semiconductors Product specification Single 2-input NAND gate 74LVC1G00 FEATURES DESCRIPTION • Wide supply voltage range from 1.65 V to 5.5 V


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    74LVC1G00 74LVC1G00 JESD8B/JESD36 SCA76 R20/05/pp15 "NAND Gate" R20 marking 74LVC1G00GM 74LVC1G00GV 74LVC1G00GW PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC1G00 Single 2-input NAND gate Rev. 10 — 2 July 2012 Product data sheet 1. General description The 74LVC1G00 provides the single 2-input NAND function. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.


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    74LVC1G00 74LVC1G00 PDF

    74AUP1G132GF

    Abstract: 74AUP1G132GM 74AUP1G132GW MO-203
    Text: 74AUP1G132 Low-power 2-input NAND Schmitt trigger Rev. 01 — 20 October 2006 Product data sheet 1. General description The 74AUP1G132 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.


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    74AUP1G132 74AUP1G132 74AUP1G132GF 74AUP1G132GM 74AUP1G132GW MO-203 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74HC1G00; 74HCT1G00 2-input NAND gate Rev. 5 — 25 September 2013 Product data sheet 1. General description The 74HC1G00; 74HCT1G00 is a single 2-input NAND gate. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of


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    74HC1G00; 74HCT1G00 74HCT1G00 74HC1G00: 74HCT1G00: JESD22-A114E JESD22-A115-A HCT1G00 PDF

    74LVC1G00GW

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC1G00 Single 2-input NAND gate Product specification File under Integrated Circuits, IC24 2000 Nov 08 Philips Semiconductors Product specification Single 2-input NAND gate 74LVC1G00 FEATURES DESCRIPTION • Wide supply voltage range of 1.65 to 5.5 V


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    74LVC1G00 JESD8B/JESD36 OT353 74LVC1G00 613507/01/pp12 74LVC1G00GW PDF

    74*C1G

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS DATA SHEET 74AHC1G00; 74AHCT1G00 2-input NAND gate Preliminary specification File under Integrated Circuits, IC06 1998 Nov 25 Philips Semiconductors Preliminary specification 2-input NAND gate FEATURES • Symmetrical output impedance • High noise immunity


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    74AHC1G00; 74AHCT1G00 EIA/JESD22-A114-A EIA/JESD22-A115-A 74AHC1G/AHCT1G00 SCA60 245106/00/01/pp12 74*C1G PDF

    Untitled

    Abstract: No abstract text available
    Text: 74LVC1G00-Q100 Single 2-input NAND gate Rev. 1 — 7 August 2012 Product data sheet 1. General description The 74LVC1G00-Q100 provides the single 2-input NAND function. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.


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    74LVC1G00-Q100 74LVC1G00-Q100 74LVC1G00 PDF

    marking A00

    Abstract: 74AHC1G00 74AHC1G00GV 74AHC1G00GW 74AHCT1G00 74AHCT1G00GV 74AHCT1G00GW smd marking A00
    Text: INTEGRATED CIRCUITS DATA SHEET 74AHC1G00; 74AHCT1G00 2-input NAND gate Product specification Supersedes data of 2002 Feb 27 2002 May 27 Philips Semiconductors Product specification 2-input NAND gate 74AHC1G00; 74AHCT1G00 FEATURES DESCRIPTION • Symmetrical output impedance


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    74AHC1G00; 74AHCT1G00 74AHC1G/AHCT1G00 EIA/JESD22-A114-A EIA/JESD22-A115-A EIA/JESD22-C101 SCA74 marking A00 74AHC1G00 74AHC1G00GV 74AHC1G00GW 74AHCT1G00 74AHCT1G00GV 74AHCT1G00GW smd marking A00 PDF

    74AHC1G00

    Abstract: 74AHC1G00GW 74AHCT1G00 74AHCT1G00GW
    Text: P hilips S em ico n d uctors P relim inary sp ecification 2-in pu t N A ND gate 74A H C 1G 00; 74A H C T 1G 00 FEA TUR ES Q U IC K R E F E R E N C E DATA • S ym m etrical output im pedance GN D = 0 V; Tamb = 25 °C; tr = tf < 3.0 ns. T Y P IC A L • High noise im m unity


    OCR Scan
    74AHC1G00; 74AHCT1G00 EIA/JESD22-A114-A EIA/JESD22-A115-A 74AHC1G/AHCT1 74AHC1G00 74AHC1G00GW 74AHCT1G00 74AHCT1G00GW PDF