54ACT520DMQB/Q
Abstract: No abstract text available
Text: 54AC520 • 54ACT520 8-Bit Identity Comparator General Description The ’AC/’ACT520 are expandable 8-bit comparators. They compare two words of up to eight bits each and provide a LOW output when the two words match bit for bit. The expansion input IA = B also serves as an active LOW enable input.
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54AC520
54ACT520
ACT520
20-pin
54AC520:
54ACT520:
DS100234-1
54ACT520DMQB/Q
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54AC521D
Abstract: No abstract text available
Text: 54AC521 • 54ACT521 8-Bit Identity Comparator General Description Features The AC/ACT521 is an expandable 8-bit comparator. It compares two words of up to eight bits each and provides a LOW output when the two words match bit for bit. The expansion input IA = B also serves as an active LOW enable input.
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54AC521
54ACT521
AC/ACT521
ACT521
54AC521:
54ACT521:
DS100291-1
DS100291-2
54AC521D
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JM38510 Fairchild
Abstract: AC86 54AC86
Text: 54AC86 Quad 2-Input Exclusive-OR Gate General Description Features The ’AC86 contains four, 2-input exclusive-OR gates. n ICC reduced by 50% n Outputs source/sink 24 mA n Standard Military Drawing SMD — ’AC86: 5962-89550 Logic Symbol Connection Diagrams
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54AC86
DS100255-3
DS100255-2
DS100255-1
DS100255
Rating000
JM38510R75202SD
AN-925:
JM38510 Fairchild
AC86
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9153101
Abstract: 100325DMQB Hex schmitt trigger ecl
Text: 100325 Low Power Hex ECL-to-TTL Translator General Description Features The 100325 is a hex translator for converting F100K logic levels to TTL logic levels. Differential inputs allow each circuit to be used as an inverting, non-inverting or differential receiver. An internal reference voltage generator provides VBB
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F100K
5962-9153101VXA
100325J-QMLV
100325WQMLV
5962-9153101VYA
1-Sep-2000]
9153101
100325DMQB
Hex schmitt trigger ecl
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54f164admqb
Abstract: No abstract text available
Text: 54F 74F164A Serial-In Parallel-Out Shift Register General Description Features The ’F164A is a high-speed 8-bit serial-in parallel-out shift register Serial data is entered through a 2-input AND gate synchronous with the LOW-to-HIGH transition of the clock
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74F164A
F164A
74F164APC
96286071012A
54F164ADM
5962-8607101CA
54f164admqb
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54AC10
Abstract: JM38510 fairchild
Text: 54AC10 Triple 3-Input NAND Gate General Description The ’AC10 contains three, 3-input NAND gates. Features n Outputs source/sink 24 mA n Standard Military Drawing SMD — ’AC10: 5962-87610 n For Military 54ACT10 device see the 54ACTQ10 n ICC reduced by 50% on 54AC only
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54AC10
54ACT10
54ACTQ10
DS100261-1
DS100261-3
DS100261-2
DS100261
JM38510R75002SD
AN-925:
JM38510 fairchild
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Untitled
Abstract: No abstract text available
Text: 54F 74F32 Quad 2-Input OR Gate General Description Features This device contains four independent gates each of which performs the logic OR function Y Commercial Guaranteed 4000V minimum ESD protection Package Number Military 74F32PC Package Description N14A
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74F32
74F32PC
14-Lead
14-Lead
20-Lead
54F32DM
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9520
Abstract: 54F11LMQB
Text: General Description This device contains three independent gates, each of which performs the logic AND function. Ordering Code: See Section 0 Commercial Military Package Package Description Number 74F11PC N14A 14-Lead 0.300" Wide Molded Dual-In-Line J14A
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54F/74F11
54F/74F11
74F11PC
54F11DM
54F11FM
54F11LM
14-Lead
14-Lead
9520
54F11LMQB
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ds26ls31m
Abstract: 5962-7802301Q2A
Text: DS26LS31C/DS26LS31M Quad High Speed Differential Line Driver General Description Features The DS26LS31 is a quad differential line driver designed for digital data transmission over balanced lines. The DS26LS31 meets all the requirements of EIA Standard RS-422 and Federal Standard 1020. It is designed to provide
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DS26LS31C/DS26LS31M
DS26LS31
RS-422
RM26LS31MWFQMLV
5962-7802301VFA
5962F7802301VFA
DS26LS31MW
ds26ls31m
5962-7802301Q2A
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74F169PC
Abstract: No abstract text available
Text: 54F 74F169 4-Stage Synchronous Bidirectional Counter General Description Features The ’F169 is a fully synchronous 4-stage up down counter The ’F169 is a modulo-16 binary counter Features a preset capability for programmable operation carry lookahead for
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74F169
modulo-16
74F169PC
16-Lead
962-86072012A
54F169
96286072012A
54F169DMQB
5962-8607201EA
74F169PC
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Untitled
Abstract: No abstract text available
Text: 54ACT399 Quad 2-Port Register General Description Features The ’AC/ACT399 is the logical equivalent of a quad 2-input multiplexer feeding into four edge-triggered flip-flops. A common Select input determines which of the two 4-bit words is accepted. The selected data enters the flip-flop on the rising
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54ACT399
AC/ACT399
ACT399
DS100356-1
DS100356-3
DS100356-5
DS100356-2
54ACT399FMQB
5962R9093401QFA
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fct574
Abstract: national marking code 883b
Text: 54FCT574 Octal D-Type Flip-Flop with TRI-STATE Outputs General Description Features The ’FCT574 is an octal flip-flop with a buffered common Clock CP and a buffered common Output Enable (OE). The information presented to the D inputs is stored in the
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54FCT574
FCT574
FCT374
96289513012A
962-89513012A
5962-8951301RA
1-Sep-2000]
national marking code 883b
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act573
Abstract: No abstract text available
Text: 54ACT573 Octal Latch with TRI-STATE Outputs General Description Features The ’ACT573 is a high-speed octal latch with buffered common Latch Enable LE and buffered common Output Enable (OE) inputs. n ICC and IOZ reduced by 50% n Inputs and outputs on opposite sides of package
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54ACT573
ACT573
ACT373
ACT573:
RM54ACT573SSA
54ACT573FM
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Comlinear Corporation clc502
Abstract: smd transistor 2T 2AJE
Text: N CLC502 Clamping, Low-Gain Op Amp with Fast 14-bit Settling General Description Features • ■ ■ ■ Output clamping with fast recovery 0.0025% settling in 25ns 32ns max. Low power, 170mW Low distortion. -50dBc at 20MHz Applications ■ ■ ■ ■
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CLC502
14-bit
170mW
-50dBc
20MHz
CLC502AJP
CLC502AJE
Comlinear Corporation clc502
smd transistor 2T
2AJE
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Untitled
Abstract: No abstract text available
Text: 54AC521 • 54ACT521 8-Bit Identity Comparator General Description Features The AC/ACT521 is an expandable 8-bit comparator. It compares two words of up to eight bits each and provides a LOW output when the two words match bit for bit. The expansion input IA = B also serves as an active LOW enable input.
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54AC521
54ACT521
AC/ACT521
ACT521
54AC521:
54ACT521:
DS100291-1
DS100291-2
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5962-8995001MFA
Abstract: 5962-8995001B2A smd SD1
Text: 54ACT112 Dual JK Negative Edge-Triggered Flip-Flop General Description The ’ACT112 contains two independent, high-speed JK flip-flops with Direct Set and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Triggering occurs at a voltage level of the clock and is not directly
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54ACT112
ACT112
5962-8995001S2A
5962-8995001SEA
5962-8995001SFA
54ACT112DM-MLS
54ACT112FM-MLS
1-Sep-2000]
5962-8995001MFA
5962-8995001B2A
smd SD1
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Untitled
Abstract: No abstract text available
Text: 54AC520 • 54ACT520 8-Bit Identity Comparator General Description The ’AC/’ACT520 are expandable 8-bit comparators. They compare two words of up to eight bits each and provide a LOW output when the two words match bit for bit. The expansion input IA = B also serves as an active LOW enable input.
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54AC520
54ACT520
ACT520
20-pin
54AC520:
54ACT520:
DS100234-1
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act175
Abstract: 54ACT175DMQB
Text: 54AC175 • 54ACT175 Quad D Flip-Flop General Description The ’AC/’ACT175 is a high-speed quad D flip-flop. The device is useful for general flip-flop requirements where clock and clear inputs are common. The information on the D inputs is stored during the LOW-to-HIGH clock transition. Both
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54AC175
54ACT175
ACT175
AC175:
ACT175:
54ACT175DM-MLS
54ACT175FM-MLS
54ACT175DMQB
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Untitled
Abstract: No abstract text available
Text: 54AC257 • 54ACT257 Quad 2-Input Multiplexer with TRI-STATE Outputs General Description Features The ’AC/’ACT257 is a quad 2-input multiplexer with TRI-STATE outputs. Four bits of data from two sources can be selected using a Common Data Select input. The four
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54AC257
54ACT257
ACT257
5962R8968901FA
5962R8968901V2A
5962R8968901VEA
5962R8968901VFA
2-Sep-2000]
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Untitled
Abstract: No abstract text available
Text: 54AC109 • 54ACT109 Dual JK Positive Edge-Triggered Flip-Flop Simultaneous LOW on CD and SD makes both Q and Q General Description The ’AC/’ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock
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54AC109
54ACT109
ACT109
ACT74
54ACT109FM-MLS
AN-925:
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JM54ACT151S2A-R
Abstract: 54ACT151FMQB
Text: 54AC151 • 54ACT151 8-Input Multiplexer General Description Features The ’AC/’ACT151 is a high-speed 8-input digital multiplexer. It provides, in one package, the ability to select one line of data from up to eight sources. The ’AC/’ACT151 can be used
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54AC151
54ACT151
ACT151
AC151:
ACT151:
DS100270-1
JM54ACT151S2A-R
54ACT151FMQB
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CLC402AJE
Abstract: CLC402A
Text: N CLC402 Low-Gain Op Amp with Fast 14-Bit Settling General Description Features • ■ ■ ■ ■ 0.0025% settling in 25ns 32ns max 0.5mV input offset voltage, 3µV/°C drift ±1 to ±8 closed-loop gain range Low power, 150mW 0.01%/0.05° differential gain/phase
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CLC402
14-Bit
150mW
CLC402AJP
CLC402AJE
CLC402A8B
CLC402AJ
CLC402A
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E27014
Abstract: No abstract text available
Text: 54AC377 • 54ACT377 Octal D Flip-Flop with Clock Enable General Description The ’AC/’ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW.
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54AC377
54ACT377
ACT377
synchroniza2-8769701BRA
5962-8769701BSA
5962-8769701S2A
5962-8769701SRA
5962-8769701SSA
E27014
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863ac
Abstract: 54F374FMQB 54F374
Text: 54F 74F374 Octal D-Type Flip-Flop with TRI-STATE Outputs General Description Features The ’F374 is a high-speed low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and TRI-STATE outputs for bus-oriented applications A buffered Clock CP and Output Enable (OE) are common to all
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74F374
74F374PC
20-Lead
20-Lead
Sma74FMQB
54F374DC
JM38510/34105B2
JM38510/34105BR
863ac
54F374FMQB
54F374
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