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    O186 Search Results

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    O186 Price and Stock

    TE Connectivity NB-PTCO-186

    SENSOR RTD 100OHM 2SIP
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    DigiKey NB-PTCO-186 Box 5,011 1
    • 1 $4.13
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    • 1000 $1.98529
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    Avnet Americas NB-PTCO-186 Bulk 20 Weeks, 3 Days 5,000
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    Newark NB-PTCO-186 Bulk 3,241 1
    • 1 $4.3
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    • 100 $2.63
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    RS NB-PTCO-186 Bulk 5,000
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    TTI NB-PTCO-186 Bulk 5,000
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    Interstate Connecting Components NB-PTCO-186
    • 1 $1.9849
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    Richardson RFPD NB-PTCO-186 5,000
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    Avnet Abacus NB-PTCO-186 22 Weeks 5,000
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    Master Electronics NB-PTCO-186 600
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    Sager NB-PTCO-186 500
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    Pentair Equipment Protection - Hoffman P2PSO186

    SWING OUT SUBPANEL 1800X600
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    DigiKey P2PSO186 Bulk 1
    • 1 $882.49
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    Pentair Equipment Protection - Hoffman P2PSO186G

    SWING OUT SUBPANEL 1800X600
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    DigiKey P2PSO186G Bulk 1
    • 1 $882.49
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    Automation Components Inc A-CP-DO-18--6'CL2P

    10,000 Ohm Thermistor (Type II),
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey A-CP-DO-18--6'CL2P Ammo Pack 1
    • 1 $47
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    Automation Components Inc A-50K-DO-18--6'CL2P

    50,000 Ohm Thermistor, Duct, Wit
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    DigiKey A-50K-DO-18--6'CL2P Ammo Pack 1
    • 1 $47
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    Find more O186 price and stock on Findchips.com

    O186 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    CY37384

    Abstract: CY37384V
    Text: PRELIMINARY CY37384 UltraLogic 384-Macrocell ISR™ CPLD — tS = 5.5 ns Features • 384 macrocells in 24 logic blocks • In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming • • • • • • • • • • — Design changes don’t cause pinout changes


    Original     		PDF CY37384 384-Macrocell CY37384 CY37384V

    d4184

    Abstract: transistor N14 193 atmel application note AT6002 AT6003 AT6005 AT6010
    Text: Features • High-performance • • • • • • • • • – System Speeds > 100 MHz – Flip-flop Toggle Rates > 250 MHz – 1.2 ns/1.5 ns Input Delay – 3.0 ns/6.0 ns Output Delay Up to 204 User I/Os Thousands of Registers Cache Logic Design


    Original     		PDF 0264F 10/99/xM d4184 transistor N14 193 atmel application note AT6002 AT6003 AT6005 AT6010

    5d3 diode

    Abstract: 6B15 7b12 MACH Programmer transistor 7B12 2D15 PAL 007 A power generator control circuit schematic 1C12 5D10
    Text: MACH 5 CPLD Family I MAC ncludes H Adv anc 5A Fam e In form ily atio n Fifth Generation MACH Architecture FEATURES ◆ High logic densities and I/Os for increased logic integration ◆ ◆ ◆ ◆ ◆ ◆ ◆ — 128 to 512 macrocell densities — 68 to 256 I/Os


    Original     		PDF switLV-256/160 M5A3-256/160 M5A3-192/120 M5LV-256/68 M5A3-256/68 M5LV-512/256-7AC-10AI. 5d3 diode 6B15 7b12 MACH Programmer transistor 7B12 2D15 PAL 007 A power generator control circuit schematic 1C12 5D10

    ic 4040

    Abstract: 4040 cmos ci 4040 cmos 4040 stv 4325 O129-O135 PD16707 4040
    Text: お客様各位 カタログ等資料中の旧社名の扱いについて 2010 年 4 月 1 日を以って NEC エレクトロニクス株式会社及び株式会社ルネサステクノロジ が合併し両社の全ての事業が当社に承継されております。従いまして、本資料中には旧社


    Original     		PDF PD16707 PD16707 VDD2-VEE40 PD16707P PD16707N-xxx S16411JJ1V0DS00 200/index PD16707N-xxxTCP SUMIZAC1003 S16411JJ1V0DS ic 4040 4040 cmos ci 4040 cmos 4040 stv 4325 O129-O135 4040

    Untitled

    Abstract: No abstract text available
    Text: 1 MACH 5 FAMILY MACH 5 Family Fifth Generation MACH Architecture DISTINCTIVE CHARACTERISTICS ◆ ◆ ◆ ◆ ◆ ◆ ◆ Publication# 20446 Amendment/0 Rev: D Issue Date: August 1997 MACH 5 Family ◆ Fifth generation MACH architecture — 100% routable


    Original     		PDF 16-038-BGD352-1 DT106

    MC189

    Abstract: 9300 4b10 2D15 marking 1A15 HP 3D6 1b61a0 MACH5-320 ae 4b15
    Text: MACH 5 FAMILY 1 FINAL COM’L:-7/10/12/15 IND:-10/12/15/20 MACH5-320/MACH5LV-320 MACH5-320/120-7/10/12/15 MACH5-320/192-7/10/12/15 MACH5LV-320/184-7/10/12/15 MACH5-320/160-7/10/12/15 MACH5LV-320/120-7/10/12/15 MACH5LV-320/192-7/10/12/15 MACH5-320/184-7/10/12/15


    Original     		PDF MACH5-320/MACH5LV-320 MACH5-320/120-7/10/12/15 MACH5-320/192-7/10/12/15 MACH5LV-320/184-7/10/12/15 MACH5-320/160-7/10/12/15 MACH5LV-320/120-7/10/12/15 MACH5LV-320/192-7/10/12/15 MACH5-320/184-7/10/12/15 MACH5LV-320/160-7/10/12/15 16-038-BGD256-1 MC189 9300 4b10 2D15 marking 1A15 HP 3D6 1b61a0 MACH5-320 ae 4b15

    CY37512

    Abstract: CY37512V
    Text: Back PRELIMINARY CY37512V UltraLogic 3.3V 512-Macrocell ISR™ CPLD — tPD = 15 ns Features • 512 macrocells in 32 logic blocks • 3.3V In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming — Design changes don’t cause pinout changes


    Original     		PDF CY37512V 512-Macrocell CY37512 CY37512V

    CY37384

    Abstract: CY37384V cpld internal
    Text: Back PRELIMINARY CY37384V UltraLogic 3.3V 384-Macrocell ISR™ CPLD Features — tPD = 15 ns — tS = 8 ns • 384 macrocells in 24 logic blocks • 3.3V In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming • • • • • •


    Original     		PDF CY37384V 384-Macrocell CY37384 CY37384V cpld internal

    4D-13

    Abstract: HP 3D6 making 5A6 3d13 3D-14 5B7 Marking i 384
    Text: MACH 5 FAMILY X FINAL COM’L:-7/10/12/15 IND:-10/12/15/20 MACH5-384/MACH5LV-384 MACH5-384/120-7/10/12/15 MACH5-384/192-7/10/12/15 MACH5LV-384/184-7/10/12/15 MACH5-384/160-7/10/12/15 MACH5LV-384/120-7/10/12/15 MACH5LV-384/192-7/10/12/15 MACH5-384/184-7/10/12/15


    Original     		PDF MACH5-384/MACH5LV-384 MACH5-384/120-7/10/12/15 MACH5-384/192-7/10/12/15 MACH5LV-384/184-7/10/12/15 MACH5-384/160-7/10/12/15 MACH5LV-384/120-7/10/12/15 MACH5LV-384/192-7/10/12/15 MACH5-384/184-7/10/12/15 MACH5LV-384/160-7/10/12/15 16-038-BGD256-1 4D-13 HP 3D6 making 5A6 3d13 3D-14 5B7 Marking i 384

    CABGA

    Abstract: fpga JTAG Programmer Schematics AT17 AT40K AT94K AT94S AT94S05AL AT94S10AL AT94S40AL C16107
    Text: Features • Multichip Module Containing Field Programmable System Level Integrated Circuit • • • • • • • • • • • • • • • • • FPSLIC and Secure Configuration EEPROM Memory 512 Kbits to 1 Mbit of Configuration Memory with Security Protection and In-System


    Original     		PDF AT40K 2314D CABGA fpga JTAG Programmer Schematics AT17 AT94K AT94S AT94S05AL AT94S10AL AT94S40AL C16107

    gck451

    Abstract: 2818C AT40K AT40K05AL AT40K10AL AT40K20AL AT40K40AL AT40KAL XC4000 XC5200
    Text: Features • Ultra High Performance • • • • • • • • • • – System Speeds to 100 MHz – Array Multipliers > 50 MHz – 10 ns Flexible SRAM – Internal Tri-state Capability in Each Cell FreeRAM – Flexible, Single/Dual Port, Synchronous/Asynchronous 10 ns SRAM


    Original     		PDF XC4000, XC5200 2818C gck451 AT40K AT40K05AL AT40K10AL AT40K20AL AT40K40AL AT40KAL XC4000

    max 8770

    Abstract: MOS 6526 SR299 diode 3562 SR300 IC 6994 14 pin SR300 datasheet what is product ON 4914
    Text: PRELIMINARY PRODUCT INFORMATION MOS INTEGRATED CIRCUIT µ PD16708 300-OUTPUT TFT-LCD GATE DRIVER DESCRIPTION The µ PD16708 is a TFT-LCD gate driver equipped with 300-output lines. It can output a high-gate scanning voltage in response to CMOS level input because it provided with a level-shift circuit inside the IC circuit.


    Original     		PDF PD16708 300-OUTPUT PD16708 PD16708P max 8770 MOS 6526 SR299 diode 3562 SR300 IC 6994 14 pin SR300 datasheet what is product ON 4914

    O2-A2

    Abstract: Lattice Mach OX2 VCCIO11 ispMACH M4A3 M4A5-192 application note PAL 007 O64i
    Text: ispMACH 4A CPLD Family High Performance E2CMOS In-System Programmable Logic FEATURES ◆ High-performance, E2CMOS 3.3-V & 5-V CPLD families ◆ Flexible architecture for rapid logic designs ◆ ◆ ◆ ◆ ◆ ◆ ◆ — Excellent First-Time-FitTM and refit feature


    Original     		PDF 182MHz M4A3-256/160 208-pin O2-A2 Lattice Mach OX2 VCCIO11 ispMACH M4A3 M4A5-192 application note PAL 007 O64i

    Untitled

    Abstract: No abstract text available
    Text: Features • Multichip Module Containing Field Programmable System Level Integrated Circuit • • • • • • • • • • • • • • • • FPSLIC and Secure Configuration EEPROM Memory 512 Kbits to 1 Mbit of Configuration Memory with Security Protection and In-System


    Original     		PDF AT40K

    Untitled

    Abstract: No abstract text available
    Text: CY37256V UltraLogic 3.3V 256-Macrocell ISR™ CPLD — tPD = 12 ns Features — tS = 7.0 ns • 256 macrocells in sixteen logic blocks • 3.3V In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming • • • • • • • •


    Original     		PDF CY37256V 256-Macrocell

    CY37032VP44-100AI

    Abstract: CY37064P44-154YMB CY37512P208-100UMB
    Text: Family Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes


    Original     		PDF Ultra37000TM CY37032VP44-100AI CY37064P44-154YMB CY37512P208-100UMB

    ultraISR CABLE

    Abstract: No abstract text available
    Text: PRELIMINARY CY37384V UltraLogic 3.3V 384-Macrocell ISR™ CPLD Fully Routable with 100% Logic Utilization Features The CY37384V is designed with a robust routing architecture which allows utilization of the entire device with a fixed pinout. This makes Ultra37000 optimal for implementing on-board design changes using ISR without changing pinouts.


    Original     		PDF CY37384V 384-Macrocell ultraISR CABLE

    QML-38535

    Abstract: AT40KFL040 5962-0325002QXC o26f at40kfl040kz1sv
    Text: REVISIONS LTR DESCRIPTION A B DATE YR-MO-DA APPROVED Added asynchronous timing waveform to figure 3. Updated boilerplate. ksr 04-07-04 Raymond Monnin Add device type 02 which is a 5 volt tolerant version. Editorial changes throughout. tcr 06-06-27 Raymond Monnin


    Original     		PDF F7400 AT40KFL040KZ1SV QML-38535 AT40KFL040 5962-0325002QXC o26f at40kfl040kz1sv

    74287

    Abstract: ML9461B
    Text: FEDL9461-01 Issue Date: Jan 29, 2009 ML9461B Segment Driver for Dot Matrix STN Liquid Crystal Display 1. Product Overview 1.1 General Description The ML9461B is a 320-output segment driver for driving a dot matrix LCD panel. The driver enables switching between 320 outputs and 240 outputs and 200 outputs. The ML9461B is used in


    Original     		PDF FEDL9461-01 ML9461B ML9461B 320-output ML9460. 320-channel mode/240-output mode/200-output 74287

    Untitled

    Abstract: No abstract text available
    Text: ispMACH 4A CPLD Family High Performance E2CMOS In-System Programmable Logic FEATURES ◆ High-performance, E2CMOS 3.3-V & 5-V CPLD families ◆ Flexible architecture for rapid logic designs ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ — Excellent First-Time-FitTM and refit feature


    Original     		PDF 182MHz M4A5-32/32 M4A5-64/32 M4A5-96/48 M4A5-128/64 M4A5-192/96 M4A5-256/128 M4A3256/128-7YC-10YI

    O2-A2

    Abstract: C10C8
    Text: ispMACH 4A CPLD Family High Performance E2CMOS In-System Programmable Logic FEATURES ◆ High-performance, E2CMOS 3.3-V & 5-V CPLD families ◆ Flexible architecture for rapid logic designs ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ — Excellent First-Time-FitTM and refit feature


    Original     		PDF 182MHz M4A5-32/32 M4A5-64/32 M4A5-96/48 M4A5-128/64 M4A5-192/96 M4A5-256/128 M4A3256/128-7YC-10YI O2-A2 C10C8

    tico 732

    Abstract: 5B12 DT114 tms 3755 5B7 Marking LV 20-P 5a7 02 ALL-07 PROGRAMMER
    Text: PRELIMINARY COM’L: -7/10/12/15 IND: -10/12/15/20 The MACH5-384/MACH5LV-384 MACH5-384/120-7/10/12/15/20 MACH5-384/160-7/10/12/15/20 MACH5-384/184-7/10/12/15/20 MACH5-384/192-7/10/12/15/20 MACH5LV-384/120-7/10/12/15/20 MACH5LV-384/160-7/10/12/15/20 MACH5LV-384/184-7/10/12/15/20 MACH5LV-384/192-7/10/12/15/20


    Original     		PDF MACH5-384/MACH5LV-384 MACH5-384/120-7/10/12/15/20 MACH5-384/160-7/10/12/15/20 MACH5-384/184-7/10/12/15/20 MACH5-384/192-7/10/12/15/20 MACH5LV-384/120-7/10/12/15/20 MACH5LV-384/160-7/10/12/15/20 MACH5LV-384/184-7/10/12/15/20 MACH5LV-384/192-7/10/12/15/20 16-038-BGD256-1 tico 732 5B12 DT114 tms 3755 5B7 Marking LV 20-P 5a7 02 ALL-07 PROGRAMMER

    CY37384

    Abstract: CY37384V L0651
    Text: = j— PRELIMINARY T. # CY37384V UltraLogic 3.3V 384-Macrocell ISR™ CPLD Fully Routable with 100% Logic Utilization Features — JTAG-compliant on-board programming The CY37384V is designed with a robust routing architecture which allows utilization of the entire device with a fixed pinout.


    OCR Scan     		PDF CY37384V 384-Macrocell CY37384 CY37384V L0651

    clcc land pattern

    Abstract: CY37512VP208-66UMB CY37032VP44-100AI CY37064P44-154YMB CY37256P160-125UMB TO-220AB/clcc land pattern
    Text: CYPRESS PRELIMINARY Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs General Description Features • In-System Reprogram mable ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes


    OCR Scan     		PDF Ultra37000TM Ultra37000 22V10 clcc land pattern CY37512VP208-66UMB CY37032VP44-100AI CY37064P44-154YMB CY37256P160-125UMB TO-220AB/clcc land pattern