OB2538
Abstract: OB2538AP On-Bright Electronics
Text: OB2538 High Precision CC/CV Primary-Side PWM Controller Product Specification FEATURES OB2538 is a high performance offline PWM Power switch for low power AC/DC charger and adaptor applications. It operates in primary-side sensing and regulation. Consequently, opto-coupler and
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OB2538
TL431
OB2538
OB2538AP
On-Bright Electronics
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c2315
Abstract: IC401B C2068 R1962 asus mcp 430 nvidia C1567 PJP5403 C2061 C51MV MCP51
Text: A B C D E T13M SCHEMATIC Revision 1.1 Content PAGE 2 3 4 5 PAGE SYSTEM PAGE REF. 1 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 AMD S1 CPU 1 -HT&MISC AMD S1 CPU(2)-DDRII
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C51MV
PCIEx16
RTL8201CL
ALC660-GR
EC-IT8510E
c2315
IC401B
C2068
R1962
asus
mcp 430 nvidia
C1567
PJP5403
C2061
C51MV MCP51
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OB33LN
Abstract: ProASICPLUS Flash Family FPGAs v3.3
Text: v3.3 ProASICPLUS TM Flash Family FPGAs Features and Benefits • • High Capacity I/O • • • • • 75,000 to 1 million System Gates 27k to 198kbits of Two-Port SRAM 66 to 712 User I/Os Reprogrammable Flash Technology • • • • 0.22µ 4LM Flash-based CMOS Process
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APA075,
APA150,
APA300
OB33LN
ProASICPLUS Flash Family FPGAs v3.3
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Untitled
Abstract: No abstract text available
Text: v5.0 ProASICPLUS TM Flash Family FPGAs Features and Benefits • High Capacity High Performance Routing Hierarchy Commercial and Industrial • • • • • • • 75,000 to 1 Million System Gates 27 k to 198 kbits of Two-Port SRAM 66 to 712 User I/Os
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schematic diagram online UPS for high frequency
Abstract: ag19
Text: v3.3 ProASICPLUS TM Flash Family FPGAs Features and Benefits • • High Capacity I/O • • • • • 75,000 to 1 million System Gates 27k to 198kbits of Two-Port SRAM 66 to 712 User I/Os Reprogrammable Flash Technology • • • • 0.22µ 4LM Flash-based CMOS Process
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APA750
Abstract: GL25 4kx8 sram
Text: v3 .4 PLUS ProASIC TM Flash Family FPGAs Features and Benefits • • High Capacity I/O • • • • • 75,000 to 1 million System Gates 27k to 198kbits of Two-Port SRAM 66 to 712 User I/Os Reprogrammable Flash Technology • • • • 0.22µ 4LM Flash-based CMOS Process
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RAM256X9SST
Abstract: ProASICPLUS Flash Family FPGAs v5.0
Text: v5.0 ProASICPLUS TM Flash Family FPGAs Features and Benefits • High Capacity High Performance Routing Hierarchy Commercial and Industrial • • • • • • • 75,000 to 1 Million System Gates 27 k to 198 kbits of Two-Port SRAM 66 to 712 User I/Os
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APA075,
APA150,
APA300
RAM256X9SST
ProASICPLUS Flash Family FPGAs v5.0
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APA075
Abstract: No abstract text available
Text: v4.1 ProASICPLUS TM Flash Family FPGAs Features and Benefits High Capacity Commercial and Industrial • • • 75,000 to 1 Million System Gates 27 k to 198 kbits of Two-Port SRAM 66 to 712 User I/Os Military and Mil-Std 883B • • • 300, 000 to 1 million System Gates
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APA075,
APA150,
APA300
APA075
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1kx8 static ram
Abstract: No abstract text available
Text: v5.1 ProASICPLUS ® Flash Family FPGAs Features and Benefits High Performance Routing Hierarchy • • • • High Capacity Commercial and Industrial • • • I/O 75,000 to 1 Million System Gates 27 k to 198 kbits of Two-Port SRAM 66 to 712 User I/Os
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32-Bit
APA075,
APA150,
APA300
1kx8 static ram
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OB25LPLL
Abstract: diagram LG 21 fs 4 bg model circuits MIL-STD-8831 RAM256X9AA APA075
Text: v5.5 ProASICPLUS ® Flash Family FPGAs Features and Benefits High Performance Routing Hierarchy • • • • High Capacity Commercial and Industrial • • • I/O 75,000 to 1 Million System Gates 27 k to 198 kbits of Two-Port SRAM 66 to 712 User I/Os
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32-Bit
APA075,
APA150,
APA300
OB25LPLL
diagram LG 21 fs 4 bg model circuits
MIL-STD-8831
RAM256X9AA
APA075
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iob25hh
Abstract: RAM256X9AA
Text: ProASICPLUS Macro Library Guide R1-2002 Actel Corporation, Sunnyvale, CA 94086 2002 Actel Corporation. All rights reserved. Part Number: 5579016-1 Release: June 2002 No part of this document may be copied or reproduced in any form or by any means without prior written consent of Actel.
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R1-2002
iob25hh
RAM256X9AA
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OB33LN
Abstract: IOB33LNU IOBL33LLU OB25LPLL IOBL25HHU OB33PL IOB33PH OTB33PL OB33LL
Text: A ppl i cati on N ot e I/O Cell Selection for ProASIC 500K Devices In t ro d u c t i o n Table 1 • Input Pads The ProASIC 500K family offers a variety of different I/O cells to meet specific application requirements. These I/O cells can be configured with a 3.3V or 2.5V I/O ring supply
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IB33U
IB25U
IB25LPU
IB25LP
OB33LN
IOB33LNU
IOBL33LLU
OB25LPLL
IOBL25HHU
OB33PL
IOB33PH
OTB33PL
OB33LL
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Untitled
Abstract: No abstract text available
Text: v3.5 ProASICPLUS TM Flash Family FPGAs Features and Benefits • • High Capacity I/O • • • • • 75,000 to 1 Million System Gates 27k to 198kbits of Two-Port SRAM 66 to 712 User I/Os Reprogrammable Flash Technology • • • • 0.22µ 4LM Flash-Based CMOS Process
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198kbits
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Untitled
Abstract: No abstract text available
Text: v2.0 ProASICPLUS Flash Family FPGAs F ea t u re s an d B e n e fi t s • 100% Routability and Utilization H ig h C a p ac it y I/O • 75,000 to 1 million System Gates • 27k to 198kbits of Two-Port SRAM • 66 to 712 User I/Os Re pr og ra mm a b le Fl as h T ec h no lo g y
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198kbits
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APA600-PQ208M
Abstract: FBGA-484 datasheet APA075 APA1000 APA150 APA300 APA450 APA750 APA150-TQ100 RPE 113
Text: v5.8 ProASICPLUS ® Flash Family FPGAs Features and Benefits High Performance Routing Hierarchy • • • • High Capacity Commercial and Industrial • • • I/O 75,000 to 1 Million System Gates 27 k to 198 kbits of Two-Port SRAM 66 to 712 User I/Os
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Untitled
Abstract: No abstract text available
Text: PRE LIM INARY Advanced Micro Devices Am27LV010/Am27LV01 OB 1 Megabit 131,072 x 8-Bit CMOS EPROM DISTINCTIVE CHARACTERISTICS • Single +3.3 V power supply — Regulated power supply 3.0 V-3.6 V — Unregulated power supply 2.7 V-3.6 V (for battery operated systems)
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OCR Scan
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Am27LV010/Am27LV01
28-pin
32-pin
7341A-11
Am27LV010/Am27LV010B
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Untitled
Abstract: No abstract text available
Text: S ta 15BS U til ! Mwftf-Octavc!4 P o rtMmtmai Sue and Weight h ite! Sunne Maimt Package PRINCIPAL SPECIFICATIONS Model for Frequency Performance n Coupling Vapor Phase Range, Bandwidth, Value, & 1R insertion MHz_ MHz_dB, Horn. Frequency Directivity, insertion
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OCR Scan
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OB-255
20B-255
CRG-11B-1005
CRG-20B-1005
26Apr96
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rdl 117-a
Abstract: pa-1000b
Text: A d v a n c e d v O .7 ? TM P r o A S IC ^ F la s h F a m ily F P G A s High Performance, Low Skew, Splitable Global Network 100% Routability and Utilization I/O Schmitt-Trigger Option on Every Input Mixed 2.5V/3.3V Support with Individually-Selectable Voltage and Slew Rate
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198kbits
rdl 117-a
pa-1000b
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OB30-15
Abstract: vde 0550 OB30-9 OB14-18 OB24-12 OB18-12 OB26 OB14-5 OB24-9 OB18-18
Text: • ■— - - — AVEL TECHNICAL INFORMATION SHEET LOW PROFILE TRANSFORMERS INTERNATIONAL APPROVALS UL 506 CSA C 22.2 EN 60/742 SEV 1003 EN 60/950 LOW PROFILE PCB MOUNTED RESIN FILLED UNDER VACUUM 5KV AC FLASH TEST CUSTOM DESIGN AVAILABLE INDUSTRY STANDARD
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OCR Scan
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50/60Hz.
0551IEC
DIN/EN60
OB24-6
OB24-9
OB24-12
OB24-15
800mA
OB24-18
670mA
OB30-15
vde 0550
OB30-9
OB14-18
OB18-12
OB26
OB14-5
OB18-18
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RS232 bus
Abstract: 84F2081
Text: DALLAS DS9097/DS9097E COM Port Adapter s e m ic o n d u c to r FEATURES • Provides a simple, low-cost interface to an RS232C COM Port for reading and writing ¡Button devices DS9097E required for programming DS198x A ddOnly ¡Buttons • Adapter is powered entirely from an RS232 interface
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DS9097/DS9097E
RS232C
DS9097E
DS198x
RS232
DSD9097)
DB-25
DS9097E)
RJ-11
RS232 bus
84F2081
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GAL22V10B
Abstract: GAL22V10 GAL22V10B-7LP GAL22V10C GAL22V10C-7LJ GAL22V10C-7LP GAL22V10B-15LJ GAL22V10C-10LP lattice 22v10 al22v10
Text: GAL22V10 Lattice High Performance E2CMOS PLD Generic Array Logic FUNCTIONAL BLOCK DIAGRAM • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 5 ns Maximum Propagation Delay — Fmax = 200 MHz — 4 ns Maximum from Clock Input to Data Output — UitraMOS® Advanced CMOS Technology
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GAL22V10
22V10
100ms)
GAL22V10B-15/-25Q:
GAL22V10B
GAL22V10B-7LP
GAL22V10C
GAL22V10C-7LJ
GAL22V10C-7LP
GAL22V10B-15LJ
GAL22V10C-10LP
lattice 22v10
al22v10
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shell dep standard
Abstract: BS9523 15s1 DC-37S1A1N 20AW6 DD50SOL DE9P1A0N DC-37PTI DA-15P1A0N BS9523F0018
Text: 07/08 '00 09:10 FAX 0 0 4 4 1909 CTNCH CONNECTORS S ALES 489461 004 | BASIC D Edition 11/98 • Conforms to BS 9523 F0010 and F0018 • Standards RS232 interface • Bright tin finish & grounding indents available for EMI/RFI shielding • Meets dimensional requirements of MIL-C-24308,
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F0010
F0018
RS232
MIL-C-24308,
BS9523F0018&
20AW6)
DA-15S1A0N1
DA-15S1A1N1
DA-15S1A1NT1
15S1A2NT1
shell dep standard
BS9523
15s1
DC-37S1A1N
20AW6
DD50SOL
DE9P1A0N
DC-37PTI
DA-15P1A0N
BS9523F0018
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ATF22V10BL
Abstract: No abstract text available
Text: ATF22V10B/L Features • High Speed Electrically Erasable Programmable Logic Device 7.5 ns Max Propagation Delay 5 V ±10% Operation Low Power ATF22V10BL -10 mA Standby CMOS and TTL Compatible Inputs and Outputs 150 Leakage Maximum Reprog rammable -100% Tested
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ATF22V10B/L
ATF22V10BL
ATF22V10B
ATF22V10BL-25GC
ATF22V10BL-25JC
ATF22V10BL-25NC
ATF22V10BL-25PC
ATF22V10BL-25SC
ATF22V10BL-25GI
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JRC 4580
Abstract: 4580 D JRC 4580 jrc NJU6463 jrc 2060 2060 JRC E.A. JC JRC 2100 jrc 3860 BS 4377
Text: N UU 64 -6 3 PRELIMINARY 16 - C H A R A C T E R DOT 3 - L INE MATRIX LCD CONTROLLER • GENERAL DESCRIPTION .The NJU6463 is a Dot Matrix LCD controller driver for 16-character 3-line with icon display in single chip. It contains voltage converter and regulator, bleeder
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NJU6463C
NJU6463
16-character
5-606This
00Db27fe.
00b277
JRC 4580
4580 D JRC
4580 jrc
jrc 2060
2060 JRC
E.A. JC
JRC 2100
jrc 3860
BS 4377
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