ST P239
Abstract: 714 p180 verilog code for pci express memory transaction P181 Japan P135 equivalent 714 p181 XC000E HQ240 XC4013EPQ160 XC4013
Text: PCI Master Interface, PCI Slave Interface February, 1997 Product Description Features • Fully 2.1 PCI compliant 32 bit, 33MHz PCI Interface ◊ Master Initiator/Target , LC-DI-PCIM-C ◊ Slave (Target-only), LC-DI-PCIS-C PCI Master and Slave Interfaces V1.1.0
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33MHz
XC000E
ST P239
714 p180
verilog code for pci express memory transaction
P181 Japan
P135 equivalent
714 p181
HQ240
XC4013EPQ160
XC4013
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PDF
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MPC860
Abstract: No abstract text available
Text: PCI 9054 PCI Bus Master I/O Accelerator Chip Highlights • PCI v2.2 compliant 32-bit 33MHz Bus Master Interface Controller enables PCI Burst Transfers up to 132Mbytes/second ■ General Purpose Bus Master Interface featuring an advanced Data Pipe Architecture which
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32-bit
33MHz
132Mbytes/second
MPC860
9054-SIL-PB-P2-2
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PDF
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MPC860
Abstract: No abstract text available
Text: PCI 9054 PCI Bus Master I/O Accelerator Chip Highlights • PCI v2.2 compliant 32-bit 33MHz Bus Master Interface Controller enables PCI Burst Transfers up to 132Mbytes/second ■ General Purpose Bus Master Interface featuring an advanced Data Pipe Architecture which
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32-bit
33MHz
132Mbytes/second
MPC860
9054-SIL-PB-P2-2
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PDF
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AV96JA0330420
Abstract: V350EPC V350EPC-33LPA1 V350EPC-40LPA1 V380SDC V96BMC V96SSC PCI bridge
Text: V350EPC ENHANCED PCI BRIDGE CONTROLLER For 32-bit Multiplexed Address/Data Bus Fully compliant with PCI Local Bus Specification, Revision 2.1 Configurable for system master, PCI master, or PCI target operation 32-bit, 33 MHz PCI bus interface Direct interface to Intel i960®
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V350EPC
32-bit
32-bit,
401TM
2348G
TB-EC50-0200
AV96JA0330420
V350EPC
V350EPC-33LPA1
V350EPC-40LPA1
V380SDC
V96BMC
V96SSC
PCI bridge
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PDF
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V360EPC-50LPA1
Abstract: v360epc-50lp V360EPC-33LP 29030 V360EPC V360EPC-33LPA1 V380SDC V96BMC V96SSC SPACE BRIDGE SEMICONDUCTOR
Text: V360EPC ENHANCED PCI BRIDGE CONTROLLER For 32-bit De-Multiplexed Address/Data Bus Fully compliant with PCI Local Bus Specification, Revision 2.1 Configurable for system master, PCI master, or PCI target operation 32-bit, 33 MHz PCI bus interface Direct interface to Intel i960®
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V360EPC
32-bit
32-bit,
2348G
TB-EC60-0200
V360EPC-50LPA1
v360epc-50lp
V360EPC-33LP
29030
V360EPC
V360EPC-33LPA1
V380SDC
V96BMC
V96SSC
SPACE BRIDGE SEMICONDUCTOR
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PDF
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MPC860
Abstract: PCI9054
Text: PCI 9054 Highlights • PCI v2.2 compliant 32-bit 33MHz Bus Master Interface Controller enables PCI Burst Transfers up to 132Mbytes/second ■ General Purpose Bus Master Interface featuring an advanced Data Pipe Architecture which includes two DMA engines, programmable Target and Initiator
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32-bit
33MHz
132Mbytes/second
MPC860
9054-SIL-PB-0-1
PCI9054
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PDF
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PCI9060SD
Abstract: doorbell application 9060SD I960CX i960 Cx Processor
Text: PCI 9060SD MAY 1996 PCI Bus Master Interface Chip for VERSION 0.6 Master and Slave Adapters _ _ _ Features_ • • • • • • • • • PCI Specification 2.1 compliant
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9060SD
I960Sx®
PCI9060SD
9060SD.
PCI9060
PCI9060SD
doorbell application
9060SD
I960CX
i960 Cx Processor
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PDF
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doorbell application
Abstract: 9060SD I960CX PCI9060SD
Text: PCI 9060SD MAY 1996 PCI Bus Master Interface Chip for VERSION 0.6 Master and Slave Adapters _ _ _ Features_ • • • • • • • • • PCI Specification 2.1 compliant
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9060SD
PCI9060SD
I960Sx®
9060SD.
doorbell application
9060SD
I960CX
PCI9060SD
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PDF
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9060ES
Abstract: PCI9060ES PCI9060SD small endian AD-1508
Text: PCI 9060ES November 1995 PCI Bus Master Interface Chip for VERSION 1.0 Adapters and Embedded Systems Features_ • • • • PCI Bus Master and Bus Slave transfers up to 132
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9060ES
PCI9060ES
PCI9060SD
PCI9060ES
9060ES
small endian
AD-1508
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PDF
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NM93CS46
Abstract: PCI9060ES PCI9060SD 10B5 9060ES 93CS56
Text: PCI 9060ES November 1995 PCI Bus Master Interface Chip for VERSION 1.0 Adapters and Embedded Systems Features_ • • • • PCI Bus Master and Bus Slave transfers up to 132
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9060ES
100ns
150ns
200ns
250ns
300ns
350ns
400ns
450ns
A31-29
NM93CS46
PCI9060ES
PCI9060SD
10B5
9060ES
93CS56
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PDF
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doorbell application
Abstract: la2 d2 timer PIN CONFIGURATION pci 32 bit 5 v PCI9060ES PCI9060SD 10B5 9060ES 93CS56 NM93CS46
Text: PCI 9060ES November 1995 PCI Bus Master Interface Chip for VERSION 1.0 Adapters and Embedded Systems Features_ • • • • PCI Bus Master and Bus Slave transfers up to 132
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9060ES
100ns
150ns
200ns
250ns
300ns
350ns
400ns
450ns
A31-29
doorbell application
la2 d2 timer
PIN CONFIGURATION pci 32 bit 5 v
PCI9060ES
PCI9060SD
10B5
9060ES
93CS56
NM93CS46
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PDF
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V363EPC
Abstract: V363EPC-50LPA0 29030 V380SDC V96BMC V96SSC
Text: V363EPC ENHANCED PCI BRIDGE CONTROLLER For 32-bit Multiplexed/Demultiplexed Address/Data Bus Fully compliant with PCI Local Bus Specification, Revision 2.1 Configurable for system master, PCI master, or PCI target operation 32-bit, 33 MHz PCI bus interface
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V363EPC
32-bit
32-bit,
401TM
2348G
TB-EC63-0200
V363EPC
V363EPC-50LPA0
29030
V380SDC
V96BMC
V96SSC
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PDF
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Untitled
Abstract: No abstract text available
Text: LogiCORE "PCI Master and Slave interface" License Agreement Send to: Per Holmberg, Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124, Fax: +1 408 879 4780 PLEASE READ THIS DOCUMENT CAREFULLY BEFORE USING THE XILINX LOGICORE PCI MASTER INTERFACE OR PCI SLAVE INTERFACE DESIGN. BY USING THE XILINX
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PIN CONFIGURATION pci 32 bit 5 v
Abstract: 9060ES 9060SD RC32364 RC5000 pci 32 bit 5 v
Text: Support Components PLX Technology Inc. PCI 9080 I2O Compatible PCI Bus Master I/O Accelerator Chip Features Description ◆ PCI Version 2.1 compliant Bus Master interface chip for adapters and embedded systems ◆ Programmable local bus supports nonmultiplexed 32-bit
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32-bit
16-bit,
PIN CONFIGURATION pci 32 bit 5 v
9060ES
9060SD
RC32364
RC5000
pci 32 bit 5 v
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PDF
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|
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9060ES
Abstract: 9060SD MPC860 9985K
Text: PCI 9080 I2O Compatible PCI Bus Master I/O Accelerator Chip Features • PCI Version 2.1 compliant Bus Master interface chip for adapters and embedded systems ■ Programmable local bus supports nonmultiplexed 32-bit address/data, multiplexed 32- or 16-bit, and
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32-bit
16-bit,
208-pin
133MB/sec
32-bi960
9080-PB-010
9060ES
9060SD
MPC860
9985K
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PDF
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Untitled
Abstract: No abstract text available
Text: PCI 9060SD MAY 1996 VERSION 0.6 PCI Bus Master Interface Chip for Master and Slave Adapters General Description _ Featu res_ • • PCI Specification 2.1 compliant PCI Bus Master Interface supporting master and slave adapters
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OCR Scan
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9060SD
PCI9060SD
9060SD.
hflSS14^
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PDF
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Untitled
Abstract: No abstract text available
Text: PCI 9060SD T E C H N □ L □ EY November 1995 PRELIMINARY VERSION 0.5 PCI Bus Master Interface Chip for Master and Slave Adapters General Description_ Featu res_ • • PCI Specification 2.1 compliant PCI Bus Master Interface supporting master and
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OCR Scan
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9060SD
PCI9060SD
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PDF
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6SS4
Abstract: LA 7681 LA01 9060SD I960CX PCI9060SD Pgti
Text: T E C H N D L U PCI 9060SD E Y A November 1995 PRELIMINARY VERSION 0.5 PCI Bus Master Interface Chip for Master and Slave Adapters General Description_ Featu res_ • • PCI Specification 2.1 compliant PCI Bus Master Interface supporting master and
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OCR Scan
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9060SD
80960SX
PCI9060SD
6SS4
LA 7681
LA01
9060SD
I960CX
PCI9060SD
Pgti
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PDF
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iso 4903
Abstract: 9060SD I960CX PCI9060SD
Text: PCI 9060SD T E C H N D L Q B Y MAY 1996 VERSION 0.6 PCI Bus Master Interface Chip for Master and Slave Adapters Feat u res_ General Description _ • • PCI Specification 2.1 compliant PCI Bus Master Interface supporting master and
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OCR Scan
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g-w50r--coo'
PCI9060SD
9060SD.
iso 4903
9060SD
I960CX
PCI9060SD
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PDF
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Untitled
Abstract: No abstract text available
Text: PCI 9060 * E PCI Bus Master Interface Chip for Adapters and Embedded Systems December, 1995 VERSION 1.2 Features General Description_ • PCI Bus Master Interface supporting adapters and embedded systems • Two independent DMA channels for local bus
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OCR Scan
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PCI9060
100Version
00Q07
PCI9060
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PDF
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LA3101
Abstract: PC19060 Igus LD-310 LDL8 pci9080 80960Cx 93C06 I960CX NM93CS06
Text: PCI 9060 T E C December, 1995 VERSION 1.2 PCI Bus Master Interface Chip for Adapters and Embedded Systems Features General D escrip tio n _ • PCI Bus Master Interface supporting adapters and embedded systems • Two independent DMA channels for local
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OCR Scan
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PCI9060
Q0007bl
xi6-31
Page-100-
0Q007b2
PCI90S0
LA3101
PC19060
Igus
LD-310
LDL8
pci9080
80960Cx
93C06
I960CX
NM93CS06
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PDF
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Untitled
Abstract: No abstract text available
Text: PCI 9060ES j e cT T T T S T T ^T T November 1995 VERSION 1.0 PCI Bus Master Interface Chip for Adapters and Embedded Systems Features General Description PCI Bus Master and Bus Slave transfers up to 132 megabytes/sec supporting three architectures: - PCI Direct Master adapter
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OCR Scan
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9060ES
200ns
250ns
300ns
LAJ31
A31-39
PCI9060ES
PCI9060ES
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PDF
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93CS56
Abstract: doorbell ID l960 pci9080 9060ES 93C06 NM93CS06 NM93CS46 PCI9060ES doorbell
Text: PCI 9060ES T e c T T T T S T T ^ T T November 1995 VERSION 1.0 PCI Bus Master Interface Chip for Adapters and Embedded Systems Features General Description PCI Bus Master and Bus Slave transfers up to 132 megabytes/sec supporting three architectures: - PCI Direct Master adapter
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OCR Scan
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9060ES
200ns
250ns
300ns
1100ns
150ns
200ns
1250ns
350ns
93CS56
doorbell ID
l960
pci9080
9060ES
93C06
NM93CS06
NM93CS46
PCI9060ES
doorbell
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PDF
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430fx
Abstract: Enabler iiG 82371 piix3 intel 430FX intel 80x86
Text: 82371FB PIIX AND 82371 SB (PIIX3) PCI ISA IDE XCELERATOR • Bridge Between the PCI Bus and ISA Bus ■ PCI and ISA Master/Slave Interface — PCI from 25-33 MHz — ISA from 7.5-8.33 MHz — 5 ISA Slots ■ Fast IDE Interface — Supports PIO and Bus Master IDE
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OCR Scan
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82371FB
32-Bit
430fx
Enabler iiG
82371
piix3
intel 430FX
intel 80x86
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PDF
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