PEEL18CV8S-7 Search Results
PEEL18CV8S-7 Datasheets (5)
Part | ECAD Model | Manufacturer | Description | Curated | Datasheet Type | |
---|---|---|---|---|---|---|
PEEL18CV8S-7 | Anachip | -0.5 to 6.0 V, speed 7.5 ns tpd CMOS programmable electrically erasable logic device | Original | |||
PEEL18CV8S-7 | Anachip | CMOS Programmable Electrically Erasable Logic Device | Original | |||
PEEL18CV8S-7 | Integrated Circuit Technology | SPLD, PEEL18CV8 Family, EECMOS Process, 36 Gates, 12 Macro Cells, 8 Reg., 8 User I/Os, 5V Supply Voltage, 7.5 Speed Grade, 20-SOIC | Original | |||
PEEL18CV8S-7 | Unknown | CMOS Programmable Electrically Erasable Logic Device | Original | |||
PEEL18CV8S-7L | Anachip | CMOS Programmable Electrically Erasable Logic Device | Original |