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    PHASE CHEKER Search Results

    PHASE CHEKER Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TB67B001BFTG Toshiba Electronic Devices & Storage Corporation Brushless Motor Driver/3 Phases Driver/Vout(V)=25/Iout(A)=3/Square Wave Visit Toshiba Electronic Devices & Storage Corporation
    TC78B011FTG Toshiba Electronic Devices & Storage Corporation Brushless Motor Driver/3 Phases Driver/Vout(V)=30/Square, Sine Wave Visit Toshiba Electronic Devices & Storage Corporation
    TB67S141AFTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Unipolar Type/Vout(V)=84/Iout(A)=3/Phase Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67B001AFTG Toshiba Electronic Devices & Storage Corporation Brushless Motor Driver/3 Phases Driver/Vout(V)=25/Iout(A)=3/Square Wave Visit Toshiba Electronic Devices & Storage Corporation
    TB67H480FNG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Unipolar Type/Vout(V)=50/Iout(A)=2.5/ PHASE input type Visit Toshiba Electronic Devices & Storage Corporation

    PHASE CHEKER Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    phase cheker

    Abstract: SO56-2 fct162511ct B1A16
    Text: Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • IDT54/74FCT162511AT/CT PRELIMINARY FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY 0.5 MICRON CMOS Technology Typical tsk o (Output Skew) < 250ps, clocked mode


    Original     		IDT54/74FCT162511AT/CT 16-BIT 250ps, MIL-STD-883, 200pF, FCT162511AT/CT 16-bit phase cheker SO56-2 fct162511ct B1A16 PDF

    SO56-2

    Abstract: phase cheker
    Text: Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • IDT54/74FCT162511AT/CT FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY 0.5 MICRON CMOS Technology Typical tsk o (Output Skew) < 250ps, clocked mode Low input and output leakage ≤1µA (max)


    Original     		IDT54/74FCT162511AT/CT 16-BIT 250ps, MIL-STD-883, 200pF, FCT16. 16-BIT SO56-1) SO56-2 phase cheker PDF

    phase cheker

    Abstract: B1A16 SO56-2
    Text: Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • IDT54/74FCT162511AT/CT PRELIMINARY FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY 0.5 MICRON CMOS Technology Typical tsk o (Output Skew) < 250ps, clocked mode


    Original     		IDT54/74FCT162511AT/CT 16-BIT 250ps, MIL-STD-883, 200pF, FCT162511AT/CT 16-bit phase cheker B1A16 SO56-2 PDF

    SO56-2

    Abstract: phase cheker
    Text: Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • IDT54/74FCT162511AT/CT FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY 0.5 MICRON CMOS Technology Typical tsk o (Output Skew) < 250ps, clocked mode Low input and output leakage ≤1µA (max)


    Original     		IDT54/74FCT162511AT/CT 16-BIT 250ps, MIL-STD-883, 200pF, FCT16. 16-BIT SO56-1) SO56-2 phase cheker PDF

    Untitled

    Abstract: No abstract text available
    Text: Integrated D evice Technology, Inc. FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: • • • • • • • • • • • 0.5 MICRON CMOS Technology Typical tsk o (Output Skew) < 250ps, clocked mode Low input and output leakage <1 ixA (max)


    OCR Scan     		16-BIT 250ps, MIL-STD-883, 200pF, FCT162511 16-bit 0023D44 IDT54/74FCT162511AT/CT PDF

    Untitled

    Abstract: No abstract text available
    Text: Integrated Device Technology, Inc. FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: • • • • 0.5 MICRON CM O S Technology Typical tsk o (Output Skew) < 250ps, clocked mode Low input and output leakage <1 jxA (max) ESD > 2000V per M IL-STD-883, Method 3015;


    OCR Scan     		16-BIT 250ps, IL-STD-883, 200pF, FCT162511AT/CT IDT54/74FCT162511AT/CT 16-BIT E56-1) 162511CT PDF

    Untitled

    Abstract: No abstract text available
    Text: Integrated Device Technology, Inc. FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: • • • • • • • • • • • IDT54/74FCT162511AT/CT type latches and D-type flip-flops to allow data flow in transpar­ ent, latched or clocked modes. The device has a parity


    OCR Scan     		16-BIT IDT54/74FCT162511AT/CT 16-BIT MIL-STD-883, E56-1) 162511CT PDF

    74fct162511 idt

    Abstract: No abstract text available
    Text: FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: • • • • • • • • • • • IDT54/74FCT162511 AT/CT PRELIMINARY type latches and D-type flip-flops to allow dataflow in transpar­ ent, latched or clocked modes. The device has a parity


    OCR Scan     		16-BIT IDT54/74FCT162511 IDT54/74FCT162511AT/CT 16-BIT MIL-STD-883, S056-1) S056-2' E56-1) 162511AT 162511CT 74fct162511 idt PDF

    phase cheker

    Abstract: psc2101
    Text: H htegiated D e v iz e T e c h n o lo g y , l i e . FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: • • • • • • • • • • • 0.5 MICRON CM O S Technology Typical tsk o (Output Skew) < 250ps, clocked mode Low input and output leakage <1 jxA (max)


    OCR Scan     		16-BIT IDT54/74FCT162511AT/CT 250ps, IL-STD-883, 200pF, 46B5771 00E111S 48-Pin 56-Pin phase cheker psc2101 PDF

    MOSTEK 36000

    Abstract: 3861 mostek MK2408P MK2500P
    Text: CONTENTS I. Functional/Numerical Index II. Shift Registers III. Read Only Memories 16K ROMs 32K ROMs 64K ROMs Programmable ROMs Random Access Memories 4K Dynamic RAMs 16K Dynamic RAMs 4K Static RAMs IV. V. Application Information VI. Packaging VII. Reliability Information


    OCR Scan     		1002P 1007P 1007N MOSTEK 36000 3861 mostek MK2408P MK2500P PDF