AN10254
Abstract: AN10331 arm7 lpc2119 lpc21xx philips 23 Philips 336 LPC2000 Philips ARM7 LPC210X 0xE01FC080 LPC2xxx code example
Text: AN10331 Philips LPC2xxx family phase lock loop Rev. 01 — 1 November 2004 Application note Document information Info Content Keywords LPC2000, Phase Lock Loop Initialization Abstract Application information for the LPC2000 family Phase Lock Loop AN10331 Philips Semiconductors
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AN10331
LPC2000,
LPC2000
AN10254
AN10331
arm7 lpc2119
lpc21xx
philips 23
Philips 336
Philips ARM7 LPC210X
0xE01FC080
LPC2xxx code example
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Hitachi DSA00101
Abstract: HD74CDC2509
Text: HD74CDC2509 3.3-V Phase-lock Loop Clock Driver Preliminary 1st. Edition December 1997 Description The HD74CDC2509 is a high-performance, low-skew, low-jitter, phase-lock loop clock driver. It uses a phase-lock loop PLL to precisely align, in both frequency and phase, the feedback (FBOUT) output to the
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HD74CDC2509
HD74CDC2509
D-85622
Hitachi DSA00101
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PC133 registered reference design
Abstract: No abstract text available
Text: Integrated Circuit Systems, Inc. DATA SHEET ICS2509C ICS2509C 3.3V Phase-Lock Loop Clock Driver 3.3V Phase-Lock Loop Clock Driver General Description Features The ICS2509C is a high performance, low skew, low jitter clock driver. It uses a phase lock loop PLL technology to
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ICS2509C
ICS2509C
2509D
2509DG
2509DGLF
PGG24)
2509DGLFT
PC133 registered reference design
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PC133 registered reference design
Abstract: No abstract text available
Text: Integrated Circuit Systems, Inc. ICS2510C DATA SHEET ICS2510C 3.3V Phase-Lock Loop Clock Driver 3.3V Phase-Lock Loop Clock Driver General Description Features The ICS2510C is a high performance, low skew, low jitter clock driver. It uses a phase lock loop PLL technology to
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ICS2510C
ICS2510C
199707558G
PC133 registered reference design
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HD74CDC2509B
Abstract: DSA003634
Text: HD74CDC2509B 3.3-V Phase-lock Loop Clock Driver ADE-205-218G Z 8th. Edition June 2000 Description The HD74CDC2509B is a high-performance, low-skew, low-jitter, phase-lock loop clock driver. It uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the feedback (FBOUT) output to the
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HD74CDC2509B
ADE-205-218G
HD74CDC2509B
can2100
DSA003634
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HD74CDC2510B
Abstract: hd74cdc2510 DSA003634
Text: HD74CDC2510B 3.3-V Phase-lock Loop Clock Driver ADE-205-219G Z 8th. Edition June 2000 Description The HD74CDC2510B is a high-performance, low-skew, low-jitter, phase-lock loop clock driver. It uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the feedback (FBOUT) output to the
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HD74CDC2510B
ADE-205-219G
HD74CDC2510B
i2100
hd74cdc2510
DSA003634
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ICS1890
Abstract: ICS2509C ICS280 MK1491-14 PC133 registered reference design
Text: Integrated Circuit Systems, Inc. DATA SHEET ICS2509C ICS2509C 3.3V Phase-Lock Loop Clock Driver 3.3V Phase-Lock Loop Clock Driver General Description Features The ICS2509C is a high performance, low skew, low jitter clock driver. It uses a phase lock loop PLL technology to
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ICS2509C
ICS2509C
199707558G
ICS1890
ICS280
MK1491-14
PC133 registered reference design
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HD74CDC2509B
Abstract: Hitachi DSA00396
Text: HD74CDC2509B 3.3-V Phase-lock Loop Clock Driver ADE-205-218F Z 7th. Edition October 1999 Description The HD74CDC2509B is a high-performance, low-skew, low-jitter, phase-lock loop clock driver. It uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the feedback (FBOUT) output to the
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HD74CDC2509B
ADE-205-218F
HD74CDC2509B
Hitachi DSA00396
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219F
Abstract: HD74CDC2510B hd74cdc2510 Hitachi DSA00396
Text: HD74CDC2510B 3.3-V Phase-lock Loop Clock Driver ADE-205-219F Z 7th. Edition October 1999 Description The HD74CDC2510B is a high-performance, low-skew, low-jitter, phase-lock loop clock driver. It uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the feedback (FBOUT) output to the
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HD74CDC2510B
ADE-205-219F
HD74CDC2510B
219F
hd74cdc2510
Hitachi DSA00396
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Untitled
Abstract: No abstract text available
Text: HD74CDCF2510B 140 MHz, 0 to 85°C Operation 3.3-V Phase-lock Loop Clock Driver REJ03D0828-1000 Previous: ADE-205-225H Rev.10.00 Apr 07, 2006 Description The HD74CDCF2510B is a high-performance, low-skew, low-jitter, phase-lock loop clock driver. It uses a phase-lock
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HD74CDCF2510B
REJ03D0828-1000
ADE-205-225H)
HD74CDCF2510B
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2510C
Abstract: CSP2510C IDTCSP2510C
Text: IDTCSP2510C 3.3V PHASE-LOCK LOOP CLOCK DRIVER 0ºC TO 85ºC TEMPERATURE RANGE IDTCSP2510C 3.3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER FEATURES: DESCRIPTION: • Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications • Distributes one clock input to one bank of ten outputs
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IDTCSP2510C
133MHz:
150ps
133MHz
25MHz
140MHz
24-Pin
CSP2510C
2510C
IDTCSP2510C
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CSP2
Abstract: CSP2510D IDTCSP2510D
Text: IDTCSP2510D 3.3V PHASE-LOCK LOOP CLOCK DRIVER 0°C TO 85°C TEMPERATURE RANGE IDTCSP2510D 3.3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER FEATURES: DESCRIPTION: • Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications • Distributes one clock input to one bank of ten outputs
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IDTCSP2510D
166MHz:
150ps
166MHz
50MHz
175MHz
24-Pin
CSP2510D
CSP2
IDTCSP2510D
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HD74CDCF2509BTEL
Abstract: HD74CDCF2509B hd74cdcf2509
Text: HD74CDCF2509B 140 MHz, 0 to 85°C Operation 3.3-V Phase-lock Loop Clock Driver REJ03D0827-1000 Previous: ADE-205-224H Rev.10.00 Apr 07, 2006 Description The HD74CDCF2509B is a high-performance, low-skew, low-jitter, phase-lock loop clock driver. It uses a phase-lock
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HD74CDCF2509B
REJ03D0827-1000
ADE-205-224H)
HD74CDCF2509B
HD74CDCF2509BTEL
hd74cdcf2509
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2510C
Abstract: CSP2510C IDTCSP2510C
Text: IDTCSP2510C 3.3V PHASE-LOCK LOOP CLOCK DRIVER 0ºC TO 85ºC TEMPERATURE RANGE IDTCSP2510C 3.3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER FEATURES: DESCRIPTION: • Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications • Distributes one clock input to one bank of ten outputs
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IDTCSP2510C
133MHz:
150ps
133MHz
25MHz
140MHz
24-Pin
CSP2510C
2510C
IDTCSP2510C
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Untitled
Abstract: No abstract text available
Text: IDTCSP2510C 3.3V PHASE-LOCK LOOP CLOCK DRIVER 0ºC TO 85ºC TEMPERATURE RANGE IDTCSP2510C 3.3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER FEATURES: DESCRIPTION: • Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications • Distributes one clock input to one bank of ten outputs
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IDTCSP2510C
133MHz:
150ps
133MHz
25MHz
140MHz
24-Pin
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Untitled
Abstract: No abstract text available
Text: IDTCSP2510B 3.3V PHASE-LOCK LOOP CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE IDT74CSP2510B 3.3 PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER FEATURES: lock loop PLL clock driver. It uses a PLL to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK)
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IDTCSP2510B
24-pin
100MHz:
200ps
IDT74CSP2510B
2510B
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Hitachi DSA002744
Abstract: ADE-205-219E
Text: HD74CDC2510B 3.3-V Phase-lock Loop Clock Driver ADE-205-219E Z 6th. Edition Nov. 1, 1998 Description The HD74CDC2510B is a high-performance, low-skew, low-jitter, phase-lock loop clock driver. It uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the feedback (FBOUT) output to the
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HD74CDC2510B
ADE-205-219E
HD74CDC2510B
Hitachi DSA002744
ADE-205-219E
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Untitled
Abstract: No abstract text available
Text: HD74CDCF2509B 140 MHz, 0 to 85°C Operation 3.3-V Phase-lock Loop Clock Driver REJ03D0827-1000 Previous: ADE-205-224H Rev.10.00 Apr 07, 2006 Description The HD74CDCF2509B is a high-performance, low-skew, low-jitter, phase-lock loop clock driver. It uses a phase-lock
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HD74CDCF2509B
REJ03D0827-1000
ADE-205-224H)
HD74CDCF2509B
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2510C
Abstract: 30PF CSP2510C IDTCSP2510C CY923
Text: IDTCSP2510C 3.3V PHASE-LOCK LOOP CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE IDTCSP2510C 3.3 PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER FEATURES: lock loop PLL clock driver. It uses a PLL to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK)
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IDTCSP2510C
CSP2510C
SO24-9)
2510C
2510C
30PF
IDTCSP2510C
CY923
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Untitled
Abstract: No abstract text available
Text: HD74CDC2509 3.3-V Phase-lock Loop Clock Driver HITACHI Preliminary 1st. Edition December 1997 Description The HD74CDC2509 is a high-performance, low-skew, low-jitter, phase-lock loop clock driver. It uses a phase-lock loop PLL to precisely align, in both frequency and phase, the feedback (FBOUT) output to the
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HD74CDC2509
HD74CDC2509
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Untitled
Abstract: No abstract text available
Text: HD74CDC2510B 3.3-V Phase-lock Loop Clock Driver HITACHI ADE-205-219A Z 2nd. Edition July 1998 Description The HD74CDC2510B is a high-performance, low-skew, low-jitter, phase-lock loop clock driver. It uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the feedback (FBOUT) output to
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HD74CDC2510B
ADE-205-219A
HD74CDC2510B
D-85622
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Untitled
Abstract: No abstract text available
Text: HD74CDC2509B 3.3-V Phase-lock Loop Clock Driver HITACHI ADE-205-218A Z 2nd. Edition July 1998 Description The HD74CDC2509B is a high-performance, low-skew, low-jitter, phase-lock loop clock driver. It uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the feedback (FBOUT) output to
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HD74CDC2509B
ADE-205-218A
HD74CDC2509B
D-85622
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P16C2510
Abstract: P16C2510AL DC2510A
Text: f i PER I COM PI6C2510A 11111111111i i Phase-Lock Loop Clock Driver with 10-Clock Outputs Product Features Product Description • H igh-Perform ance Phase-Lock L oop C lock D istribution that
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100psm
24-pin
PI6C2510A
10-Clock
Out200
z-125
z-134
P16C2510AL
P16C2510
DC2510A
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Untitled
Abstract: No abstract text available
Text: HD74CDC2509B 3.3-V Phase-lock Loop Clock Driver HITACHI ADE-205-218E Z 6th. Edition Nov. 1, 1998 Description The HD74CDC2509B is a high-performance, low-skew, low-jitter, phase-lock loop clock driver. It uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the feedback (FBOUT) output to the
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HD74CDC2509B
ADE-205-218E
HD74CDC2509B
40815HITEC
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