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    PHASE LOGIC LOOP Search Results

    PHASE LOGIC LOOP Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    8V89316BAG Renesas Electronics Corporation Ethernet PLL and IEEE 1588 Synthesizer Visit Renesas Electronics Corporation
    8V89316BAG8 Renesas Electronics Corporation Ethernet PLL and IEEE 1588 Synthesizer Visit Renesas Electronics Corporation
    TB67B001BFTG Toshiba Electronic Devices & Storage Corporation Brushless Motor Driver/3 Phases Driver/Vout(V)=25/Iout(A)=3/Square Wave Visit Toshiba Electronic Devices & Storage Corporation
    TC78B011FTG Toshiba Electronic Devices & Storage Corporation Brushless Motor Driver/3 Phases Driver/Vout(V)=30/Square, Sine Wave Visit Toshiba Electronic Devices & Storage Corporation
    TB67S141AFTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Unipolar Type/Vout(V)=84/Iout(A)=3/Phase Interface Visit Toshiba Electronic Devices & Storage Corporation

    PHASE LOGIC LOOP Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    AND8040

    Abstract: AND8040/D MC100EP40 MC100LVEL40 PRAD-2
    Text: AND8040/D Phase Lock Loop General Operations Prepared by: Paul Shockman ON Semiconductor Logic Applications Engineering http://onsemi.com THEORY OF OPERATION A general phase lock loop may be modeled as a reference signal and a feedback signal driving a phase detector logic


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    PDF AND8040/D AND8040 AND8040/D MC100EP40 MC100LVEL40 PRAD-2

    AND8040

    Abstract: ko 247 MC100LVEL40
    Text: AND8040/D Phase Lock Loop General Operations Prepared by: Paul Shockman ON Semiconductor Logic Applications Engineering http://onsemi.com APPLICATION NOTE THEORY OF OPERATION A general phase lock loop may be modeled as a reference signal and a feedback signal driving a phase detector logic


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    PDF AND8040/D r14525 AND8040 ko 247 MC100LVEL40

    Untitled

    Abstract: No abstract text available
    Text: T R I Q U I N T S E M I C O N D U C T O R, I N C . GA1110E Figure 1. Block Diagram VDD T1 CLKIN FBIN S1 S0 T0 GND 8 7 6 5 4 3 2 1 PHASE-LOCKED LOOP PLL PHASE CONTROL LOGIC Multi-Phase Clock Buffer MUX CONFIGURATION LOGIC Features GND OUTPUT BUFFER OUTPUT


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    PDF GA1110E GA1110E

    SCHS177B

    Abstract: CD74HC297E HC297 CD74HC297
    Text: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54HC297, CD74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177B High-Speed CMOS Logic Digital Phase-Locked Loop November 1997 - Revised May 2003


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    PDF CD54HC297, CD74HC297, CD74HCT297 SCHS177B HC297 CD74HCT297 SCHS177B CD74HC297E CD74HC297

    CD54HC297

    Abstract: CD74HCT297 CD54HC297F3A CD74HC297 CD74HC297E LH211
    Text: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54HC297, CD74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177B High-Speed CMOS Logic Digital Phase-Locked Loop November 1997 - Revised May 2003


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    PDF HC297 HCT29 CD54HC297, CD74HC297, CD74HCT297 SCHS177B HC297 CD74HCT297 55MHz 35MHz CD54HC297 CD54HC297F3A CD74HC297 CD74HC297E LH211

    CD74HCT297E

    Abstract: No abstract text available
    Text: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54HC297, CD74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177B High-Speed CMOS Logic Digital Phase-Locked Loop November 1997 - Revised May 2003


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    PDF CD54HC297, CD74HC297, CD74HCT297 SCHS177B HC297 CD74HCT297 CD74HCT297E

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54HC297, CD74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177B High-Speed CMOS Logic Digital Phase-Locked Loop November 1997 - Revised May 2003


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    PDF HC297 HCT29 CD54HC297, CD74HC297, CD74HCT297 SCHS177B HC297 CD74HCT297 55MHz 35MHz

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54HC297, CD74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177B High-Speed CMOS Logic Digital Phase-Locked Loop November 1997 - Revised May 2003


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    PDF CD54HC297, CD74HC297, CD74HCT297 SCHS177B HC297 CD74HCT297

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54HC297, CD74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177B High-Speed CMOS Logic Digital Phase-Locked Loop November 1997 - Revised May 2003


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    PDF CD54HC297, CD74HC297, CD74HCT297 SCHS177B HC297 CD74HCT297

    HC297

    Abstract: CD54HC297 CD54HC297F3A CD74HC297 CD74HC297E CD74HCT297
    Text: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54HC297, CD74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177B High-Speed CMOS Logic Digital Phase-Locked Loop November 1997 - Revised May 2003


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    PDF HC297 HCT29 CD54HC297, CD74HC297, CD74HCT297 SCHS177B HC297 CD74HCT297 55MHz 35MHz CD54HC297 CD54HC297F3A CD74HC297 CD74HC297E

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54HC297, CD74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177B High-Speed CMOS Logic Digital Phase-Locked Loop November 1997 - Revised May 2003


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    PDF HC297 HCT29 CD54HC297, CD74HC297, CD74HCT297 SCHS177B HC297 CD74HCT297 55MHz 35MHz

    CD54HC297

    Abstract: CD54HC297F3A CD74HC297 CD74HC297E CD74HCT297
    Text: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54HC297, CD74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177B High-Speed CMOS Logic Digital Phase-Locked Loop November 1997 - Revised May 2003


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    PDF HC297 HCT29 CD54HC297, CD74HC297, CD74HCT297 SCHS177B HC297 CD74HCT297 55MHz 35MHz CD54HC297 CD54HC297F3A CD74HC297 CD74HC297E

    CD54HC297

    Abstract: CD54HC297F3A CD74HC297 CD74HC297E CD74HCT297 square D KCP
    Text: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54HC297, CD74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177B High-Speed CMOS Logic Digital Phase-Locked Loop November 1997 - Revised May 2003


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    PDF HC297 HCT29 CD54HC297, CD74HC297, CD74HCT297 SCHS177B HC297 CD74HCT297 55MHz 35MHz CD54HC297 CD54HC297F3A CD74HC297 CD74HC297E square D KCP

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54HC297, CD74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177B High-Speed CMOS Logic Digital Phase-Locked Loop November 1997 - Revised May 2003


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    PDF CD54HC297, CD74HC297, CD74HCT297 SCHS177B HC297 CD74HCT297

    74hc297

    Abstract: SCHS177A 74hc297 application notes CD54HC297 CD54HC297F3A CD74HC297 CD74HC297E CD74HCT297
    Text: [ /Title CD74 HC297 , CD74 HCT29 7 /Subject (HighSpeed CMOS Logic Digital PhaseLocked CD54/74HC297, CD74HCT297 Data sheet acquired from Harris Semiconductor SCHS177A High-Speed CMOS Logic Digital Phase-Locked-Loop November 1997 - Revised May 2000 Features


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    PDF HC297 HCT29 CD54/74HC297, CD74HCT297 SCHS177A HC297 CD74HCT297 55MHz 35MHz 74hc297 SCHS177A 74hc297 application notes CD54HC297 CD54HC297F3A CD74HC297 CD74HC297E

    diagram of light sensitive alarm

    Abstract: Digital Alarm Clock 40 pin BLOCK diagram of light sensitive alarm light sensitive alarm PHOTODIODE ALARM CIRCUIT RGR2622 light sensitive alarm circuit digital clock with alarm
    Text: Fiber Optic “Light to Logic” Receiver with Clock Recovery Preliminary Technical Data RGR2622 Features Applications Description • Light to Logic 20-Pin DIP Receiver Offers ECL Compatibility • Sensitivity: –31 dBm • Phase-Locked Loop PLL Timing Recovery Circuit


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    PDF RGR2622 20-Pin RGR2622 diagram of light sensitive alarm Digital Alarm Clock 40 pin BLOCK diagram of light sensitive alarm light sensitive alarm PHOTODIODE ALARM CIRCUIT light sensitive alarm circuit digital clock with alarm

    Untitled

    Abstract: No abstract text available
    Text: Fiber Optic “Light to Logic” Receiver with Clock Recovery Technical Data RGR1551 Features Applications • Light to Logic 20-pin DIP Receiver offers ECL Compatibility • Long Reach, High Performance • Sensitivity -36 dBm • Phase-locked Loop PLL


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    PDF RGR1551 20-pin RGR1551 op400 RGR1551-xx RGR1551-FP RGR1551-ST RGR1551-SC RGR1551-DN

    HEF4046BP

    Abstract: HEF4046BT HE4000B HEF4046B HEF4046BD
    Text: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4046B MSI Phase-locked loop Product specification


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    PDF HE4000B HEF4046B HEF4046B HEF4046BP HEF4046BT HEF4046BD

    application of light sensitive alarm

    Abstract: RGR1551 light sensitive alarm diagram of light sensitive alarm
    Text: Fiber Optic “Light to Logic” Receiver with Clock Recovery Preliminary Technical Data RGR1551 Features Applications • Light to Logic 20-Pin DIP Receiver Offers ECL Compatibility • Long Reach, High Performance • Sensitivity: –36 dBm • Phase-Locked Loop PLL


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    PDF RGR1551 20-Pin RGR1551 application of light sensitive alarm light sensitive alarm diagram of light sensitive alarm

    HEF4046B

    Abstract: Family Specifications HEF, HEC HE4000B HEF4046BD HEF4046BP HEF4046BT MS-012AC
    Text: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4046B MSI Phase-locked loop Product specification


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    PDF HE4000B HEF4046B HEF4046B OT38-1 050G09 MO-001AE Family Specifications HEF, HEC HEF4046BD HEF4046BP HEF4046BT MS-012AC

    Untitled

    Abstract: No abstract text available
    Text: Figure 1. Block Diagram F l F l F I F I F ] □ _ Clock Doubler/ Ttoo-Phase Generator PHASE-LOCKED CONTROL LOGIC LOOP P IL \ MUX DIVIDE "0 OUTPUT BUFFER OUTPUT BUFFER OUTPUT BUFFER LlJ Li] /— Oata Sheets F l GA1210E LOGIC OUTPUT BUFFER lD OUTPUT BUFFER


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    PDF GA1210E 500ps 16-pin 28-pin

    diode BY 399 itt

    Abstract: Q20P010 M/Q20P025
    Text: DEVICE SPECIFICATION ECL/TTL “TURBO ” LOGIC ARRAYS WITH PHASE-LOCKED LOOP Q20P010/Q20P025 FEATURES On-chip high frequency phase-locked loop Up to 1.25 GHz capability Edge jitter as low as 50 ps pk-pk 900 and 3000 gates of customizable digital logic Utilizes proven Q20000* Series macro library


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    PDF Q20000* 10Ops TogP010 Q20P025 ii11n iiii111n Q20P010 Q20P025 0001b23 diode BY 399 itt M/Q20P025

    MC4044

    Abstract: mecl mttl MTTL MC12013 648 ANALOG MC4024 MC12000 MC12012 MC12020 phase logic loop
    Text: Logic products for phase-locked loop applications M otorola offers the designer a choice o f specially designed integrated circuits fo r perform ing phase-locked loop functions: phase detection, frequency division, filtering , and voltage-controlled signal generation. In


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    PDF MC12000 MC1658 MC4024 MC4044 MC12000 MC12002 MC12012 MC12013 MC12014 MC12020 MC4044 mecl mttl MTTL MC12013 648 ANALOG MC4024 MC12012 MC12020 phase logic loop

    MOTION DETECTOR opamp

    Abstract: No abstract text available
    Text: UC1634 UC2634 UC3634 UNITRODE Phase Locked Frequency Controller DESCRIPTION FEATURES Precision Phase Locked Frequency Control System Communication Logic for 2-Phase Motors Disable Input for Motor Inhibit Crystal Oscillator Programmable Reference Frequency Dividers


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    PDF UC1634 UC2634 UC3634 UC1633 1700ppm/ MOTION DETECTOR opamp