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    IXYS UK Westcode M0139SM120-(SM12PHN100)

    DIODE FAST RECOVERY Single 175A 1200V CHASSIS STUD
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    Ozdisan Elektronik M0139SM120-(SM12PHN100) 1
    • 1 $207.6713
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    PHN100 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: CDCM7005 www.ti.com SCAS793B – JUNE 2005 – REVISED OCTOBER 2005 3.3-V HIGH PERFORMANCE CLOCK SYNCHRONIZER AND JITTER CLEANER GND GND GND GND GND GND C VBB GND AVCC AVCC AVCC AVCC AVCC GND STATUS_ REF or PRI_SEC_ CLK STATUS_ D VCXO_IN GND GND GND GND GND


    Original     		PDF CDCM7005 SCAS793B

    CDCM7005HFG-V

    Abstract: smd y1a
    Text: CDCM7005-SP www.ti.com . SGLS390A – JULY 2009 – REVISED AUGUST 2009 3.3-V HIGH PERFORMANCE RAD-TOLERANT CLASS V, CLOCK SYNCHRONIZER AND


    Original     		PDF CDCM7005-SP SGLS390A CDCM7005HFG-V smd y1a

    CDCM61002RHBR

    Abstract: No abstract text available
    Text: CDCM61002 www.ti.com. SCAS870 – FEBRUARY 2009 Two Output, Integrated VCO, Low-Jitter Clock Generator


    Original     		PDF CDCM61002 SCAS870 CDCM61002RHBR

    Untitled

    Abstract: No abstract text available
    Text: CDCM61002 www.ti.com SCAS870C – FEBRUARY 2009 – REVISED FEBRUARY 2010 Two Output, Integrated VCO, Low-Jitter Clock Generator Check for Samples: CDCM61002 FEATURES 1 • 2 • • • • • • • • • • • One Crystal Reference Input Including 24.8832


    Original     		PDF CDCM61002 SCAS870C

    CDCLVD2104RHDR

    Abstract: No abstract text available
    Text: CDCLVD2104 www.ti.com SCAS903A – JUNE 2010 – REVISED AUGUST 2010 Dual 1:4 Low Additive Jitter LVDS Buffer Check for Samples: CDCLVD2104 FEATURES 1 • • • • • • • • • • • • Dual 1:4 Differential Buffer Low Additive Jitter <300 fs, RMS in


    Original     		PDF CDCLVD2104 SCAS903A EIA/TIA-644A 28-Pin CDCLVD2104 CDCLVD2104RHDR

    ACS9510

    Abstract: icp multiplexer 24 pin ACS8510 ACS8520 ACS8522 ACS8525 ACS8530 ACS8947T QFN48
    Text: ACS8947T JAM PLL Jitter Attenuating, Multiplying Phase-Locked Loop with Automatic Input Switch and Data Resynchronization Path COMMUNICATIONS ADVANCED COMMS & SENSING Introduction FINAL Features The ACS8947T JAM PLL is a general pupose, Integer N, jitter-attenuating, differential phase-locked loop for


    Original     		PDF ACS8947T OC-12 ACS8510, ACS85 ISO9001 00/September ACS9510 icp multiplexer 24 pin ACS8510 ACS8520 ACS8522 ACS8525 ACS8530 QFN48

    Untitled

    Abstract: No abstract text available
    Text: CDCLVD2108 www.ti.com SCAS905C – OCTOBER 2010 – REVISED DECEMBER 2010 Dual 1:8 Low Additive Jitter LVDS Buffer Check for Samples: CDCLVD2108 FEATURES 1 • • • • • • • • • • • • Dual 1:8 Differential Buffer Low Additive Jitter <300 fs RMS in


    Original     		PDF CDCLVD2108 SCAS905C EIA/TIA-644A 48-Pin

    Untitled

    Abstract: No abstract text available
    Text: CDC7005 3.3ĆV HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER SCAS685A − DECEMBER 2002 − REVISED FEBRUARY 2003 D High Performance 1:5 PLL Clock D D D D D D D D D D D D D D D Synchronizer Two Clock Inputs: VCXO_IN Clock Is Synchronized to REF_IN Clock


    Original     		PDF CDC7005 SCAS685A

    Untitled

    Abstract: No abstract text available
    Text: CDCM1804 1:3 LVPECL CLOCK BUFFER + ADDITIONAL LVCMOS OUTPUT AND PROGRAMMABLE DIVIDER SCAS697 – JULY 2003 D Distributes One Differential Clock Input to VSS VDD0 Y0 Y0 VDD0 S1 24 23 22 21 20 19 15 Y1 VDDPECL 5 14 VDD1 VBB 6 13 VDD3 12 4 Y3 Y1 IN VDD2 IN 11


    Original     		PDF CDCM1804 SCAS697

    Untitled

    Abstract: No abstract text available
    Text: CDCM7005-SP www.ti.com SGLS390E – JULY 2009 – REVISED AUGUST 2012 3.3-V HIGH PERFORMANCE RAD-TOLERANT CLASS V, CLOCK SYNCHRONIZER AND JITTER CLEANER Check for Samples: CDCM7005-SP FEATURES 1 • • • • • • • • VCC RESET or HOLD Y4A Y4B GND


    Original     		PDF CDCM7005-SP SGLS390E

    5962-0723001VXC

    Abstract: CDCM7005-SP TRF3750 CDCM7005HFG-V T0060 CDCM7005 TCO-2111 CDCM7005HFG
    Text: CDCM7005-SP www.ti.com . SGLS390A – JULY 2009 – REVISED AUGUST 2009 3.3-V HIGH PERFORMANCE RAD-TOLERANT CLASS V, CLOCK SYNCHRONIZER AND


    Original     		PDF CDCM7005-SP SGLS390A 5962-0723001VXC CDCM7005-SP TRF3750 CDCM7005HFG-V T0060 CDCM7005 TCO-2111 CDCM7005HFG

    Untitled

    Abstract: No abstract text available
    Text: CDCLVD2104 www.ti.com SCAS903A – JUNE 2010 – REVISED AUGUST 2010 Dual 1:4 Low Additive Jitter LVDS Buffer Check for Samples: CDCLVD2104 FEATURES 1 • • • • • • • • • • • • Dual 1:4 Differential Buffer Low Additive Jitter <300 fs, RMS in


    Original     		PDF CDCLVD2104 SCAS903A EIA/TIA-644A 28-Pin CDCLVD2104

    CDCLVD1204

    Abstract: No abstract text available
    Text: CDCLVD1204 www.ti.com SCAS898A – MAY 2010 – REVISED JUNE 2010 2:4 Low Additive Jitter LVDS Buffer Check for Samples: CDCLVD1204 FEATURES DESCRIPTION • • The CDCLVD1204 clock buffer distributes one of two selectable clock inputs, IN0, IN1 , to 4 pairs of


    Original     		PDF CDCLVD1204 SCAS898A 10-kHz 20-MHz EAI/TIA-644A 16-Pin CDCLVD1204

    Space Qualified VCXO

    Abstract: No abstract text available
    Text: CDCM7005 www.ti.com . SCAS793D – JUNE 2005 – REVISED AUGUST 2009 3.3-V HIGH PERFORMANCE CLOCK SYNCHRONIZER AND JITTER CLEANER


    Original     		PDF CDCM7005 SCAS793D Space Qualified VCXO

    QFN PACKAGE thermal resistance

    Abstract: T006001 CDCM7005 TCO-2111 16-Div
    Text: CDCM7005 www.ti.com SCAS793C – JUNE 2005 – REVISED DECEMBER 2007 3.3-V HIGH PERFORMANCE CLOCK SYNCHRONIZER AND JITTER CLEANER FEATURES 1 • GND GND GND GND GND C VBB GND AVCC AVCC AVCC AVCC AVCC GND STATUS_ REF or PRI_SEC_ CLK STATUS_ D VCXO_IN GND GND


    Original     		PDF CDCM7005 SCAS793C P0022-01 QFN PACKAGE thermal resistance T006001 CDCM7005 TCO-2111 16-Div

    Untitled

    Abstract: No abstract text available
    Text: CDCLVD2108 www.ti.com SCAS905C – OCTOBER 2010 – REVISED DECEMBER 2010 Dual 1:8 Low Additive Jitter LVDS Buffer Check for Samples: CDCLVD2108 FEATURES 1 • • • • • • • • • • • • Dual 1:8 Differential Buffer Low Additive Jitter <300 fs RMS in


    Original     		PDF CDCLVD2108 SCAS905C EIA/TIA-644A 48-Pin CDCLVD2108m/clocks

    Untitled

    Abstract: No abstract text available
    Text: CDCLVD1212 www.ti.com SCAS901B – SEPTEMBER 2010 – REVISED JANUARY 2011 2:12 Low Additive Jitter LVDS Buffer Check for Samples: CDCLVD1212 FEATURES 1 • • • • • • • • • • • • 2:12 Differential Buffer Low Additive Jitter: <300 fs RMS in


    Original     		PDF CDCLVD1212 SCAS901B EIA/TIA-644A 40-Pin

    crystal 26 Mhz package 5032

    Abstract: CDCM61001 CDCM61001RHBR CDCM61001RHBT QFN-32 TSX-5032
    Text: CDCM61001 www.ti.com. SCAS869B – FEBRUARY 2009 – REVISED JULY 2009 One Output, Integrated VCO, Low-Jitter Clock Generator


    Original     		PDF CDCM61001 SCAS869B crystal 26 Mhz package 5032 CDCM61001 CDCM61001RHBR CDCM61001RHBT QFN-32 TSX-5032

    Untitled

    Abstract: No abstract text available
    Text: CDCM7005 www.ti.com SCAS793E – JUNE 2005 – REVISED FEBRUARY 2013 3.3-V HIGH PERFORMANCE CLOCK SYNCHRONIZER AND JITTER CLEANER Check for Samples: CDCM7005 FEATURES 1 • GND GND GND GND GND C VBB GND AVCC AVCC AVCC AVCC AVCC GND STATUS_ REF or PRI_SEC_


    Original     		PDF CDCM7005 SCAS793E

    Untitled

    Abstract: No abstract text available
    Text: CDCM7005 www.ti.com SCAS793E – JUNE 2005 – REVISED FEBRUARY 2013 3.3-V HIGH PERFORMANCE CLOCK SYNCHRONIZER AND JITTER CLEANER Check for Samples: CDCM7005 FEATURES 1 • GND GND GND GND GND C VBB GND AVCC AVCC AVCC AVCC AVCC GND STATUS_ REF or PRI_SEC_


    Original     		PDF CDCM7005 SCAS793E

    MUX21

    Abstract: CDC7005 MUX22
    Text: CDC7005 3.3ĆV HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER SCAS685E − DECEMBER 2002 − REVISED NOVEMBER 2004 D High Performance 1:5 PLL Clock D D D D D D D D D D D D D D D Synchronizer Two Clock Inputs: VCXO_IN Clock Is Synchronized to REF_IN Clock


    Original     		PDF CDC7005 SCAS685E MUX21 CDC7005 MUX22

    Untitled

    Abstract: No abstract text available
    Text: CDC7005 3.3ĆV HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER SCAS685I − DECEMBER 2002 − REVISED APRIL 2006 D High Performance 1:5 PLL Clock D D D CTRL_ CLK CTRL_ DATA CP_OUT OPA_IN 7 8 OPA_IP OPA_OUT STATUS_ LOCK GND GND GND GND C I_REF GND AVCC


    Original     		PDF CDC7005 SCAS685I

    CDCM7005-SP

    Abstract: T0060 CDCM7005 22N10
    Text: CDCM7005 www.ti.com . SCAS793D – JUNE 2005 – REVISED AUGUST 2009 3.3-V HIGH PERFORMANCE CLOCK SYNCHRONIZER AND JITTER CLEANER


    Original     		PDF CDCM7005 SCAS793D CDCM7005-SP T0060 CDCM7005 22N10

    d2102

    Abstract: No abstract text available
    Text: CDCLVD2102 www.ti.com SCAS904A – MAY 2010 – REVISED JUNE 2010 Dual 1:2 Low Additive Jitter LVDS Buffer Check for Samples: CDCLVD2102 FEATURES 1 • • • • • • • • • • • • Dual 1:2 Differential Buffer Low Additive Jitter <300 fs RMS in 10-kHz to


    Original     		PDF CDCLVD2102 SCAS904A 10-kHz 20-MHz EIA/TIA-644A 16-Pin d2102