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    PHY REGISTERS MAP Search Results

    PHY REGISTERS MAP Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    SF-10GSFPPLCL-000 Amphenol Cables on Demand Amphenol SF-10GSFPPLCL-000 SFP+ Optical Module - 10GBASE-SR (up to 300m/984') SFP+ Multimode Optical Transceiver Module (Duplex LC Connectors) - Cisco & HP Compatible Datasheet
    SF-XP85B102DX-000 Amphenol Cables on Demand Amphenol SF-XP85B102DX-000 SFP28 25GBASE-SR Short-Range 850nm Multi-Mode Optical Transceiver Module (Duplex LC Connector) by Amphenol XGIGA [XP85B102DX] Datasheet
    SF-QXP85B402D-000 Amphenol Cables on Demand Amphenol SF-QXP85B402D-000 QSFP28 100GBASE-SR Short-Range 850nm Multi-Mode Optical Transceiver Module (MTP/MPO Connector) by Amphenol XGIGA [QXP85B402D] Datasheet
    MM54HC646J/883 Rochester Electronics LLC Registered Bus Transceiver, Visit Rochester Electronics LLC Buy
    54F646/Q3A Rochester Electronics LLC 54F646 - BUS TRANSCEIVER/REGISTER Visit Rochester Electronics LLC Buy

    PHY REGISTERS MAP Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: RS825x ATM Physical Interface PHY Devices The RS825x is a family of four 155 Mbps (OC-3/STM-1) ATM-SONET Physical Layer (PHY) devices with an integrated, low-jitter PLL clock and data recovery circuit. These devices have optimized SONET framer functions for mapping ATM cells to SONET


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    PDF RS825x RS825x 53-byte

    Cx2829

    Abstract: A1020 transistor Cx28297 A1020 0x19-RXG1 a1633 J119 J512 j512 data sheet "network interface cards"
    Text: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and


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    PDF CX28250 CX28250 53-byte TXZ02 28250-DSH-002-C Cx2829 A1020 transistor Cx28297 A1020 0x19-RXG1 a1633 J119 J512 j512 data sheet "network interface cards"

    B56A

    Abstract: Cx2829 J311 B21AD
    Text: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and


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    PDF CX28250 53-byte 28250-DSH-002-B CX28250 B56A Cx2829 J311 B21AD

    Cx2829

    Abstract: TXC24 0x46-RXLIN "network interface cards" Trec Part Numbering System GR
    Text: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and


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    PDF CX28250 53-byte CX28250 500035D Cx2829 TXC24 0x46-RXLIN "network interface cards" Trec Part Numbering System GR

    CX2829

    Abstract: J119 J512 A1020 transistor a1633 d705 led CX28250-23 CX28250-26 GR-253-CORE 24V to 15V REGULATOR IC
    Text: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and


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    PDF CX28250 CX28250 53-byte TXZ02 28250-DSH-002-A CX2829 J119 J512 A1020 transistor a1633 d705 led CX28250-23 CX28250-26 GR-253-CORE 24V to 15V REGULATOR IC

    Cx2829

    Abstract: ,national semiconductor Linear brief lb-3
    Text: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and


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    PDF CX28250 53-byte 28250-DSH-002-A CX28250 Cx2829 ,national semiconductor Linear brief lb-3

    8086 hex code

    Abstract: PILA8465B 82557 82557 specification update intel 8102 intel application note AP-382 CACHE MEMORY FOR 8086 Intel 82503 82558b
    Text: APPLICATION NOTE AP-382 82557 C-Step and 82558-Based Products EEPROM Address Map and Programming Information Version 1.0 Technical Marketing Network Products Division Intel Corporation May 1997 Copyright 1997 Intel Corporation. All rights reserved. Intel assumes no responsibility for errors or omissions in


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    PDF AP-382 82558-Based 8086 hex code PILA8465B 82557 82557 specification update intel 8102 intel application note AP-382 CACHE MEMORY FOR 8086 Intel 82503 82558b

    IDT88P8344

    Abstract: 88P8344
    Text: SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors


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    PDF BH820-1) 88P8344 IDT88P8344 88P8344

    88E1111 PHY registers map

    Abstract: Marvell PHY 88E1111 Datasheet Marvell PHY 88E1111 application note Marvell PHY 88E1111 MDIO read write 88E1111 register map Marvell PHY 88E1111 Xilinx Marvell PHY register map 88E1111 register 88E1111 Marvell 88e1111 register map
    Text: Application Note: Ethernet PHY Register Access With GPIO R XAPP1042 v1.0.1 May 2, 2008 Reference System: Ethernet PHY Register Access With GPIO Author: Brian Hill Abstract The XPS Ethernetlite peripheral does not provide any mechanism to access the Ethernet PHY


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    PDF XAPP1042 notes/xapp1042 ppc405. 88E1111 PHY registers map Marvell PHY 88E1111 Datasheet Marvell PHY 88E1111 application note Marvell PHY 88E1111 MDIO read write 88E1111 register map Marvell PHY 88E1111 Xilinx Marvell PHY register map 88E1111 register 88E1111 Marvell 88e1111 register map

    TSOP 48 thermal resistance type1

    Abstract: IDT88P8342 drw22
    Text: SPI EXCHANGE 2 x SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors


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    PDF BH820-1) 88P8342 TSOP 48 thermal resistance type1 IDT88P8342 drw22

    LAN83C694

    Abstract: PHY registers map MDIO introduction to auto-negotiation MDO00
    Text: AN 7.9 MII Management Software Implementation for MII Compliant PHYs 1 Introduction This Application Note provides the software developer with the necessary understanding to write software that configures MII compliant PHYs attached to SMSC's FEAST LAN91C100XX or EPIC


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    PDF LAN91C100XX) LAN83C1XX) EVB103: LAN91C100FD, LAN83C170, LAN83C175, QS6612, NS83840, ICS1890, LAN83C110) LAN83C694 PHY registers map MDIO introduction to auto-negotiation MDO00

    ap 8022 b

    Abstract: intel 8008 cpu Ap-257 77V011 77V012 77V400 77V500 77V550 AN-257 V400
    Text: Using The 77V011 and SwitchStarTM in a Small Access Switch 77V011 Application Note AN-257 Obective This application note covers the software and hardware configuration for an Access Switch using the 77V011 DPI to U2 translation device and the IDT Switchstar switch fabric. Example register values for programming


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    PDF 77V011 77V011 AN-257 77V400 25Mbps 155Mbps 25Mbps ap 8022 b intel 8008 cpu Ap-257 77V012 77V400 77V500 77V550 AN-257 V400

    pt-041

    Abstract: DC028
    Text: DS33Z11 Ethernet Mapper www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS33Z11 extends a 10/100 Ethernet LAN segment by encapsulating MAC frames in HDLC or X.86 LAPS for transmission over a PDH/TDM data stream. The serial link supports bidirectionalsynchronous interconnect up to 52Mbps over xDSL,


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    PDF DS33Z11 52Mbps 35/Optical, 512kbps. pt-041 DC028

    BSP19

    Abstract: pt07 SHDSL DS21Q48 DS21Q55 DS3154 DS33Z11 DS33ZH11 RFC1662 BC605
    Text: DS33Z11 Ethernet Mapper www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS33Z11 extends a 10/100 Ethernet LAN segment by encapsulating MAC frames in HDLC or X.86 LAPS for transmission over a PDH/TDM data stream. The serial link supports bidirectionalsynchronous interconnect up to 52Mbps over xDSL,


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    PDF DS33Z11 100-Ball, DS33ZH11 100MHz 512kbps DS33Z11 BSP19 pt07 SHDSL DS21Q48 DS21Q55 DS3154 DS33ZH11 RFC1662 BC605

    7e 33

    Abstract: No abstract text available
    Text: DS33Z11 Ethernet Mapper www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS33Z11 extends a 10/100 Ethernet LAN segment by encapsulating MAC frames in HDLC or X.86 LAPS for transmission over a PDH/TDM data stream. The serial link supports bidirectionalsynchronous interconnect up to 52Mbps over xDSL,


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    PDF DS33Z11 52Mbps 35/Optical, 512kbps. DS33Z11 56-G6035-001A X169-1* 7e 33

    Untitled

    Abstract: No abstract text available
    Text: DS33Z11 Ethernet Mapper www.maxim-ic.com FEATURES GENERAL DESCRIPTION The DS33Z11 extends a 10/100 Ethernet LAN segment by encapsulating MAC frames in HDLC or X.86 LAPS for transmission over a PDH/TDM data stream. The serial link supports bidirectionalsynchronous interconnect up to 52Mbps over xDSL,


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    PDF DS33Z11 DS33Z11 52Mbps 35/Optical, 512kbps.

    GN4124

    Abstract: GN412x PCIe phy C4 to BGA E15 52624 GN4121 GN4124-CBE3
    Text: GN4124 x4 Lane PCI Express to Local Bridge Data Sheet GN4124 x4 Lane PCI Express to Local Bridge Data Sheet 48407 - 1 May 2009 www.gennum.com 1 of 31 Proprietary & Confidential Revision History Version ECR Date Changes and Modifications 2 151915 May 2009 Created new document describing functionality and the register map for GN4124 &


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    PDF GN4124 GN4124 GN4121 GN412x PCIe phy C4 to BGA E15 52624 GN4124-CBE3

    JTAG MODULE SPI

    Abstract: spi flash parallel port TSOP 28 SPI memory Package flash 88P8341
    Text: SPI EXCHANGE SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors


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    PDF BH820-1) 88P8341 drw38 JTAG MODULE SPI spi flash parallel port TSOP 28 SPI memory Package flash 88P8341

    ds21348

    Abstract: DS33Z rspc DS33Z11 DS33ZH11 RFC1662 169ball
    Text: DS33Z11 Ethernet Mapper www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS33Z11 extends a 10/100 Ethernet LAN segment by encapsulating MAC frames in HDLC or X.86 LAPS for transmission over a PDH/TDM data stream. The serial link supports bidirectionalsynchronous interconnect up to 52Mbps over xDSL,


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    PDF DS33Z11 DS33Z11 52Mbps 35/Optical, 512kbps. ds21348 DS33Z rspc DS33ZH11 RFC1662 169ball

    MICRO CONTROLLER ATMEL free

    Abstract: No abstract text available
    Text: DS33Z11 Ethernet Mapper www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS33Z11 extends a 10/100 Ethernet LAN segment by encapsulating MAC frames in HDLC or X.86 LAPS for transmission over a PDH/TDM data stream. The serial link supports bidirectionalsynchronous interconnect up to 52Mbps over xDSL,


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    PDF DS33Z11 52Mbps 35/Optical, 512kbps. DS33Z11 56-G6035-001A X169-1* MICRO CONTROLLER ATMEL free

    RFC1662-PPP

    Abstract: PADR22 DS33Z11 DS33ZH11 RFC1662 TBC22 BEC20 RPC13 RFC2615-PPP PT041
    Text: DS33Z11 Ethernet Mapper www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS33Z11 extends a 10/100 Ethernet LAN segment by encapsulating MAC frames in HDLC or X.86 LAPS for transmission over a PDH/TDM data stream. The serial link supports bidirectionalsynchronous interconnect up to 52Mbps over xDSL,


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    PDF DS33Z11 DS33Z11 52Mbps 35/Optical, 512kbps. RFC1662-PPP PADR22 DS33ZH11 RFC1662 TBC22 BEC20 RPC13 RFC2615-PPP PT041

    chn 24c02 6

    Abstract: TNETE100A TNETE110A SPWU013 chn 24c02 24C02 TNETE211 XL24C02
    Text: ThunderLAN TNETE100A, TNETE110A, TNETE211 Programmer’s Guide October 1996 Network Business Products Printed in U.S.A., October 1996 L411001–9761 revision A SPWU013A t ThunderLAN Programmer’s Guide TNETE100A, TNETE110A, TNETE211 Literature Number: SPWU013A


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    PDF TNETE100A, TNETE110A, TNETE211 L411001 SPWU013A L411001-9761 chn 24c02 6 TNETE100A TNETE110A SPWU013 chn 24c02 24C02 TNETE211 XL24C02

    DS21455

    Abstract: DS21458 DS26528 DS33Z11 DS33Z41 RFC1662 G.SHDSL Industry Single-Chip 0301H 4BC20
    Text: DS33Z41 Quad IMUX Ethernet Mapper www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS33Z41 extends a 10/100 Ethernet LAN segment by encapsulating MAC frames in HDLC or X.86 LAPS for transmission over up to four interleaved PDH/TDM data streams using robust,


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    PDF DS33Z41 DS33Z41 512Kbps. DS21455 DS21458 DS26528 DS33Z11 RFC1662 G.SHDSL Industry Single-Chip 0301H 4BC20

    lxt971a

    Abstract: 302875 "network interface cards"
    Text: Cortina Systems LXT972M Single-Port 10/100 Mbps PHY Transceiver Datasheet The Cortina Systems® LXT972M Single-Port 10/100 Mbps PHY Transceiver LXT972M PHY directly supports both 100BASE-TX and 10BASE-T applications. The LXT972M PHY is IEEE compliant and


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    PDF LXT972M 100BASE-TX 10BASE-T 10BASE-T/100BASE-TX lxt971a 302875 "network interface cards"