pfv2
Abstract: LMX2332 Modulo-7 Binary Counter LMX2330 pin-compatible MB15E03 PFV1 MB15U36 LOG RX 2 - 1031 16 pin IC LMX2336 8200PF synthesizer pll mb15e03l
Text: ASSP CMOS Super PLL Application Guide Super PLL Application Guide 2 Fujitsu Microelectronics America, Inc. Super PLL Application Guide Table of Contents Introduction . 5
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C20056S-c-2-1
LCC-20P-M05)
TC-AN20731-4/2002
pfv2
LMX2332
Modulo-7 Binary Counter
LMX2330 pin-compatible
MB15E03 PFV1
MB15U36
LOG RX 2 - 1031 16 pin IC
LMX2336
8200PF
synthesizer pll mb15e03l
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TDA8752B
Abstract: No abstract text available
Text: APPLICATION NOTE - TDA8752B PLL CALCULATOR METHOD & SOFTWARE AN/99057 Philips Semiconductors - TDA8752B PLL CALCULATOR - Application Note AN/99057 METHOD & SOFTWARE APPLICATION NOTE - TDA8752B PLL CALCULATOR METHOD & SOFTWARE AN/99057 Authors: Stéphane JOUIN
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TDA8752B
AN/99057
TDA8752B
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PLL VCO 3.5MHz
Abstract: TDA8752 TDA8752A
Text: APPLICATION NOTE - TDA8752A PLL CALCULATOR METHOD & SOFTWARE AN/99074 Philips Semiconductors - TDA8752A PLL CALCULATOR - Application Note AN/99074 METHOD & SOFTWARE APPLICATION NOTE - TDA8752A PLL CALCULATOR METHOD & SOFTWARE AN/99074 Authors: Stéphane JOUIN
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TDA8752A
AN/99074
TDA8752A
PLL VCO 3.5MHz
TDA8752
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philips CZ CAPACITOR
Abstract: TDA8752B Philips Capacitor datasheet
Text: APPLICATION NOTE - TDA8752B PLL CALCULATOR METHOD & SOFTWARE AN/00008 Philips Semiconductors - TDA8752B/C5 PLL CALCULATOR - Application Note AN/00008 METHOD & SOFTWARE APPLICATION NOTE - TDA8752B PLL CALCULATOR METHOD & SOFTWARE AN/00008 Authors: Stéphane JOUIN
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TDA8752B
AN/00008
TDA8752B/C5
TDA8752B/C5
AN/99057
philips CZ CAPACITOR
Philips Capacitor datasheet
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Untitled
Abstract: No abstract text available
Text: Implementing Fractional PLL Reconfiguration with Altera PLL and Altera PLL Reconfig Megafunctions AN-661-3.0 Application Note This application note describes the flow for implementing fractional phase-locked loop PLL reconfiguration and dynamic phase shifting for fractional PLLs in 28-nm
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AN-661-3
28-nm
28-nm
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pll pcb design
Abstract: Agilent IC PLL350-2140 8563E spectrum analyzer 8563E
Text: REV. C Application Note 101 PLL Evaluation Board This application note details the basic connection, operation and software settings for the Sirenza Phase Locked Loop PLL Evaluation Boards. The PLL EVB is designed to provide an easy method of evaluating the Sirenza PLL products. The Sirenza PLL module consists of
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AN507-2
Abstract: No abstract text available
Text: Implementing PLL Reconfiguration in Cyclone III Devices AN507-2.0 Application Note This application note describes the flow for implementing phase-locked loop PLL reconfiguration in Cyclone III devices and how to use the PLL reconfiguration feature. Use this application note in conjunction with the following literature:
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AN507-2
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MQE541-1178
Abstract: mqe541 K2886 TSM-LR-PC Hitachi DSAUTAZ006 Nippon capacitors
Text: APPLICATION NOTE Dual PLL Frequency Synthesizer System Board for Mobile Communications PLL-SB5 1st. Edition ADE-507-070 Z Preface Hitachi has developed the ICs listed below as dual PLL frequency synthesizers for mobile communications systems. This application note describes the PLL-SB5 evaluation board, which
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HD155021T
I-00137
E-28036
S-164
F-78148
MQE541-1178
mqe541
K2886
TSM-LR-PC
Hitachi DSAUTAZ006
Nippon capacitors
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PNX8525
Abstract: viper11 TM-220 PNx85 PNX8526
Text: AN10311 Recommended PLL settings for PNX8525 Viper1.0 and PNX8526 (Viper1.1) Rev. 01 – 5 November 2004 Application note Document information Info Content Keywords PNX8526, PNX8525, PLL Abstract This Application Note describes recommended PLL settings for PNX8525 (Viper1.0)
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AN10311
PNX8525
PNX8526
PNX8526,
PNX8525,
PNX8525
viper11
TM-220
PNx85
PNX8526
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Untitled
Abstract: No abstract text available
Text: Application Note APL Series APL0000 Type Type Dimension Standard PLL IC + VCO 19 x 19 x 5.8 Pin Out for PLL Pin No. Application Pin No. Application 1 CLOCK 9 VCC (VCO) 2 DATA 13 RF OUT 3 ENABLE 15 VCC (PLL) 4 OSC IN 16 LOCK DETECT All other Pins are Grounded
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APL0000
APL0000
APL0000-R
21-bit
ADF4118
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Untitled
Abstract: No abstract text available
Text: Application Note APLS Series APLS0000 Type Type Dimension Standard PLL IC + VCO 12.7 x 12.7 x 3 Pin Out for PLL Pin No. Application Pin No. Application 1 CLOCK 7 VCC (VCO) 2 DATA 9 RF OUT 3 ENABLE 11 VCC (PLL) 4 OSC IN 12 LOCK DETECT All other Pins are Grounded
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APLS0000
APLS0000
APLS0000-R
21-bit
ADF4113
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Untitled
Abstract: No abstract text available
Text: Application Note APLT Series APLT0000 Type Type Dimension Standard PLL IC + VCO 15.3 x 15.3 x 3.2 Pin Out for PLL Pin No. Application Pin No. Application 1 CLOCK 7 VCC (VCO) 2 DATA 10 RF OUT 3 ENABLE 11 VCC (PLL) 4 OSC IN 12 LOCK DETECT All other Pins are Grounded
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APLT0000
APLT0000
APLT0000-R
21-bit
ADF4118
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ST9058
Abstract: dm4351 LCD ASCII CODE c source code P5C1 pll_pg R251 LCD thomson
Text: APPLICATION NOTE ST9058 MICROCONTROLLER PLL CLOCK APPLICATION NOTE AND DEMOBOARD By Olivier Garreau INTRODUCTION The objective of this Application Note is to present the technical features of the ST9058 clock generator based on a Phase Locked Loop PLL circuit.
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ST9058
ST9058
dm4351
LCD ASCII CODE c source code
P5C1
pll_pg
R251
LCD thomson
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PLL 40 kHZ
Abstract: ADF4113 VCP1011A
Text: VCO/ PLL Module Data Sheet: VCP1011A Application : Rx PLL syn. basestation 1.0 DESCRIPTION AND APPLICATION VCO/ PLL module with Analog Devices ADF4113 PLL IC. 2.0 ELECTRICAL SPECIFICATIONS All parameters are specified at 25 degrees C and 5.0 VDC with output load impedance of 50 ohms.
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VCP1011A
ADF4113
7000G,
to150
25min
PLL 40 kHZ
VCP1011A
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alps vco
Abstract: PMB2409 URAE8XD68A smd 2d 1002 -reel HP laptop schematic power supply circuit diagram parallel port programming 0805 b82498 URAE8 hp psc 1210 laptop circuit diagram
Text: ICs for Communications PMB 2347 RF AN-1002 PLL Application Board Version 1.0 Application Note 11.97 T-? PLL Application Board Revision History: Current Version: 11.97 Previous Version: Page Page in previous (in new Version Version) Subjects (major changes since last revision)
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AN-1002
alps vco
PMB2409
URAE8XD68A
smd 2d 1002 -reel
HP laptop schematic power supply circuit diagram
parallel port programming
0805 b82498
URAE8
hp psc 1210
laptop circuit diagram
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AN454-3
Abstract: Quartus II Simulator
Text: Implementing PLL Reconfiguration in Stratix III and Stratix IV Devices AN454-3.0 Application Note This application note describes the flow for implementing phase-locked loop PLL reconfiguration in Stratix III and Stratix IV devices. Use this application note in
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AN454-3
Quartus II Simulator
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TDA5059
Abstract: 4093 oscillator TSA5059ATS TDA8060TS TP97036 TSA5059 TSA5059A TSA5059AT TSA5059T TSA5059TS
Text: APPLICATION NOTE The TSA5059A - A low phase noise PLL frequency synthesizer AN00080 Philips Semiconductors TP97036.2/W97 Philips Semiconductors The TSA5059A - A low phase noise PLL frequency synthesizer Application Note AN00080 Abstract The Low Noise PLL family TSA5059 TSA5059T, TSA5059TS, TSA5059AT & TSA5059ATS presents the last generation of
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TSA5059A
AN00080
TP97036
2/W97
TSA5059
TSA5059T,
TSA5059TS,
TSA5059AT
TDA5059
4093 oscillator
TSA5059ATS
TDA8060TS
TSA5059
TSA5059AT
TSA5059T
TSA5059TS
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AN237 equivalent
Abstract: SMY02 5V996 AN-237 IDT5T2010 5T9110 5T9820 5T9821 5T9890 5T9891
Text: APPLICATION NOTE AN-237 PLL LOCK INDICATOR APPLICATION NOTE AN-237 PLL LOCK INDICATOR INTRODUCTION A PLL lock detector is implemented on the following device families: TurboClockII, TurboClockII Plus, TeraClock and Programmable Clock. The output of the lock detector is available on the LOCK pin. The lock circuitry
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AN-237
200us.
66MHz
AN237 equivalent
SMY02
5V996
AN-237
IDT5T2010
5T9110
5T9820
5T9821
5T9890
5T9891
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Calculate Oscillator Jitter By Using Phase-Noise
Abstract: HP Agilent 10MHz Reference DSO81304 fm linear 88-108mhz abstract on fm am modulation and demodulation DSO81304A E5052 MAX3272 MAX3624 abstract on fm modulation and demodulation
Text: Application Note: HFAN-04.5.5 Rev 0; 04/09 Characterizing Power-Supply Noise Rejection in PLL Clock Synthesizers Maxim Communications & Timing BU Maxim Integrated Products Characterizing Power-Supply Noise Rejection in PLL Clock Synthesizers Abstract This application note discusses the effects of powersupply noise interference on PLL-based clock
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HFAN-04
Calculate Oscillator Jitter By Using Phase-Noise
HP Agilent 10MHz Reference
DSO81304
fm linear 88-108mhz
abstract on fm am modulation and demodulation
DSO81304A
E5052
MAX3272
MAX3624
abstract on fm modulation and demodulation
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M1000
Abstract: ICS252 M2000A M2000 M2004-01 M2006-01 M906-02 Integrated Circuit PLL
Text: APPLICATION NOTE Application Note M000-AN-002.PLLSIMREADME M000-AN-002.PLLSIMREADME SAW PLL Simulator Instructions Integrated Instructions SAW PLL Simulator Circuit Systems, Inc. Product Lines M900, M1000, M2000 M900, M1000, M2000 Product Lines INSTALLATION
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M000-AN-002
M1000,
M2000
com/FeedBack/cmbu/m2000
2000/95/98/ME/NT/XP
199707558G
M1000
ICS252
M2000A
M2004-01
M2006-01
M906-02
Integrated Circuit PLL
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Untitled
Abstract: No abstract text available
Text: PLL Considerations in QDRII/II+/DDRII/II+SRAMs AN46982 Author: Jayasree Nayar Associated Project: No Associated Part Family: CY7C1*KV18,CY7C2*KV18 Software Version: NA Associated Application Notes: None Application Note Abstract AN46982 provides an overview of the Phase Locked Loop PLL and describes its operation in PLL disabled mode in
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AN46982
AN46982
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Untitled
Abstract: No abstract text available
Text: APPLICATION NOTE M32C/85 Group Procedure to Use the PLL Clock as the CPU Clock Source 1. Abstract This application note describes a procedure to use the PLL clock as the CPU clock source. 2. Introduction This application note is applied to the following condition:
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M32C/85
REJ05B0721-0100/Rev
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ADF4113
Abstract: VCP1015A
Text: VCO/ PLL Module Data Sheet: VCP1015A Application : UMTS basestation 1.0 DESCRIPTION AND APPLICATION VCO/ PLL module with Analog Devices ADF4113 PLL IC. 2.0 ELECTRICAL SPECIFICATIONS All parameters are specified at 25 degrees C and 5.0 VDC with output load impedance of 50 ohms.
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VCP1015A
ADF4113
7000G,
to150
25min
VCP1015A
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pll 50 Hz
Abstract: analog vco ADF4113 VCP1032A
Text: VCO/ PLL Module Data Sheet: VCP1032A Application : Rx synthesizer 1.0 DESCRIPTION AND APPLICATION VCO/ PLL module with Analog Devices ADF4113 PLL IC. 2.0 ELECTRICAL SPECIFICATIONS All parameters are specified at 25 degrees C and 5.0 VDC with output load impedance of 50 ohms.
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VCP1032A
ADF4113
7000G,
to150
25min
pll 50 Hz
analog vco
VCP1032A
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