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    PRESET 2.2 MEGA OHM Search Results

    PRESET 2.2 MEGA OHM Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    54LS113FM/B Rochester Electronics LLC 54LS113 - Dual JK Neg-Edge-Triggered FF w/preset Visit Rochester Electronics LLC Buy
    54LS113A/BCA Rochester Electronics LLC 54LS113A - FLIP-FLOP, JK, DUAL, WITH PRESET AND CLEAR - Dual marked (M38510/30104BCA) Visit Rochester Electronics LLC Buy
    R8A77810BHBGV Renesas Electronics Corporation 8-bit Microcontrollers for Preset Remote Controllers (Non Promotion) Visit Renesas Electronics Corporation
    R8A77810BHBG Renesas Electronics Corporation 8-bit Microcontrollers for Preset Remote Controllers (Non Promotion) Visit Renesas Electronics Corporation
    HD74HC74RP Renesas Electronics Corporation Dual D-Type Flip-Flops (with Preset and Clear), , / Visit Renesas Electronics Corporation

    PRESET 2.2 MEGA OHM Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    IR2123

    Abstract: P55 MOSFET which is used in inverter h-bridge igbt pwm schematics circuit SENSOR SB19 opto isolator photodiode 3pin terminal block 3 terminal mosfet p51 IR2123S analog Optoisolator 2sb122
    Text: User’s Manual Low-Voltage Power Module For Motor Control Document No. U18052EU1V1UME0 Date Published August 2006 NEC Electronics Corporation 2006 Printed in Germany CAUTION This is a Test- and Measurement equipment with possibility to be significantly altered by user through hardware enhancements/modifications


    Original     		PDF U18052EU1V1UME0 89/336/EEC EEDT-ST-0005-10 IR2123 P55 MOSFET which is used in inverter h-bridge igbt pwm schematics circuit SENSOR SB19 opto isolator photodiode 3pin terminal block 3 terminal mosfet p51 IR2123S analog Optoisolator 2sb122

    preset 2 mega ohm

    Abstract: No abstract text available
    Text: STK22C48 16-Kbit 2 K x 8 AutoStore nvSRAM 16-Kbit (2 K × 8) AutoStore nvSRAM Functional Description • 25 ns and 45 ns access times ■ Hands off automatic STORE on power-down with external 68 µF capacitor ■ STORE to QuantumTrap™ nonvolatile elements is initiated by


    Original     		PDF STK22C48 16-Kbit STK22C48 preset 2 mega ohm

    Untitled

    Abstract: No abstract text available
    Text: STK22C48 16-Kbit 2 K x 8 AutoStore nvSRAM 16-Kbit (2 K × 8) AutoStore nvSRAM Features Functional Description 25 ns and 45 ns access times • Hands off automatic STORE on power-down with external 68 µF capacitor ■ STORE to QuantumTrap™ nonvolatile elements is initiated by


    Original     		PDF STK22C48 16-Kbit STK22C48

    Untitled

    Abstract: No abstract text available
    Text: CY7C1380D, CY7C1380F CY7C1382D, CY7C1382F 18-Mbit 512 K x 36/1 M × 18 Pipelined SRAM 18-Mbit (512 K × 36/1 M × 18) Pipelined SRAM Features Functional Description The CY7C1380D/CY7C1380F/CY7C1382D/CY7C1382F[1] SRAM integrates 524,288 × 36 and 1,048,576 × 18 SRAM cells


    Original     		PDF CY7C1380D, CY7C1380F CY7C1382D, CY7C1382F 18-Mbit CY7C1380D/CY7C1380F/CY7C1382D/CY7C1382F

    Untitled

    Abstract: No abstract text available
    Text: CY7C1380D, CY7C1380F CY7C1382D, CY7C1382F 18-Mbit 512 K x 36/1 M × 18 Pipelined SRAM 18-Mbit (512 K × 36/1 M × 18) Pipelined SRAM Features Functional Description • Supports bus operation up to 250 MHz ■ Available speed grades are 250, 200, and 167 MHz


    Original     		PDF CY7C1380D, CY7C1380F CY7C1382D, CY7C1382F 18-Mbit CY7C1380D/CY7C1380F/CY7C1382D/CY7C1382F

    AN1064

    Abstract: CY7C1386D CY7C1386F CY7C1387D CY7C1387F
    Text: CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F 18-Mbit 512 K x 36/1 M × 18 Pipelined DCD Sync SRAM 18-Mbit (512 K × 36/1 M × 18) Pipelined DCD Sync SRAM Features Functional Description • Supports bus operation up to 250 MHz The CY7C1386D/CY7C1387D/CY7C1386F/CY7C1387F


    Original     		PDF CY7C1386D, CY7C1386F CY7C1387D, CY7C1387F 18-Mbit CY7C1386D/CY7C1387D/CY7C1386F/CY7C1387F AN1064 CY7C1386D CY7C1386F CY7C1387D CY7C1387F

    Untitled

    Abstract: No abstract text available
    Text: CY7C1370D, CY7C1372D 18-Mbit 512 K x 36/1 M × 18 Pipelined SRAM with NoBL Architecture 18-Mbit (512 K × 36/1 M × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™


    Original     		PDF CY7C1370D, CY7C1372D 18-Mbit CY7C1370D CY7C1372D

    SCHEMATIC 12v 1000w smps

    Abstract: power amplifier 3000W with PCB
    Text: Glossary of Power Supply Terms Rev 3.0 – May 2014 Glossary of Power Supply Terms Index A. 1


    Original     		PDF

    AC-L10A

    Abstract: panasonic electronic viewfinder sony infolithium battery sony lanc siemens ic akai transistor 305 radio grundig NP-F960 ic Sony Commander remote control Car Central lock system mitsubishi
    Text: 3-060-791-11 1 Digital Video Camera Recorder Operating Instructions Before operating the unit, please read this manual thoroughly, and retain it for future reference. Owner’s Record The model and serial numbers are located on the bottom. Record the serial number in the space provided below. Refer to these numbers


    Original     		PDF DCR-VX2000 AC-L10A panasonic electronic viewfinder sony infolithium battery sony lanc siemens ic akai transistor 305 radio grundig NP-F960 ic Sony Commander remote control Car Central lock system mitsubishi

    em78p803

    Abstract: EM78P803B EM78801 ICE803 LCDA4
    Text: EM78P803B 8-bit MCU 2006/2/27 Version 1.3.5 ELAN MICROELECTRONICS CORP. No. 12, Innovation 1st RD., Science-Based Industrial Park Hsin Chu City, Taiwan TEL: 03 5639977 FAX: (03) 5780617 EM78P803B 8-bit Micro-controller Version History Version 1.0 1.1 1.2


    Original     		PDF EM78P803B EM78805C 16-bit 1k/25oC CRS/P63 RF/P62 CF/P61 em78p803 EM78P803B EM78801 ICE803 LCDA4

    Untitled

    Abstract: No abstract text available
    Text: Manual Microwave Signal Generator R&S SMR20 R&S SMR30 1104.0002.20 1104.0002.30 R&S SMR27 R&S SMR40 1104.0002.27 1104.0002.40 Printed in Germany Test and Measurement Division 1104.3353.32-01- 1 Dear Customer, throughout this operating manual, the abbreviation R&S SMR is used for your Microwave Signal


    Original     		PDF SMR20 SMR30 SMR27 SMR40

    amikey-2

    Abstract: amikey American Megatrends amikey kbc 1098 digram of digital TV speed control temperature dc fan block digram w83627f-aw fdd 8796 W83627HF-AW amikey 85 90
    Text: W83627HF/ F/ HG/ G W83627HF/F W83627HG/G Winbond LPC I/O Date： 2005/05/31 -1- Revision： A1 Publication Release Date: May 31, 2005 Revision A1 W83627HF/ F/ HG/ G Table of Content1. GENERAL DESCRIPTION . 4


    Original     		PDF W83627HF/ W83627HF/F W83627HG/G W83627F. W83627HF W83ai, amikey-2 amikey American Megatrends amikey kbc 1098 digram of digital TV speed control temperature dc fan block digram w83627f-aw fdd 8796 W83627HF-AW amikey 85 90

    kbc 1098

    Abstract: W83627HG-aw amikey-2 amikey CR02 am transistor PIN69S W83627hf-a WINBOND w83627hg-aw 2.4/W83627HF
    Text: W83627HF/F W83627HG/G Winbond LPC I/O Date： 2006/06/09 Revision： 2.27 W83627HF/ F/ HG/ G W83627HF/F, W83627HG/G Data Sheet Revision History VERSION DATE PAGE 0.50 09/25/98 n.a. 0.51 11/10/98 88-93,102,105, 139,151,153 First published. Explanation of H/W Monitor function andregister


    Original     		PDF W83627HF/F W83627HG/G W83627HF/ W83627HF/F, W83627HG kbc 1098 W83627HG-aw amikey-2 amikey CR02 am transistor PIN69S W83627hf-a WINBOND w83627hg-aw 2.4/W83627HF

    Multimeter Fluke 189

    Abstract: No abstract text available
    Text: Operating and Service Guide Keysight Truevolt Series Digital Multimeters Notice: This document contains references to Agilent Technologies. Agilent's former Test and Measurement business has become Keysight Technologies. For more information, go to www.keysight.com.


    Original     		PDF 4138A Multimeter Fluke 189

    amikey-2

    Abstract: amikey winbond w83627hf-aw Different types of PWM technics WINBOND w83627hg-aw w83627hf-am W83627HG-AW W83627F-AW 8893 single chip tv processor W83627G-AW
    Text: W83627HF/F W83627HG/G Winbond LPC I/O Date： 2006/06/09 Revision： 2.27 W83627HF/ F/ HG/ G W83627HF/F, W83627HG/G Data Sheet Revision History VERSION DATE PAGE 0.50 09/25/98 n.a. 0.51 11/10/98 88-93,102,105, 139,151,153 First published. Explanation of H/W Monitor function andregister


    Original     		PDF W83627HF/F W83627HG/G W83627HF/ W83627HF/F, W83627HG/G amikey-2 amikey winbond w83627hf-aw Different types of PWM technics WINBOND w83627hg-aw w83627hf-am W83627HG-AW W83627F-AW 8893 single chip tv processor W83627G-AW

    0119 Solar Lamp Controller

    Abstract: transistor SMD W06 78 NXP Semiconductors 70150 TYN225 WH1602A Matsua microswitch 250V AC IRF9520 Samsung iskra BT 200 MOTOR FM 270R 74HC00M
    Text: 24 Electronic Components pp751-856:Layout 1 24/1/14 16:12 Page 751 Electronic Components CAPACITORS OPTOELECTRONICS Ceramic Capacitors Tantalum Capacitors Variable Capacitors 752 759 759 DISCRETE SEMICONDUCTORS Bridge Rectifier Diodes Diodes Transistors 766


    Original     		PDF pp751-856 127mm 525mm 1550kHz 280kHz 2000m) 100mm 0119 Solar Lamp Controller transistor SMD W06 78 NXP Semiconductors 70150 TYN225 WH1602A Matsua microswitch 250V AC IRF9520 Samsung iskra BT 200 MOTOR FM 270R 74HC00M

    Untitled

    Abstract: No abstract text available
    Text: THIS SPEC IS OBSOLETE Spec No: 001-12557 Spec Title: CY7C1413JV18/CY7C1415JV18, 36-MBIT QDR R II SRAM 4-WORD BURST ARCHITECTURE Sunset Owner: Jayasree Nayar (NJY) Replaced by: NONE CY7C1413JV18 CY7C1415JV18 36-Mbit QDR II SRAM 4-Word Burst Architecture


    Original     		PDF CY7C1413JV18/CY7C1415JV18, 36-MBIT CY7C1413JV18 CY7C1415JV18 300-MHz

    Untitled

    Abstract: No abstract text available
    Text: CY7C1518AV18 CY7C1520AV18 72-Mbit DDR-II SRAM Two-Word Burst Architecture 72-Mbit DDR-II SRAM Two-Word Burst Architecture Features Configurations • 72-Mbit density 4 M x 18, 2 M × 36 CY7C1518AV18 – 4 M × 18 ■ 300-MHz clock for high bandwidth CY7C1520AV18 – 2 M × 36


    Original     		PDF CY7C1518AV18 CY7C1520AV18 72-Mbit CY7C1518AV18 300-MHz

    Untitled

    Abstract: No abstract text available
    Text: CY7C1312BV18 CY7C1314BV18 18-Mbit QDR II SRAM Two-Word Burst Architecture 18-Mbit QDR® II SRAM Two-Word Burst Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 250 MHz clock for high bandwidth


    Original     		PDF CY7C1312BV18 CY7C1314BV18 18-Mbit CY7C1312BV18, CY7C1314BV18

    Untitled

    Abstract: No abstract text available
    Text: CY7C1318CV18, CY7C1320CV18 18-Mbit DDR II SRAM 2-Word Burst Architecture 18-Mbit DDR II SRAM 2-Word Burst Architecture Features Configurations • 18-Mbit density 1 M x 18, 512 K × 36 CY7C1318CV18 – 1M × 18 ■ 267-MHz clock for high bandwidth CY7C1320CV18 – 512K × 36


    Original     		PDF CY7C1318CV18, CY7C1320CV18 18-Mbit CY7C1318CV18 267-MHz

    CY7C1312BV18-167BZC

    Abstract: No abstract text available
    Text: CY7C1312BV18 CY7C1314BV18 18-Mbit QDR II SRAM Two-Word Burst Architecture 18-Mbit QDR® II SRAM Two-Word Burst Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 250 MHz clock for high bandwidth


    Original     		PDF CY7C1312BV18 CY7C1314BV18 18-Mbit CY7C1312BV18, CY7C1314BV18 CY7C1312BV18-167BZC

    Untitled

    Abstract: No abstract text available
    Text: THIS SPEC IS OBSOLETE Spec No: 001-06984 Spec Title: CY7C1512AV18/ CY7C1514AV18 72-MBIT QDR R II SRAM 2-WORD BURST ARCHITECTURE Sunset Owner: Jayasree Nayar (NJY) Replaced by: None CY7C1512AV18 CY7C1514AV18 72-Mbit QDR II SRAM 2-Word Burst Architecture


    Original     		PDF CY7C1512AV18/ CY7C1514AV18 72-MBIT CY7C1512AV18 CY7C1514AV18

    Untitled

    Abstract: No abstract text available
    Text: CY7C1318CV18, CY7C1320CV18 18-Mbit DDR II SRAM 2-Word Burst Architecture 18-Mbit DDR II SRAM 2-Word Burst Architecture Features Configurations • 18-Mbit density 1 M x 18, 512 K × 36 CY7C1318CV18 – 1M × 18 ■ 267-MHz clock for high bandwidth CY7C1320CV18 – 512K × 36


    Original     		PDF CY7C1318CV18, CY7C1320CV18 18-Mbit CY7C1318CV18 267-MHz

    Untitled

    Abstract: No abstract text available
    Text: CY7C1318CV18, CY7C1320CV18 18-Mbit DDR II SRAM 2-Word Burst Architecture 18-Mbit DDR II SRAM 2-Word Burst Architecture Features Configurations • 18-Mbit density 1 M x 18, 512 K × 36 CY7C1318CV18 – 1M × 18 ■ 267-MHz clock for high bandwidth CY7C1320CV18 – 512K × 36


    Original     		PDF CY7C1318CV18, CY7C1320CV18 18-Mbit CY7C1318CV18 267-MHz