str1106
Abstract: MUPA64K16-15TJC MUPA64K16-15TJI
Text: Advance Information MUPA64K16 “Alto” Priority Queue Scheduler General Description The MUPA64K16 Alto Priority Queue Scheduler is a high-performance sorting engine designed to support packet scheduling in high-speed switch or router applications. Alto can support any scheduling
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MUPA64K16
MUPA64K16
32-bit
16-bit
str1106
MUPA64K16-15TJC
MUPA64K16-15TJI
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AVR1303
Abstract: AVR1305 AVR109 iar inline assembly code AVR1003 AVR1316 pmic xmega ADC xmega
Text: AVR1305: XMEGA Interrupts and the Programmable Multi-level Interrupt Controller Features • 3 interrupt levels • Round-robin scheduling for low-level interrupts • Programmable priority for low-level interrupts 8-bit Microcontrollers Application Note 1 Introduction
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AVR1305:
043A-AVR-02/08
AVR1303
AVR1305
AVR109
iar inline assembly code
AVR1003
AVR1316
pmic
xmega ADC
xmega
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386CXSA
Abstract: 80C186EA 80C188EA
Text: REAL-TIME OPERATING SYSTEMS GENERAL SOFTWARE, INC. Embedded DOS*6-XL • ■ ■ ■ ■ ■ ■ ■ ■ ■ Highly Configurable 70 SourceLevel Options Fully-Reentrant DOS Services Priority-Based Scheduling with 32,767 Levels Supports Threads, Timers, Events,
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80C186XL/80C188XL,
80C186EA/
80C188EA,
80C186EB/80C188EB,
80C186EC/80C188EC,
386CXSA/
486SX/SXSF/GXSF,
320-108th
386CXSA
80C186EA
80C188EA
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"cyclic timer"
Abstract: RFID library management system projects rfid MCP2510 PIC17CXXX PIC18CXXX SW300031
Text: CMX-RTX for dsPIC30F Summary In some cases, well-structured linear programming is sufficient for a product. In most cases, however, programmers appreciate not having to worry about structuring their code to perform all necessary tasks in a timely manner. This is where CMX-RTX can help. CMX-RTX
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dsPIC30F
DS51435A
DS51435A*
"cyclic timer"
RFID library management system
projects rfid
MCP2510
PIC17CXXX
PIC18CXXX
SW300031
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driving point and transfer
Abstract: DM642 TMS320C6000 TMS320C6416 TMS320C671x NS480
Text: Application Report SPRAA00 − March 2003 TMS320C6000 EDMA IO Scheduling and Performance Jeffrey Ward Jamon Bowen TMS320C6000 Architecture ABSTRACT The enhanced DMA EDMA is a highly efficient and parallel data transfer engine. To make the best use of its resources, it is necessary to understand the architecture and schedule
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SPRAA00
TMS320C6000
driving point and transfer
DM642
TMS320C6416
TMS320C671x
NS480
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RTOS
Abstract: No abstract text available
Text: RTOS/CMX-RTX for PIC24/dsPIC DSC Summary In some cases, well-structured linear programming is sufficient for a product. In most cases, however, programmers appreciate not having to worry about structuring their code to perform all necessary tasks in a timely manner. This is where RTOS/CMX-RTX can
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PIC24/dsPIC®
cooperative01033B-34
PIC24/
RTOS
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st20 Application CPU
Abstract: st20 ST20 TOOLSET ST20 Embedded Toolset Trap ST20-TP1 SAY8 julian micro-electronics
Text: APPLICATION NOTE REAL-TIME KERNELS ON THE ST20 by Julian Wilson This note is a preliminary look at the facilities provided by the ST20 architecture for implementing a real-time kernel. 1 WHAT IS A KERNEL? A real-time kernel is a mechanism for controlling the execution of the tasks existing in
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ST20 TOOLSET
Abstract: OS20 st20 Application CPU ST20 Embedded Toolset ST20-TP1 ST20
Text: APPLICATION NOTE REAL-TIME KERNELS ON THE ST20 by Julian Wilson This note is a preliminary look at the facilities provided by the ST20 architecture for implementing a real-time kernel. 1 WHAT IS A KERNEL? A real-time kernel is a mechanism for controlling the execution of the tasks existing in
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RTOS
Abstract: No abstract text available
Text: RTOS/CMX-RTX for dsPIC30F Summary In some cases, well-structured linear programming is sufficient for a product. In most cases, however, programmers appreciate not having to worry about structuring their code to perform all necessary tasks in a timely manner. This is where RTOS/CMX-RTX can help.
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dsPIC30F
DS70148B-23
RTOS
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"cyclic timer"
Abstract: picstart plus MODELS 248, 249 projects rfid timer dspic30f MCP2510 PIC17CXXX PIC18CXXX
Text: CMX-Tiny+ for dsPIC30F Summary In some cases, well structured linear programming is sufficient for a product. In most cases, however, programmers appreciate not having to worry about structuring their code to perform all necessary tasks in a timely manner. This is where CMX-Tiny+ can help. CMX-Tiny+
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dsPIC30F
DS51436A
DS51436A*
"cyclic timer"
picstart plus
MODELS 248, 249
projects rfid
timer dspic30f
MCP2510
PIC17CXXX
PIC18CXXX
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Intel i960 architecture
Abstract: semaphores
Text: OPERATING SYSTEMS ACCELERATED TECHNOLOGY, INC. Nucleus PLUS Real-Time Multitasking Operating System • ■ ■ ■ ■ ■ ■ ■ ■ ■ Complete Source Code No Royalties ROMable Prioritized Scheduling of User Defined Tasks Dynamic Allocation of All Nucleus
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468-NUKE
Intel i960 architecture
semaphores
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MXT3010
Abstract: 0x610D
Text: M Maker Communications, Inc. AccessMaker Traffic Shaping Applies to AccessMaker Release 5.x Application Note Number 23 Version 1.2 Maker Communications 73 Mount Wayte Avenue Framingham, Massachusetts 01702 Order Number: 100490-03 December 17, 1999 Copyright c 1999 by Maker Communications, Inc. All rights reserved.
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Untitled
Abstract: No abstract text available
Text: RTOS µRTOS: Simple Multitasking with Microcontrollers Professor Dr Dogan Ibrahim, lecturer at the Near East University in Cyprus, describes the design of a C-based, simple multitasking RTOS, using PIC microcontrollers EMBEDDED SYSTEMS are usually microcontroller-based systems that
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PIC18
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80C186
Abstract: 80C188
Text: REAL-TIME OPERATING SYSTEMS ACCELERATED TECHNOLOGY, INC. Nucleus RTX Real-Time Multitasking Executive • ■ ■ ■ ■ ■ ■ ■ ■ ■ Documented Source Code Provided No Royalties ROMable Prioritized Scheduling of User Defined Tasks Optional Task Suspension on Full
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468-NUKE
80C186
80C188
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k2195
Abstract: k2196 K2191 ad6532 ADSP-2191 ADSP-2195 ADSP-2196 ADSP-BF531 ADSP-BF532 ADSP-BF533
Text: W3.5 Kernel VDK User’s Guide for 16-Bit Processors Revision 1.0, October 2003 Part Number 82-000035-03 Analog Devices, Inc. Digital Signal Processor Division One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2003 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written
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16-Bit
k2195
k2196
K2191
ad6532
ADSP-2191
ADSP-2195
ADSP-2196
ADSP-BF531
ADSP-BF532
ADSP-BF533
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ad6532
Abstract: K2126 Marshall ADSP-BF531 ADSP-BF532 ADSP-BF533 ADSP-BF534 ADSP-BF535 ADSP-BF536 ADSP-BF537
Text: W4.0 Kernel VDK User’s Guide Revision 1.0, January 2005 Part Number 82-000420-07 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2005 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written
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LED project using avr
Abstract: Atmel AVR XMEGA A Manual avr studio 5 robin led 8401a
Text: AVR1515: XMEGA-A1 Xplained training XMEGA Programmable Multi Interrupt Controller Prerequisites • Required knowledge - Completed AVR1512 XMEGA Basics training • Software prerequisites ® • Atmel AVR Studio 5 • Hardware prerequisites - XMEGA-A1 Xplained
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AVR1515:
AVR1512
401A-AVR-06/11
401A-AVR-07/11
LED project using avr
Atmel AVR XMEGA A Manual
avr studio 5
robin led
8401a
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AVR1503: Xplain training - XMEGA Programmable Multi Interrupt Controller
Abstract: AVR1503 LED project using avr AVR1500 Atmel AVR XMEGA A Manual XMEGA
Text: AVR1503: Xplain training - XMEGA Programmable Multi Interrupt Controller Prerequisites • Required knowledge Completed AVR1500 XMEGA Basics training • Software prerequisites Atmel AVR® Studio® 4.18 SP2 or later WinAVR/GCC 20100110 or later • Hardware prerequisites
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AVR1503:
AVR1500
312A-AVR-06/10
AVR1503: Xplain training - XMEGA Programmable Multi Interrupt Controller
AVR1503
LED project using avr
Atmel AVR XMEGA A Manual
XMEGA
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AD6900
Abstract: ad6903 ad6900 memory KERNEL A-18 A-20 books application AD6900/AD6855
Text: W4.5 Kernel VDK User’s Guide Revision 2.0, April 2006 Part Number 82-000420-07 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2006 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent
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BF523
Abstract: BF541 A-18 api 560
Text: W5.0 Kernel VDK User’s Guide Revision 3.1, August 2008 Part Number 82-000420-07 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2008 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent
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grant49,
BF523
BF541
A-18
api 560
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Untitled
Abstract: No abstract text available
Text: MDS105 Unmanaged 5-Port 10/100 Mbps Ethernet Switch Data Sheet Features • • • • • • • • • • June 2003 4 10/100Mbps auto-negotiating RMII ports 1 10/100Mbps auto-negotiating MII/serial port port 4 that can be used as a WAN uplink or as a
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MDS105
10/100Mbps
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M27483
Abstract: RFC-2697
Text: PortMaker®III Packet Traffic Management PTM Firmware TSP3 Traffic Stream Processors Packet Traffic Management for Next-generation IP/MPLS Packet Based Networks PortMakerIII firmware provides proven, reliable, and fully supported binary applications for the TSP3 family of
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M03-00856
M27483
RFC-2697
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ADSP-21489
Abstract: api 560 ADSP-21469 lwIP BF504 BF523 k21465 A-20 21479 K2148
Text: W5.0 Kernel VDK User’s Guide Revision 3.3, September 2009 Part Number 82-000420-07 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2009 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written
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Untitled
Abstract: No abstract text available
Text: Process Management 9 CHAPTER 9 PROCESS MANAGEMENT This chapter introduces the i960 MC processor’s process-management facilities. Included is a discussion o f process-management concepts, the process-control block PCB and the requirements for managing both single-process and multiple-process systems.
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