marking BARX
Abstract: MUNICH256 PPC405GP EASY256E1T1 INFINEON PART MARKING BTS max 202 rs232 driver Designed circle was only 3 figures in 4511 ic EASY321-R1 APM 4317
Text: Tool De scrip t ion, DS 1, Se ptemb er 20 00 EASY256-E1T1 Reference Design for MUNICH256 and QuadFALC Version 2.1 Datacom N e v e r s t o p t h i n k i n g . Edition 09.00 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany
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Original
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EASY256-E1T1
MUNICH256
D-81541
marking BARX
MUNICH256
PPC405GP
EASY256E1T1
INFINEON PART MARKING BTS
max 202 rs232 driver
Designed circle was only 3 figures in 4511 ic
EASY321-R1
APM 4317
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PDF
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EASY256
Abstract: MUNICH256
Text: Gettin g Star ted, DS 1, Se ptemb er 20 00 EASY256-E1T1 Reference Design for MUNICH256 and QuadFALC Version 2.1 Datacom N e v e r s t o p t h i n k i n g . Edition 09.00 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany
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Original
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EASY256-E1T1
MUNICH256
D-81541
EASY256
MUNICH256
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54HC04, SN74HC04 HEX INVERTERS D 2 6 8 4 , DEC EM BER 1 9 8 2 - R E V IS E D SE PTEM BE R 1 9 8 7 S N 5 4 H C 0 4 . . . J PACKAGE S N 7 4 H C 0 4 . . . D OR N PACKAGE TO P VIEW } 1A C 2 3 2YC 4 3AC 5 3YC 6 gndC Dependable Texas Instruments Quality and Reliability
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OCR Scan
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SN54HC04,
SN74HC04
300-m
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PDF
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C4043
Abstract: cmos dual s-r latch NOR Gates 4043B cd4025afb 043b 4001 nor gate 40448 CD4001A 4044B
Text: TYPES TF4043B, TF4044B, TP4043B, TP4044B QUAD S-R AND S-R LATCHES WITH 3-STATES E OUTPUTS PTEM BER 19 75 CMOS LOGIC CIRCUITS • J OR N D U A L - IN - L IN E P A C K A G E T O P V IE W 3-State O u tp u ts w ith C o m m on Enable is 48 «e 40 30 n h jir jïu ïïu ^
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OCR Scan
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TFA043B,
TF4044B.
TP4043B.
TP4044B
4043B
4044B
C4043B)
C4044B)
TF4043B,
TP40438
C4043
cmos dual s-r latch
NOR Gates
cd4025afb
043b
4001 nor gate
40448
CD4001A
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PDF
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HC680
Abstract: HC679
Text: SN54H C679, SN54H C680, SN74H C679, SN74HC680 12-BIT ADDRESS COMPARATORS □ 2 8 3 3 , M A R C H 1 9 8 4 -R E V IS E D SE PTEM BER 1 9 8 7 TOP V IE W 'HC680 is a 12-Bit Address Comparator With Latch AT C 1 L j 20 H v c c 19 U S A2 C 2 18 A3 C 3 Package Options Include Plastic "Small
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OCR Scan
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SN54HC679,
SIU54HC680,
SN74HC679,
SN74HC680
1984-REVISED
HC679
12-Bit
HC680
300-mil
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PDF
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abt245
Abstract: 74ABT245 74ABT245CMSA 74ABT245CMTC 74ABT245CSC 74ABT245CSJ M20D MS-013 MTC20
Text: A I R C H I L D f ptemHb t r 1 " 1 , R e v is e d J a n u a ry 1 9 9 9 74ABT245 Octal Bi-Directional Transceiver with 3-STATE Outputs General Description Features T h e A B T 2 4 5 c o n ta in s e ig h t n o n -in v e rtin g b id ire c tio n a l b u ff e rs w ith 3-S T A T E o u tp u ts a n d is in te n d e d fo r b u s -o rie n te d
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OCR Scan
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74ABT245
ABT245
74ABT245
74ABT245CMSA
74ABT245CMTC
74ABT245CSC
74ABT245CSJ
M20D
MS-013
MTC20
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PDF
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Untitled
Abstract: No abstract text available
Text: H ITACH I 2 S D 1 3 6 — 7 — SILICON NPN EPITAXiAL LO W FREQ UENCY POW ER A M P L iF Ig H Com ptem errta/y pari w,:h 2 S & 1O01 r' " l if. > Hÿis ; < ! í <i' Í O - . ir . U iï .; : ; *:• U PA K MAXIMUM C O L L E C T O R D ISSIPA TIO N CURVE I A B S O L U T E MAXIMUM R A T IN G S - Ta 2S C)
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OCR Scan
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2SDI367
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PDF
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Untitled
Abstract: No abstract text available
Text: ß Nati onal Semi con d uctor' S e ptem be r 1 996 N D T452P P-Channel Enhancement Mode Field Effect Transistor Features General Description Pow er SO T P-Channel e n h a n c e m e n t m o d e p o w e r fie ld effect tra n s is to rs are pro d u ce d using N a tio n a l's
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OCR Scan
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T452P
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54HCT533, SN74HCT533 OCTAL D TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS D 2 8 0 4 , M A R C H 1 9 8 4 - R E V IS E D SE PTEM BER 1 9 8 7 SN54HCT533 . . . J PACKAGE SN74HCT533 . . D W O R INI P A C K A G E Inputs are TTL-Voltage Compatible • 8 Latches in a Single Package
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OCR Scan
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SN54HCT533,
SN74HCT533
300-mil
SN54HCT533
SN74HCT533
SN54HCT533
7526S
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54HC353, SIU74HC353 DUAL 4-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS WITH 3 STATE OUTPUTS D 2 6 8 4 , DEC EM BE R 1 9 8 2 -R E V IS E D SE PTEM BE R 1 9 8 7 • Inverting Versions of 'HC253 • Permits Multiplexing from N Lines to 1 Line • Performs Parallel-to-Serial Conversion
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OCR Scan
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SN54HC353,
SIU74HC353
HC253
300-mil
SNS4HC353
SN54HC353
SN74HC353
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PDF
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C194
Abstract: SN74HC194 74H 14D
Text: SN54HC194, SN74HC194 4 BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTERS D 2 6 8 4 , D EC EM BE R 1 9 8 2 - R E V IS E D SE PTEM BE R 1 9 3 7 Parallel In puts an d O u tp u ts SN 54H C19 4 . . . J PACKAGE SN74HC194 . . . DW or N PACKAGE Four O p era tin g M odes:
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OCR Scan
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SN54HC194,
SN74HC194
SN74HC194
C194
74H 14D
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PDF
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wf vqe 24 d
Abstract: Cd 4541 equivalent wf vqe 24 f WF VQE 24 WF VQE 13 X2864A-35 ic 11105 circuits diagraM itt capacitor hin2020 x2864a
Text: MIL-M-38510/228 22 SE PTEMBER 1987 MILITARY SPECIFICATION M I C R O C I R C U I T S , DI GITAL, NMOS 8 K X 8 BIT, E L E C T R I C A L L Y P R O G R A M M A B L E R E A D - O N L Y M E M O R Y E E P R O M MONOLITHIC SILICON T h i s s p e c i f i c a t i o n is
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OCR Scan
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MIL-M-38510/228
MIL-M-38510.
X2864A-45/XIC0R
X2864A-3a/XIC0rt
X2864A-30/XIC0R
X2864A-2
X2864A-35/XIC0R
X2864A-25/XIC0R
2864-350/SEEQ
wf vqe 24 d
Cd 4541 equivalent
wf vqe 24 f
WF VQE 24
WF VQE 13
X2864A-35
ic 11105 circuits diagraM
itt capacitor
hin2020
x2864a
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PDF
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c3486
Abstract: No abstract text available
Text: MC3486 QUADRUPLE LINE RECEIVER WITH 3-STATE OUTPUT D 2 4 3 4 , JU N E 1 9 8 0 - R E V IS E D SE PTEM BE R 1 9 8 6 Meets EIA Standards RS-422-A and RS423-A and Federal Standards 1020 and 1030 • D, J OR N P AC K A G E TO P VIE W 3-State, TTL-Compatible Outputs
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OCR Scan
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MC3486
RS-422-A
RS423-A
C3486
RS-423-A
c3486
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PDF
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Untitled
Abstract: No abstract text available
Text: fRevised ptem H br;1 91 q May 1999 S E M I C O N D U C T O R TM FST3253 Dual 4:1 Multiplexer/Demultiplexer Bus Switch General Description The Fairchild Switch FST3253 is a dual 4:1 high-speed CMOS TTL-compatible multiplexer/demultiplexer bus switch. The low on resistance of the switch allows inputs to
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OCR Scan
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FST3253
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PDF
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MSC1311-01B
Abstract: No abstract text available
Text: PTEMBER 1998 Revision 1.0 LXT310 T1 CSU/ISDN PRI Transceiver The LXT310 is the First fully integrated transceiver for T l CSU and ISDN Primary Rate Interface ISDN PRI applications at 1.544 Mbps. This transceiver operates over 6,000 feet of 22 AWG twisted-pair cable without any
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OCR Scan
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LXT310
LXT310
MSC1311-01B
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PDF
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2N3414
Abstract: TLC5510
Text: This Material Copyrighted By Its Respective Manufacturer TLC5510 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER S LAS095G - S E PTEM BER 1994 - REVISED JA N U A R Y 1997 functional block diagram schematics of inputs and outputs 2 ^ Texas In s t r u m e n t s
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OCR Scan
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TLC5510
SLAS095G
TLC5510
2N3414
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PDF
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c41151
Abstract: SN74HC375
Text: SN54HC375, SN74HC375 4 BIT BISTABLE LATCHES D 2 8 0 4 . M A R C H 1 9 8 4 - R E V IS E D SE PTEM BER 1 9 8 7 Package Options Include Plastic "Sm all Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-m il DIPs S N 54H C 376 . . . JP AC KA G E
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OCR Scan
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SN54HC375,
SN74HC375
300-m
SN74H
SN64HC375
SN74HC376
c41151
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PDF
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74S225 TEXAS
Abstract: No abstract text available
Text: SN74S225 1 6 x 5 ASYNCHRONOUS FIRST-IN FIRST OUT MEMORY D 1 7 3 3 , SE PTEM BE R 1 9 7 6 -R E V IS E D SE PTEM BE R 1 9 8 5 • • Independent Asynchronous Inputs and Outputs SN 74S225 . . . j Organized as 16-Words o f 5 Bits CLK A C • DC to 10-MHz Data Rate
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OCR Scan
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SN74S225
16-Words
10-MHz
20-Pin,
300-m
74S225
16-WORD
74S225 TEXAS
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PDF
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54HC137
Abstract: C137
Text: SN 5 4H C 13 7, S N 74 H C 13 7 3-LINE TO 8 LINE DEC OD ERS/DEM ULTIPLEXERS WITH AD DRESS LATC HES D 2 6 8 4 , D EC EM BE R 1 9 8 2 - R E V IS E D SE PTEM BE R 1 9 8 7 • Combines Decoder and 3-Bit Address Latch • Incorporates 2 Output Enables to Simplify
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OCR Scan
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300-m
54HC137
C137
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PDF
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TBP18S030
Abstract: TBP18S030MJ TBP18SA030 TBP18SA030MJ 74 family
Text: TBP18S030, TBP18SA030 256 BITS 32 WORDS BY 8 BITS PROGRAMMABLE READ ONLY MEMORIES SCHOTTKY PROMS S E PTEM BE R 1 9 7 9 - R E V IS E D A U G U S T 1 9 8 4 • Titanium-Tungsten (Ti-W) Fuse Link for Reliable Low-Voltage Full Family Compatible Programming •
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OCR Scan
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TBP18S030,
TBP18SA030
1979-REVISED
TBP18SA030.
TBP16S030
TBP18SA030MJ
TBP18SA030
TBP18S030
TBP18S030MJ
74 family
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PDF
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1S24C02
Abstract: 24C02-1 IS24C02 TQQ4404 2 pin ir receiver
Text: ISSI 2,048-BIT SERIAL ELECTRICALLY ERASABLE PROM P R E LIM IN A R Y SE PTEM B ER 1995 FEATURES • Low power CMOS — Active current less than 2 mA — Standby current less than 8 ¿A • Hardware write protection — Write control pin • Internally organized as 256 x 8
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OCR Scan
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IS24C02
048-BIT
IS24C02
EP81995DS02
R00M404
IS24C02-P
IS24C02-G
600-mil
IS24C02-PI
1S24C02
24C02-1
TQQ4404
2 pin ir receiver
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PDF
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Untitled
Abstract: No abstract text available
Text: H ITACH I 2SD1368-S iil C O N N PN E P IT A X IA L tO W F R ê Q ü S N C Y PO W ER A M PLIFIER Com ptem em ary pair wiih 2 S 8 "0 íS2 — iiü i. -, -! \ • t; I = £3= », i' ZTlFi!. i H ¿ i.'., w . ;>« Î :,."óír , i: !r {UPAK MAXIMUM CO LLECTO R DISSIPATION
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OCR Scan
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2SD1368
2SD789,
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PDF
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NDT453N
Abstract: No abstract text available
Text: S e ptem be r 1 996 Nat i onal S e m i c on d u c tor' N D T453N N-Channel Enhancement Mode Field Effect Transistor General Description Features Power SOT N-Channel enhancement mode power field effect transistors are produced using National's proprietary, high cell density, DMOS technology.
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OCR Scan
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T453N
042i2
NDT453N
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PDF
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MARKING S24c
Abstract: S05C tvs diode marking code fo S-24C
Text: P_ SMS05C i^ Q P IW JJPy IX P O I- l S e ptem ber 17, 1998 TVS Diode Array For ESD and Latch-Up Protection thru SMS24C T E L 8 0 5 -4 9 8 -2 1 11 F A X :805-498-3804 W E B :http://w w w .sem tech.com DESCRIPTION FEATURES The SM S series of TVS arrays are designed to protect
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OCR Scan
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SMS05C
SMS24C
OT23-6L
MARKING S24c
S05C
tvs diode marking code fo
S-24C
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PDF
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