100lvel17
Abstract: E116 MC100LVEL17 MC100LVEL17DW
Text: MC100LVEL17 3.3V ECL Quad Differential Receiver Description The MC100LVEL17 is a 3.3 V ECL, quad differential receiver. The device is functionally equivalent to the E116 device with the capability of operation from either a −3.3 V or +3.3 V supply voltage.
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MC100LVEL17
MC100LVEL17
MC100LVEL17/D
100lvel17
E116
MC100LVEL17DW
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100 20L A1 diode
Abstract: E116 MC100LVEL17 MC100LVEL17DW
Text: MC100LVEL17 3.3V ECL Quad Differential Receiver Description The MC100LVEL17 is a 3.3 V ECL, quad differential receiver. The device is functionally equivalent to the E116 device with the capability of operation from either a −3.3 V or +3.3 V supply voltage.
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MC100LVEL17
MC100LVEL17
MC100LVEL17/D
100 20L A1 diode
E116
MC100LVEL17DW
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Untitled
Abstract: No abstract text available
Text: 19-2390; Rev 0; 4/02 Lowest Jitter Quad PECL-to-ECL Differential Translators The MAX9424–MAX9427 high-speed, low-skew quad PECL-to-ECL translators are designed for high-speed data and clock driver applications. These devices feature an ultra-low 0.24ps RMS random jitter and channel-tochannel skew is less than 90ps in asynchronous mode.
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MAX9424â
MAX9427
5x5x01
MAX9427
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MAX9424
Abstract: MAX9425 MAX9426 MAX9427 SK4426 SK4430 SK4436 SK4440
Text: 19-2390; Rev 0; 4/02 Lowest Jitter Quad PECL-to-ECL Differential Translators The MAX9424–MAX9427 high-speed, low-skew quad PECL-to-ECL translators are designed for high-speed data and clock driver applications. These devices feature an ultra-low 0.24ps RMS random jitter and channel-tochannel skew is less than 90ps in asynchronous mode.
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MAX9424
MAX9427
5x5x01
MAX9427
MAX9425
MAX9426
SK4426
SK4430
SK4436
SK4440
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Untitled
Abstract: No abstract text available
Text: TB5D1M, TB5D2H www.ti.com SLLS579 – SEPTEMBER 2003 QUAD DIFFERENTIAL PECL DRIVERS FEATURES DESCRIPTION • These quad differential drivers are TTL input to pseudo-ECL differential output used for digital data transmission over balanced transmission lines.
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SLLS579
26LS31
MS-013,
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E116
Abstract: MC100LVEL17 MC100LVEL17DW MC100LVEL17DWR2
Text: MC100LVEL17 3.3V ECL Quad Differential Receiver The MC100LVEL17 is a 3.3 V ECL, quad differential receiver. The device is functionally equivalent to the E116 device with the capability of operation from either a -3.3 V or +3.3 V supply voltage. Under open input conditions, the D input will be biased at VCC/2
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MC100LVEL17
MC100LVEL17
MC100LVEL17/D
E116
MC100LVEL17DW
MC100LVEL17DWR2
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100LVEL17
Abstract: SO20L
Text: MC100LVEL17 3.3V ECL Quad Differential Receiver The MC100LVEL17 is a 3.3 V ECL, quad differential receiver. The device is functionally equivalent to the E116 device with the capability of operation from either a −3.3 V or +3.3 V supply voltage. Under open input conditions, the D input will be biased at VCC/2
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MC100LVEL17
AND8020
AN1404
AN1405
AN1406
AN1503
AN1504
AN1560
AN1568
100LVEL17
SO20L
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Marking D1c
Abstract: H 3355 k 3555 MC100E101 MC100E101FN MC100E101FNR2 MC10E101 MC10E101FN MC10E101FNR2
Text: MC10E101, MC100E101 5V ECL Quad 4-Input OR/NOR Gate The MC10E/100E101 is a quad 4-input OR/NOR gate. The 100 Series contains temperature compensation. • 500 ps Max. Propagation Delay • PECL Mode Operating Range: VCC = 4.2 V to 5.7 V • http://onsemi.com
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MC10E101,
MC100E101
MC10E/100E101
MC10E101FN
EIA/JESD78
AND8003/D
MC10E101/D
Marking D1c
H 3355
k 3555
MC100E101
MC100E101FN
MC100E101FNR2
MC10E101
MC10E101FN
MC10E101FNR2
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Untitled
Abstract: No abstract text available
Text: Anything to ECL Quad Buffer / Receiver SEMTECH Today's Results .Tomorrow's Vision SK4426 July 16, 1999 Preliminary Information Quad Buffer / Receiver This document contains information on a new product. The parametric information, although not fully characterized, is the result of testing initial
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SK4426
SK4426
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50 ohm resistor
Abstract: No abstract text available
Text: MC10E101, MC100E101 5V ECL Quad 4-Input OR/NOR Gate The MC10E/100E101 is a quad 4-input OR/NOR gate. The 100 Series contains temperature compensation. • 500 ps Max. Propagation Delay • PECL Mode Operating Range: VCC = 4.2 V to 5.7 V • http://onsemi.com
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MC10E101,
MC100E101
MC10E/100E101
EIA/JESD78
AND8003/D
PLCC-28
AND8020
AN1404
AN1405
AN1406
50 ohm resistor
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Untitled
Abstract: No abstract text available
Text: Anything to ECL Quad Buffer / Receiver SEMTECH Today's Results .Tomorrow's Vision SK4426 October 4, 1999 Preliminary Information Quad Buffer / Receiver This document contains information on a new product. The parametric information, although not fully characterized, is the result of testing initial
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SK4426
SK4426
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100LVEL17
Abstract: E116 MC100LVEL17 MC100LVEL17DW
Text: MC100LVEL17 3.3V ECL Quad Differential Receiver Description The MC100LVEL17 is a 3.3 V ECL, quad differential receiver. The device is functionally equivalent to the E116 device with the capability of operation from either a −3.3 V or +3.3 V supply voltage.
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MC100LVEL17
MC100LVEL17
MC100LVEL17/D
100LVEL17
E116
MC100LVEL17DW
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Untitled
Abstract: No abstract text available
Text: MC100LVEL17 3.3V ECL Quad Differential Receiver Description The MC100LVEL17 is a 3.3 V ECL, quad differential receiver. The device is functionally equivalent to the E116 device with the capability of operation from either a −3.3 V or +3.3 V supply voltage.
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MC100LVEL17
MC100LVEL17
MC100LVEL17/D
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SK4426
Abstract: No abstract text available
Text: Anything to ECL Quad Buffer / Receiver SEMTECH Today's Results .Tomorrow's Vision SK4426 January 20, 2000 Preliminary Information Quad Buffer / Receiver This document contains information on a new product. The parametric information, although not fully characterized, is the result of testing initial
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SK4426
SK4426
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SY100H842
Abstract: SY100H842ZC SY10H842 SY10H842ZC SY10H842ZCTR
Text: SINGLE SUPPLY QUAD PECL-TO-TTL WITH LATCHED OUTPUT ENABLE SYNERGY SEMICONDUCTOR SYNERGY SEMICONDUCTOR ClockWorks SY10H842 ClockWorks™ SY100H842 SY10H842 SY100H842 DESCRIPTION FEATURES • Translates positive ECL to TTL PECL-to-TTL ■ 300ps pin-to-pin skew
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SY10H842
SY100H842
300ps
500ps
SY10/100H842
SY10H842ZC
SY100H842
SY100H842ZC
SY10H842
SY10H842ZC
SY10H842ZCTR
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Untitled
Abstract: No abstract text available
Text: Anything to ECL Quad Buffer / Receiver SEMTECH Today's Results .Tomorrow's Vision SK4436 July 16, 1999 Preliminary Information Quad Buffer / Receiver This document contains information on a new product. The parametric information, although not fully characterized, is the result of testing initial devices.
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SK4436
SK4436
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Untitled
Abstract: No abstract text available
Text: Anything to ECL Quad Buffer / Receiver SEMTECH Today's Results .Tomorrow's Vision SK4436 October 4, 1999 Preliminary Information Quad Buffer / Receiver This document contains information on a new product. The parametric information, although not fully characterized, is the result of testing initial devices.
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SK4436
SK4436
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SK4436
Abstract: No abstract text available
Text: Anything to ECL Quad Buffer / Receiver SEMTECH Today's Results .Tomorrow's Vision SK4436 January 20, 2000 Preliminary Information Quad Buffer / Receiver This document contains information on a new product. The parametric information, although not fully characterized, is the result of testing initial devices.
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SK4436
SK4436
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Untitled
Abstract: No abstract text available
Text: SK4440 Anything to ECL HIGH-PERFORMANCE PRODUCTS Description Features Quad Buffer/Receiver The SK4440 is an extremely fast, stable and accurate • 3 GHz Fmax low skew quad buffer or cable driver / receiver. It can • Available in 32 lead, 5mm X5mm, TQFP
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SK4440
SK4440
AN1001
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EP105
Abstract: MC100EP105 MC10EP105 QFN32 LQFP-32 footprint LQFP32 footprint
Text: MC10EP105, MC100EP105 3.3V / 5V ECL Quad 2−Input Differential AND/NAND Description The MC10/100EP105 is a quad 2−input differential AND/NAND gate. Each gate is functionally equivalent to the EP05 and LVEL05 devices. With AC performance much faster than the LVEL05 device,
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MC10EP105,
MC100EP105
MC10/100EP105
LVEL05
LVEL05
EP105
EP105
LQFP-32
MC10EP105/D
MC100EP105
MC10EP105
QFN32
LQFP-32 footprint
LQFP32 footprint
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Untitled
Abstract: No abstract text available
Text: MC10EP105, MC100EP105 3.3V / 5V ECL Quad 2−Input Differential AND/NAND Description The MC10/100EP105 is a quad 2−input differential AND/NAND gate. Each gate is functionally equivalent to the EP05 and LVEL05 devices. With AC performance much faster than the LVEL05 device,
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MC10EP105,
MC100EP105
MC10/100EP105
LVEL05
LVEL05
EP105
EP105
MC10EP105/D
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SK4426
Abstract: No abstract text available
Text: SEIVITEOH Anything to ECL Quad Buffer I Receiver SK4426 January 20, 2000 Preliminary Information Quad Buffer / Receiver This docum ent contains inform ation on a new product. The parametric information, although not fully characterized, is the result of testing initial
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SK4426
SK4426
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SK4430
Abstract: No abstract text available
Text: 3EIN/ITEOH Anything to ECL Quad Buffer I Receiver SK4430 January 20, 2000 Preliminary Information This document contains information on a new product. The parametric information, although not fully characterized, is the result of testing initial devices. Quad Buffer / Receiver
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SK4430
SK4430
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Untitled
Abstract: No abstract text available
Text: V SYNERGY SEMICONDUCTOR Clockworks PRELIMINARY 3.3V SINGLE SUPPLY QUAD PECL-TO-TTL OUTPUT ENABLE SY100H842L DESCRIPTION FEATURES • 3.3V power supply ■ Translates positive ECL to TTL PECL-to-TTL ■ 300ps pin-to-pin skew ■ 500ps part-to-part skew
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SY100H842L
300ps
500ps
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