RAM EDAC SEU Search Results

RAM EDAC SEU Result Highlights (5)

Part	Manufacturer	Description
MD2114A/BVA	Rochester Electronics LLC	STATIC RAM; 1K X 4
27S13A/BEA	Rochester Electronics LLC	27S13A - 2048-Bit (512X4) Bipolar RAM
CY7C09389V-9AXI	Rochester Electronics	CY7C09389 - 3.3 V 64 K X 18 Synchronous Dual-Port Static RAM, Industrial Temp
CDP1824CD/B	Rochester Electronics LLC	CDP1824C - 32-Word x 8-Bit Static RAM
MC68A02CL	Rochester Electronics LLC	MC68A02 - Microprocessor With Clock and Oprtional RAM

RAM EDAC SEU Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
verilog hdl code for matrix multiplication Abstract: vhdl code for pipelined matrix multiplication vhdl code hamming verilog code for matrix multiplication vhdl code for matrix multiplication vhdl code hamming edac memory Core from Libero verilog code hamming hamming code FPGA vhdl coding for hamming code Text: Application Note AC319 Using EDAC RAM for RadTolerant RTAX-S/SL and Axcelerator FPGAs Applies to EDAC Core from Libero IDE v7.2 and Newer Introduction The newest Actel designed-for-space field programmable gate array FPGA family, RTAX-S/SL, is a highperformance, high-density, antifuse-based FPGA with embedded user static RAM (SRAM). Based on the	Original	AC319 verilog hdl code for matrix multiplication vhdl code for pipelined matrix multiplication vhdl code hamming verilog code for matrix multiplication vhdl code for matrix multiplication vhdl code hamming edac memory Core from Libero verilog code hamming hamming code FPGA vhdl coding for hamming code	PDF
vhdl code hamming Abstract: vhdl coding for hamming code vhdl code for pipelined matrix multiplication vhdl code for matrix multiplication vhdl code hamming ecc parity ECC SEC-DED Hamming code SRAM verilog code for matrix multiplication SECDED RTAX2000S vhdl code SECDED Text: Application Note AC273 Using EDAC RAM for RadTolerant RTAX-S FPGAs and Axcelerator FPGAs Applies to EDAC Core from Libero IDE v7.1 or Older Introduction Actel's newest designed-for-space Field Programmable Gate Array FPGA family, the RTAX-S, is a highperformance, high-density antifuse-based FPGA with embedded user static RAM (SRAM). Based on Actel's	Original	AC273 l011011101101 vhdl code hamming vhdl coding for hamming code vhdl code for pipelined matrix multiplication vhdl code for matrix multiplication vhdl code hamming ecc parity ECC SEC-DED Hamming code SRAM verilog code for matrix multiplication SECDED RTAX2000S vhdl code SECDED	PDF
RAM EDAC SEU Abstract: SRAM edac AC304 sram 2114 edac 2114 SRAM RAM SEU RAM64k36 7 bit hamming code hamming code Text: Application Note AC304 Simulating SEU Events in EDAC RAM Introduction The Actel RTAX-S Field Programmable Gate Array FPGA provides embedded user static RAM in addition to single-event-upset (SEU)-enhanced logic, including embedded triple-module redundancy (TMR)	Original	AC304 RAM EDAC SEU SRAM edac AC304 sram 2114 edac 2114 SRAM RAM SEU RAM64k36 7 bit hamming code hamming code	PDF
temic 80C32 Abstract: mmu ericsson MA31750 processor architecture MA31750 80C32 Harris Semiconductor IDT39C60 65656F 29C516E microcontroller radiation hard 80C32E Text: ANM052 Radiation Tolerant SRAM for SPACE Applications Introduction The purpose of this document is to analyze the selection criteria for memory chips to be used in Spacecraft computers. A general trend is to implement more autonomous functions in Spacecraft, making use of increased	Original	ANM052 IDT49C460 IDT39C60 AN-24, 32kx8 HM-65664E M-65656F HRX/93 temic 80C32 mmu ericsson MA31750 processor architecture MA31750 80C32 Harris Semiconductor 65656F 29C516E microcontroller radiation hard 80C32E	PDF
MA31750 processor architecture Abstract: atmel 80C32 atmel edac atmel 2816 memory mmu ericsson MA31750 6T SRAM a8961 microcontroller radiation hard SMKS-29C516E Text: ANM052 Radiation Tolerant SRAM for SPACE Applications Introduction The purpose of this document is to analyze the selection criteria for memory chips to be used in Spacecraft computers. A general trend is to implement more autonomous functions in Spacecraft, making use of increased	Original	ANM052 IDT49C460 IDT39C60 AN-24, 32kx8 HM-65664E M-65656F HRX/93 MA31750 processor architecture atmel 80C32 atmel edac atmel 2816 memory mmu ericsson MA31750 6T SRAM a8961 microcontroller radiation hard SMKS-29C516E	PDF
RTAX2000 Abstract: schematic diagram 2 sc 1020 RTAX1000 RTAX250 Synplify tmr RTAX2000S Text: A dv an c ed v0 .5 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 60 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case	Original	TM1019 com/documents/CQ352FPGA RTAX2000 schematic diagram 2 sc 1020 RTAX1000 RTAX250 Synplify tmr RTAX2000S	PDF
CQ352 Abstract: antifuse Text: v2.1 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case	Original	TM1019 CQ352 antifuse	PDF
SILEX Abstract: CQ352 Text: v2.0 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case	Original	TM1019 SILEX CQ352	PDF
306RP Abstract: 7805ALPRP SPARC-V74 RAM memory chip 7805a radiation tolerant ethernet 49S32DRP RAM SEU STRV Text: SPACE ELECTRONICS INC. SINGLE BOARD COMPUTER SPACE PRODUCTS SPARC-V7R DESCRIPTION: • Sizes 3U VME or 6UVME • Optimized integrated 32/64-bit floating-point unit • Concurrent error detection: more than 99% of all SEU induced errors are detected and trapped	Original	32/64-bit 99Rev0 306RP 7805ALPRP SPARC-V74 RAM memory chip 7805a radiation tolerant ethernet 49S32DRP RAM SEU STRV	PDF
RTAX250S Abstract: RTAX2000S RTAX1000S LG1152 CG1272 RTAX4000S RTAX1000S-SL RTAX2000 CQ208 RTAX-S lvds Text: P ro du c t Br ie f RTAX-S/SL RadTolerant FPGAs u e Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37	Original	TM1019 5172169PB-11/5 RTAX250S RTAX2000S RTAX1000S LG1152 CG1272 RTAX4000S RTAX1000S-SL RTAX2000 CQ208 RTAX-S lvds	PDF
LG1152 Abstract: ACTEL CCGA 624 mechanical A54SXA LG1272 CQ352 Text: v5.3 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg	Original	TM1019 LG1152 ACTEL CCGA 624 mechanical A54SXA LG1272 CQ352	PDF
MA31750 processor architecture Abstract: 00E-12 mmu ericsson 29C516E ANM052 80C32 80C32E MA31750 65656E 80C32 Harris Semiconductor Text: ANM052 MATRA MHS Radiation Tolerant SRAM for SPACE Applications Introduction The purpose of this document is to analyse the selection criteria for memory chips to be used in Spacecraft computers. A general trend is to implement more autonomous functions in Spacecraft, making use of increased	Original	ANM052 HRX/93 HM-65656E 00E-06 00E-07 00E-08 00E-09 00E-10 00E-11 00E-12 MA31750 processor architecture 00E-12 mmu ericsson 29C516E ANM052 80C32 80C32E MA31750 65656E 80C32 Harris Semiconductor	PDF
ACTEL CCGA 624 mechanical Abstract: LG1152 RTAX2000S ACTEL burn-in RTAX250S LGA 2011 Socket diagram RTAX2000 ACTEL CCGA 1152 mechanical cg624 RTAX1000S Text: v5.4 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg	Original	TM1019 ACTEL CCGA 624 mechanical LG1152 RTAX2000S ACTEL burn-in RTAX250S LGA 2011 Socket diagram RTAX2000 ACTEL CCGA 1152 mechanical cg624 RTAX1000S	PDF
TSC695E Abstract: No abstract text available Text: TSC695E Rad-Hard Rad-Hard 32-bit SPARC SPARC 32-bit Embedded Processor Processor Embedded Data Sheet Rev.D - August 2000 1 TSC695E Data Sheet Information Foreword Atmel Nantes S.A. reserves the right to make changes in the products or specifications contained in this document	Original	TSC695E 32-bit TSC695E	PDF

Untitled Abstract: No abstract text available Text: Features • Integer Unit Based on SPARC V7 High-performance RISC Architecture • Optimized Integrated 32/64-bit Floating-point Unit • On-chip Peripherals • • • • • • • • • • • – EDAC and Parity Generator and Checker – Memory Interface	Original	32/64-bit 40-bit 4118Iâ	PDF
ERC32 Abstract: TSC695F TSC695FL embedded instruction set 5962R0054001VXC Text: Features • Integer Unit Based on SPARC V7 High-performance RISC Architecture • Optimized Integrated 32/64-bit Floating-point Unit • On-chip Peripherals • • • • • • • • • • • – EDAC and Parity Generator and Checker – Memory Interface	Original	32/64-bit 40-bit 4118J ERC32 TSC695F TSC695FL embedded instruction set 5962R0054001VXC	PDF
WE 251 Abstract: SPARC T4-2 d2786 ERC32 TSC695F d2687 fdn 156 d2491 TTA0 4118F Text: Features • Integer Unit Based on SPARC V7 High-performance RISC Architecture • Optimized Integrated 32/64-bit Floating-point Unit • On-chip Peripherals: • • • • • • • • • • • – EDAC and Parity Generator and Checker – Memory Interface:	Original	32/64-bit 40-bit 4118F WE 251 SPARC T4-2 d2786 ERC32 TSC695F d2687 fdn 156 d2491 TTA0	PDF
WE 251 Abstract: erc32 trap TSC695 ERC32 TSC695F TSC695FL d2786 7 bit hamming code embedded instruction set d2491 Text: Features • Integer Unit Based on SPARC V7 High-performance RISC Architecture • Optimized Integrated 32/64-bit Floating-point Unit • On-chip Peripherals • • • • • • • • • • • – EDAC and Parity Generator and Checker – Memory Interface	Original	32/64-bit 40-bit 4118H WE 251 erc32 trap TSC695 ERC32 TSC695F TSC695FL d2786 7 bit hamming code embedded instruction set d2491	PDF
Untitled Abstract: No abstract text available Text: Features • Integer Unit Based on SPARC V7 High-performance RISC Architecture • Optimized Integrated 32/64-bit Floating-point Unit • On-chip Peripherals • • • • • • • • • • • – EDAC and Parity Generator and Checker – Memory Interface	Original	32/64-bit 40-bit 4118Jâ	PDF
UT8ER512K32 Abstract: SRAM edac UT8ER512K32S mbe regulator RAM SEU RAM EDAC SEU Text: Design Information Fact Sheet UT8ER512K32 Monolithic 16M RadHard SRAM INTRODUCTION FEATURES 20ns read, 10ns write maximum access times Functionally compatible with traditional 512K x 32 SRAM devices CMOS compatible inputs and output levels, three-state	Original	UT8ER512K32 100Krad SRAM edac UT8ER512K32S mbe regulator RAM SEU RAM EDAC SEU	PDF
TSC695f user Abstract: sparc v7 ERC32 TSC695 TSC695F Text: Rad. Hard 32-bit SPARC Embedded Processor User Guide Table of Contents Section 1 Features. 1-1 1.1 1.2 1.3 1.4 Description .1-2	Original	32-bit 4148G TSC695f user sparc v7 ERC32 TSC695 TSC695F	PDF
ERC32SC Abstract: 4-bit even parity checker circuit diagram circuit diagram of wireless door lock system sparc v7 circuit diagram of wireless door lock system sin Trap floating point ERC32 TSC695F erc32 trap Text: TSC695F Rad-Hard Rad-Hard 32-bit SPARC SPARC 32-bit Embedded Processor Processor Embedded User’s Manual Rev.F - 22 March, 2001 1 TSC695F User’s Manual Information Foreword Atmel Nantes S.A. reserves the right to make changes in the products or specifications contained in this document	Original	TSC695F 32-bit TSC695E ERC32SC 4-bit even parity checker circuit diagram circuit diagram of wireless door lock system sparc v7 circuit diagram of wireless door lock system sin Trap floating point ERC32 TSC695F erc32 trap	PDF
Untitled Abstract: No abstract text available Text: TSC695F SPARC 32-bit Space Processor User Manual 4148H-AERO-12/03 Table of Contents Section 1 Features. 1-1 1.1 1.2 1.3 1.4 Description .1-2	Original	TSC695F 32-bit 4148H-AERO-12/03 4148Hâ	PDF
ERC32 Abstract: TSC695F user manual TSC695 487 cua erc32 trap 0x61 sparc v7 TSC695f user TSC695F atmel edac 4-bit even parity checker circuit diagram XOR Text: TSC695F SPARC 32-bit Space Processor User Manual 4148H-AERO-12/03 Table of Contents Section 1 Features. 1-1 1.1 1.2 1.3 1.4 Description .1-2	Original	TSC695F 32-bit 4148H-AERO-12/03 4148H ERC32 TSC695F user manual TSC695 487 cua erc32 trap 0x61 sparc v7 TSC695f user TSC695F atmel edac 4-bit even parity checker circuit diagram XOR	PDF

RAM EDAC SEU Search Results

RAM EDAC SEU Result Highlights (5)

RAM EDAC SEU Datasheets Context Search

verilog hdl code for matrix multiplication

vhdl code hamming

RAM EDAC SEU

temic 80C32

MA31750 processor architecture

RTAX2000

CQ352

SILEX

306RP

RTAX250S

LG1152

MA31750 processor architecture

ACTEL CCGA 624 mechanical

TSC695E

Untitled

ERC32

WE 251

WE 251

Untitled

UT8ER512K32

TSC695f user

ERC32SC

Untitled

ERC32