Untitled
Abstract: No abstract text available
Text: Accessories Fiber-optic receiver LWL EHR Features – Receiver for up to two iber-optic signals for the redundant LWL emitter – Reconversion of optical signals into electrical signals and generation of status signals – Highest reliability by redundant data transmission
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RS422)
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top mark QA1
Abstract: No abstract text available
Text: Freescale Semiconductor Technical Data Quad InputInput Redundant IDCS Clock Quad Redundant IDCS Clock Generator Generator The MPC9894 is a differential input and output, PLL-based Intelligent Dynamic Clock Switch IDCS and clock generator specifically designed for
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MPC9894
199707558G
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CRC-16 ccitt
Abstract: "cyclic redundancy check" data transmission XOR16 CRC-12 CRC-16 redundant transmission
Text: Implementing CRCCs in Altera Devices October 2005 ver.2.1 Introduction Application Note 049 Redundant encoding is a method of error detection that spreads the information across more bits than the original data. The more redundant bits you use, the greater the chance that you will detect transmission
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16-bit
32-bit
CRC-16 ccitt
"cyclic redundancy check" data transmission
XOR16
CRC-12
CRC-16
redundant transmission
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i2c qa
Abstract: No abstract text available
Text: Freescale Semiconductor Technical Data Quad Input Redundant IDCS Clock Quad Input Redundant IDCS Clock Generator Generator The MPC9894 is a differential input and output, PLL-based Intelligent Dynamic Clock Switch IDCS and clock generator specifically designed for
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MPC9894
MPC9894
199707558G
i2c qa
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HXSRD01
Abstract: 10Gb trivor smd transistor M21 Lanes PRBS31 w21 transistor smd 8B10B S150 honeywell material spec microcircuit w18 smd transistor
Text: HXSRD01 Trivor SERDES Quad Redundant Transceiver Radiation Hardened Features • Fabricated on S150 Silicon On Insulator SOI CMOS ■ ■ 150 nm Process (Leff = 110 nm) 4 Channel (Quad) Transceiver with Redundant Transmitters ■ Channel Data Rates to 3.1875Gb/s
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HXSRD01
1875Gb/s
10Gb/s
1X106
1x10-12
2x10-12
1x1014
1x1010
1x1012
10Gb trivor
smd transistor M21
Lanes
PRBS31
w21 transistor smd
8B10B
S150
honeywell material spec microcircuit
w18 smd transistor
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XOR16
Abstract: CRC-16 ccitt CRC-12 CRC-16 redundant transmission
Text: Implementing CRCCs in Altera Devices July 1995, ver. 1 Introduction Application Note 49 Redundant encoding is a method of error detection that spreads the information across more bits than the original data. The more redundant bits you use, the greater the chance that you will detect transmission
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16-bit
32-bit
XOR16
CRC-16 ccitt
CRC-12
CRC-16
redundant transmission
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Untitled
Abstract: No abstract text available
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview Quad Input Redundant IDCS Clock Generator The MPC9894 is a differential input and output, PLL-based Intelligent Dynamic Clock Switch IDCS and clock generator specifically designed for redundant clock distribution systems. The device receives up to four
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MPC9894/D
MPC9894
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Untitled
Abstract: No abstract text available
Text: Freescale Semiconductor, Inc. TECHNICAL DATA Preliminary Information Quad Input Redundant IDCS Clock Generator The MPC9894 is a differential input and output, PLL-based Intelligent Dynamic Clock Switch IDCS and clock generator specifically designed for redundant clock distribution systems. The device receives up to four LVPECL
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MPC9894
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GR-1244-CORE
Abstract: GR-253-CORE ZL30105 ZL30105QDG ZL30105QDG1 ZL30106
Text: ZL30105 T1/E1/SDH Stratum 3 Redundant System Clock Synchonizer for AdvancedTCA and H.110 Data Sheet Features • October 2004 Synchronizes to clock-and-sync-pair to maintain minimal phase skew between the master-clock and the redundant slave-clock Ordering Information
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ZL30105
ZL30105QDG
ZL30105QDG1
GR-1244-CORE
GR-253-CORE
ZL30105
ZL30105QDG
ZL30105QDG1
ZL30106
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zl30105q
Abstract: No abstract text available
Text: ZL30105 T1/E1/SDH Stratum 3 Redundant System Clock Synchronizer for AdvancedTCA and H.110 Data Sheet Features • August 2005 Synchronizes to clock-and-sync-pair to maintain minimal phase skew between the master-clock and the redundant slave-clock Ordering Information
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ZL30105
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zl30105q
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Untitled
Abstract: No abstract text available
Text: Freescale Semiconductor Technical Data Quad Input Redundant IDCS Clock Generator The MPC9894 is a differential input and output, PLL-based Intelligent Dynamic Clock Switch IDCS and clock generator specifically designed for redundant clock distribution systems. The device receives up to four LVPECL
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MPC9894
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AN1545
Abstract: M24C01 MPC9894
Text: Freescale Semiconductor Technical Data Quad Input Redundant IDCS Clock Generator The MPC9894 is a differential input and output, PLL-based Intelligent Dynamic Clock Switch IDCS and clock generator specifically designed for redundant clock distribution systems. The device receives up to four LVPECL
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MPC9894
AN1545
M24C01
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Untitled
Abstract: No abstract text available
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview Quad Input Redundant IDCS Clock Generator The MPC9894 is a differential input and output, PLL-based Intelligent Dynamic Clock Switch IDCS and clock generator specifically designed for redundant clock distribution systems. The device receives up to four
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MPC9894/D
MPC9894
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Untitled
Abstract: No abstract text available
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Preliminary Information Quad Input Redundant IDCS Clock Generator The MPC9894 is a differential input and output, PLL-based Intelligent Dynamic Clock Switch IDCS and clock generator specifically designed for redundant clock distribution systems. The device receives up to four LVPECL
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MPC9894
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Untitled
Abstract: No abstract text available
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Preliminary Information Quad Input Redundant IDCS Clock Generator The MPC9894 is a differential input and output, PLL-based Intelligent Dynamic Clock Switch IDCS and clock generator specifically designed for redundant clock distribution systems. The device receives up to four LVPECL
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MPC9894/D
MPC9894
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ZL30105QDG1
Abstract: GR-1244-CORE GR-253-CORE ZL30105 ZL30105QDG ZL30106
Text: ZL30105 T1/E1/SDH Stratum 3 Redundant System Clock Synchronizer for AdvancedTCA and H.110 Data Sheet Features April 2010 • Synchronizes to clock-and-sync-pair to maintain minimal phase skew between the master-clock and the redundant slave-clock • Supports ITU-T G.813 option 1, G.823 for
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ZL30105
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ZL30105QDG1
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ZL30105
ZL30105QDG
ZL30106
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GR-1244-CORE
Abstract: GR-253-CORE MT90866 ZL30105 ZL30105QDG ZL30106 tc84l
Text: ZL30105 T1/E1/SDH Stratum 3 Redundant System Clock Synchonizer for AdvancedTCA and H.110 Data Sheet Features June 2004 • Synchronizes to clock-and-sync-pair to maintain minimal phase skew between the master-clock and the redundant slave-clock • Supports ITU-T G.813 option 1, G.823 for 2048 kbs
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ZL30105
GR-1244-CORE
ZL30105QDG
GR-253-CORE
MT90866
ZL30105
ZL30105QDG
ZL30106
tc84l
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HM 338
Abstract: No abstract text available
Text: ZL30105 T1/E1/SDH Stratum 3 Redundant System Clock Synchonizer for AdvancedTCA and H.110 Data Sheet Features June 2004 • Synchronizes to clock-and-sync-pair to maintain minimal phase skew between the master-clock and the redundant slave-clock • Supports ITU-T G.813 option 1, G.823 for 2048 kbs
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1553B
Abstract: MARCONI
Text: MRTU 55000 MIL-STD- 1553B REMOTE TERMINAL BUS CONTROLLER PRELIMINARY DATA Marconi GENERAL DESCRIPTION Electronic Devices FEATURES PERFORMS THE COMPLETE DUAL REDUNDANT REMOTE TERMINAL AND BUS CONTROLLER PROTOCOL FUNCTIONS OF MIL-STD-1553B The MRTU 55000 is a complete dual redundant
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1553B
MIL-STD-1553B
MARCONI
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63M125
Abstract: No abstract text available
Text: UT1553B RTI Remote Terminal Interface F eatures □ Complete M IL-STD -1553B Remote Terminal interface compliance □ M il-STD -1773 compatible □ Remote certified operation is ASD/ENASC-certified SEAFAC G D Supports dual-redundant data bus Implements all dual-redundant remote terminal mode
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UT1553B
-1553B
84-pin
XLN-589
MIL-M-38510.
36-Lead
Packaging-10
63M125
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BUS-65132
Abstract: IL-STD-1553 MIL-STD-1553B
Text: □00 BUS-65134 lue DATA DEVICE CORPORATION_ DUAL REDUNDANT MIL-STD-1553 RTU HYBRID FEATURES • IMPROVED PIN-FOR-PIN RE PLACEMENT FOR BUS-65132 • SMALL SIZE • LOW POWER DESCRIPTION The BUS-65134 is a dual redundant MIL-STD-1553 Remote Terminal Unit
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BUS-65134
MIL-STD-1553
BUS-65132
BUS-65134
MILSTD-1553B
MILSTD-1553
S-65132
BUS-65132
IL-STD-1553
MIL-STD-1553B
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abdc
Abstract: No abstract text available
Text: Q0Q ILC DATA DEVICE CORPORATION*— BUS-65112 AND BUS-65117 MIL-STD-1553 DUAL REDUNDANT REMOTE TERMINAL HYBRID FEATURES • SMALL SIZE & LOW POWER • COMPLETE RTU PROTOCOL BUS-65112 DDIP BUS-65117 FLATPACK DESCRIPTION The BUS-65112 is a com plete dual redundant MIL-STD-1553 Remote
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BUS-65112
BUS-65117
MIL-STD-1553
BUS-65117
12MHzlN
abdc
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BUS-65127
Abstract: BUS-65125 BUS65125B
Text: d Td Tc BUS-65125 ILC DATA DEVICE CORPORATION_ DUAL REDUNDANT MIL-STD-1553 RTU HYBRID FEATURES • SMALL SIZE • LOW POWER O b so lete - for new designs see BUS-65127 DESCRIPTION The BUS-65125 is a dual redundant MILSTD-1553 Remote Terminal Unit RTU packaged in a small 1.9" x 2.1" hybrid. It
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BUS-65125
MIL-STD-1553
BUS-65127
BUS-65125
MILSTD-1553
MIL-STD-1553B
BUS-65125-B
BUS-65127
BUS65125B
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BUS-65127
Abstract: BUS-65125 BUS65127 BUS65125 MILSTD-1553
Text: D DC BUS-65127 ILC DATA DEVICE CORPORATION_ DUAL REDUNDANT MIL-STD-1553 RTU HYBRID FEATURES • IMPROVED PIN-FOR-PIN RE PLACEMENT FOR BUS-65125 SMALL SIZE • LOW POWER DESCRIPTION The BUS-65127 is a dual redundant MIL-STD-1553 Remote Terminal Unit RTU packaged in a small 1.9" x 2.1"
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BUS-65127
MIL-STD-1553
BUS-65125
BUS-65127
MILSTD-1553B
MILSTD-1553
and65127
BUS-65125
BUS65127
BUS65125
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