ddr ram

Contextual Info: RM9222 Preliminary RM9222 Integrated Multiprocessor FEATURES CACHE AND I/O COHERENCY The RM9222 Integrated Multiprocessor builds on the success of PMC-Sierra's next generation MIPS-based E9K processors by providing features specifically suited for network processing applications. It provides:

DDR PHY ASIC

Abstract: MIPS64 RM9000x2
Contextual Info: RM9222 RM9000x2GL Preliminary RM9222 RM9000x2GL Integrated Multiprocessor FEATURES CACHE AND I/O COHERENCY The RM9222 RM9000x2GL Integrated Multiprocessor builds on the success of PMC-Sierra's next generation MIPSbased RM9000 Family processors by providing features specifically suited for

corelis controller

Abstract: MIPS64 ethernet mac
Contextual Info: RM9222 Released RM9222 Integrated Multiprocessor FEATURES CACHE AND I/O COHERENCY The RM9222 Integrated Multiprocessor builds on the success of PMC-Sierra's next generation MIPS-based E9K processors by providing features specifically suited for network processing applications. It provides:

RM9122

Abstract: MD00047 API NETWORKS RM9224 RM9220 JESD79R2
Contextual Info: RM9150 64-bit MIPS-based SoC Product Overview Preliminary RM9150 64-bit MIPS-based SoC Product Overview Proprietary and Confidential Preliminary Issue No. 4: March 2005 Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.

RM9224

Abstract: RM9150 DDR PHY ASIC RM9122 RM9220
Contextual Info: RM9150 Advanced RM9150 64-bit MIPS-based SoC FEATURES MMU with 128 total TLB entries, page size range: 4 Kbytes to 256 Mbytes. • High-performance Floating Point Unit IEEE 754 . • Fixed-point DSP instructions. • 400 MHz Fast Device Bus (FDB) system interconnect:

Contextual Info: :5 9: 04 AM RM9150 64-bit MIPS-based SoC Product Overview Advance Au g us t, 20 04 10 RM9150 SY ST EM S on Tu es da y, 03 64-bit MIPS-based SoC Proprietary and Confidential Advance Issue No. 3: July 2004 Do wn lo ad ed by Sa nj iv Sh ar m ao fR SB Product Overview