0x0451
Abstract: SLLA126 TUSB3410 TUSB6250 2-TUSB6250 10XMN
Text: Application Report SLLA126 - January 2004 TUSB6250 Bootcode Application Note H. M. Tai CS Peripheral ABSTRACT The TUSB6250 bootcode is start-up code stored as a ROM image within the TUSB6250 device. An embedded microcontroller starts executing this code after power-on reset.
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SLLA126
TUSB6250
TUSB6250
0x0451
TUSB3410
2-TUSB6250
10XMN
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AD150
Abstract: AES EBU CONVERTER
Text: a SHARC Processor ADSP-21364 SUMMARY On-chip memory—3M bit of on-chip SRAM and a dedicated 4M bit of on-chip mask-programmable ROM Code compatible with all other members of the SHARC family The ADSP-21364 is available with a 333 MHz core instruction rate and unique audiocentric peripherals such as the digital audio interface, S/PDIF transceiver, serial ports, 8channel asynchronous sample rate converter, precision
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32-bit/40-bit
ADSP-21364
32-bit
floating-point/32-bit
fixed-point/40-bit
ADSP-21364
an64KSQZ
ADSP-21364BBC
ADSP-21364BBCZ
ADSP-21364BSQZ
AD150
AES EBU CONVERTER
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Untitled
Abstract: No abstract text available
Text: EVALUATION KIT AVAILABLE MAX31850/MAX31851 Cold-Junction Compensated, 1-Wire Thermocouple-to-Digital Converters General Description The MAX31850/MAX31851 cold-junction compensated, 1-WireM thermocouple-to-digital converters perform cold-junction compensation and digitize the signal from
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MAX31850/MAX31851
MAX31850/MAX31851
1768NC
-270NC,
-200NC
700NC.
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Untitled
Abstract: No abstract text available
Text: EVALUATION KIT AVAILABLE MAX31850/MAX31851 Cold-Junction Compensated, 1-Wire Thermocouple-to-Digital Converters General Description The MAX31850/MAX31851 cold-junction compensated, 1-WireM thermocouple-to-digital converters perform cold-junction compensation and digitize the signal from
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MAX31850/MAX31851
MAX31850/MAX31851
1768NC
-270NC,
-200NC
700NC.
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PDF
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Untitled
Abstract: No abstract text available
Text: EVALUATION KIT AVAILABLE MAX31850/MAX31851 Cold-Junction Compensated, 1-Wire Thermocouple-to-Digital Converters General Description The MAX31850/MAX31851 cold-junction compensated, 1-WireM thermocouple-to-digital converters perform cold-junction compensation and digitize the signal from
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MAX31850/MAX31851
MAX31850/MAX31851
1768NC
-270NC,
-200NC
700NC.
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PDF
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C900
Abstract: DS2436 DS2436B DS2436Z
Text: DS2436 Battery ID/Monitor Chip www.maxim-ic.com FEATURES § § § § § 1 2 3 BOTTOM VDD § DALLAS DS2436 DQ § Unique 1-WireÒ interface requires only one port pin for communication Provides unique 64-bit identification number to battery packs On-board A/D converter monitors battery
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DS2436
DS2436B+
64-bit
256-bit
C900
DS2436
DS2436B
DS2436Z
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PDF
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M38D59TFFP
Abstract: No abstract text available
Text: 38D5 Group Flash Memory Version For Development SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER DESCRIPTION The 38D5 group flash memory version is the 8-bit microcomputer based on the 740 family core technology. And the LCD drive control circuit, the A/D converter, and the
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REJ03B0197-0100
M38D59TFFP
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C900
Abstract: DS2434 DS2436 DS2436S PR35 2465H
Text: DS2436 PRELIMINARY DS2436 Battery ID/Monitor Chip FEATURES • On–board A/D converter monitors battery voltage for end–of–charge and end–of–discharge determination PACKAGE OUTLINE PR35 PACKAGE DALLAS DS2434 DALLAS DS2436 • Eliminates thermistors by sensing battery tempera-
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DS2436
DS2434
C900
DS2434
DS2436
DS2436S
PR35
2465H
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DS2450
Abstract: Logic 5563 TM CRC16 DS2450S
Text: TM 1-Wire DS2450 Quad A/D Converter www.dalsemi.com FEATURES § Four high-impedance inputs to measure analog voltages over the 1-Wire bus § User programmable input range 2.56V, 5.12V , resolution (1 to 16 bits) and alarm thresholds § 5V, single supply operation
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DS2450
DS2450'
DS2450
Logic 5563 TM
CRC16
DS2450S
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EPD3339
Abstract: IDE2005 code converter system rom PMEPD33
Text: HSIN-CHU: NO. 12, INNOVATION RD. 1, SCIENCE-BASED INDUSTRIAL PARK, HSINCHU, TAIWAN, R. O. C. TEL: 886-3-5639977 FAX: 886-3-5780617 RISCII-2G Code Run Procedure Body list : EPG3231EPG3230、EPD3330、EPD3332、 EPD3310 & EPD3339 ROM converter processing：
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EPG3231EPG3230EPD3330EPD3332
EPD3310
EPD3339
IDE2005.
IDE2005
EPD3330,
EPD3339
IDE2005
code converter system rom
PMEPD33
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DS2450
Abstract: CRC16 DS2450S J-STD-020A afhb
Text: 1-Wire TM DS2450 Quad A/D Converter www.dalsemi.com FEATURES PIN ASSIGNMENT Four high-impedance inputs to measure analog voltages over the 1-Wire bus User programmable input range 2.56V, 5.12V , resolution (1 to 16 bits) and alarm thresholds 5V, single supply operation
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DS2450
DS2450
CRC16
DS2450S
J-STD-020A
afhb
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MSBH
Abstract: No abstract text available
Text: DS2450 1-Wire Quad A/D Converter www.maxim-ic.com FEATURES § § § § § § § § § § § § § § PIN ASSIGNMENT Four high-impedance inputs to measure analog voltages over the 1-WireÒ bus User programmable input range 2.56V, 5.12V , resolution (1 to 16 bits) and alarm
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DS2450
MSBH
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25581
Abstract: No abstract text available
Text: PRELIMINARY TM 1-Wire DS2450 Quad A/D Converter www.dalsemi.com FEATURES § Four high-impedance inputs to measure analog voltages over the 1-Wire bus § User programmable input range 2.56V, 5.12V , resolution (1 to 16 bits) and alarm thresholds § 5V, single supply operation
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DS2450
DS2450'
25581
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PDF
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MSC1210 Flash Routines
Abstract: autobaud 0x0043 MSC1210 ROM.a51 puts UART0 MSC1210 msc1210 flash programming
Text: Application Report SBAA085B – December 2002 – Revised March 2004 MSC1210 ROM Routines Russell Anderson Data Acquisition Products – Microsystems ABSTRACT The MSC1210 analog-to-digital converter ADC with 8051 microcontroller has 2K bytes of ROM that enable serial and parallel programming. Several MSC1210 ROM routines are
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SBAA085B
MSC1210
MSC1210 Flash Routines
autobaud
0x0043
MSC1210 ROM.a51
puts
UART0
msc1210 flash programming
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Untitled
Abstract: No abstract text available
Text: LE AVAILAB DS2450 1-Wire Quad A/D Converter FEATURES Four high-impedance inputs to measure analog voltages over the 1-Wire bus User programmable input range 2.56V, 5.12V , resolution (1 to 16 bits) and alarm thresholds
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DS2450
DS2450â
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DS2450S
Abstract: DS2450S T&R afhb CRC16 DS2450 4x-12x RC3A
Text: DS2450 1-Wire Quad A/D Converter www.maxim-ic.com FEATURES PIN ASSIGNMENT Four high-impedance inputs to measure analog voltages over the 1-Wire bus User programmable input range 2.56V, 5.12V , resolution (1 to 16 bits) and alarm
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DS2450
DS2450
DS2450S
DS2450S T&R
afhb
CRC16
4x-12x
RC3A
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2602
Abstract: rom as code converter 14148 code jc
Text: MOS LSI TM S 2602 JC. TM S 2602 NC USASCII-TO-SELECTRIC/SELECTRIC-TO-USASCII CODE CONVERTER I Inputs li through I7 , and Outputs O 2 through 08 of the ROM correspond to the two codes as follows: description R O M INPUT SE L E C T R IC BIT U SA SCI! BIT ROM OUTPUT
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7S222
2602
rom as code converter
14148
code jc
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tsp5220
Abstract: tsp53c30 TSP50C41 tsp50c4x TSP50C30 TSP6100 53C30 wf7n TMS7000 development system TMS7000 data manual
Text: 1.0 INTRODUCTION The TSP53C30 Is a programmed TSP50C41 that operates as a slave device to a mlcroprocessor. The TSP53C30 Includes a 10 pole Linear Predictive Filter the synthesizer an 8K ROM and an 8-blt microprocessor. The speech synthesizer operates on Linear Predictive Code (LPC) or Pulse Code Modulated (PCM)
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TSP53C30
TSP50C41
TSP50C4X
CVS2S-02
AB0RA927708
tsp5220
TSP50C30
TSP6100
53C30
wf7n
TMS7000 development system
TMS7000 data manual
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Untitled
Abstract: No abstract text available
Text: î ft SEMICONDUCTOR DALLAS DS2436 Battery ID/Monitor Chip PACKAGE OUTLINE FEATURES • Unique 1-Wire interface requires only one port pin for communication ■ Provides unique 64-bit identification number to battery packs ■ On-board A/D converter monitors battery
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DS2436
64-bit
256-bit
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PDF
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Untitled
Abstract: No abstract text available
Text: DS2436 PRELIMINARY DALLAS SEMICONDUCTOR FEATURES • O n -b o a rd A/D converter monitors battery voltage for e n d -o f-c h a rg e and e n d -o f-d isch a rg e determ ination DS2436 Battery ID/M onitor Chip PACKAGE OUTLINE PR35 PACKAGE • Eliminates therm istors by sensing battery tem pera
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DS2436
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D8243
Abstract: dallas nvram C900 DS2436 DS2436Z
Text: DS2436 PRELIMINARY DALLAS SEMICONDUCTOR FEATURES DS2436 Battery ID/Monitor Chip PACKAGE OUTLINE • O n -b o a rd A/D converter monitors battery voltage for e n d -o f-c h a rg e and e n d -o f-d is c h a rg e determ ination QE [IE 1 8 ZD 2 7 ZD NC DQ CLL
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DS2436
256-bit
DS2436Z
D8243
dallas nvram
C900
DS2436
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PDF
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Untitled
Abstract: No abstract text available
Text: DS2436 PRELIMINARY DALLAS SEMICONDUCTOR FEATURES DS2436 Battery ID/Monitor Chip PACKAGE OUTLINE • O n -b o a rd A/D converter monitors battery voltage for e n d -o f-c h a rg e and e n d -o f-d isch a rg e determ ination • Eliminates therm istors by sensing battery tem pera
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OCR Scan
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DS2436
DS2436
DS2436Z
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PDF
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DS2436 W
Abstract: No abstract text available
Text: DS2436 PRELIMINARY DALLAS SEMICONDUCTOR FEATURES • On-board A/D convertermonitors battery voltage for end-of-charge and end-of-discharge determination DS2436 Battery ID/Monitor Chip PACKAGE OUTLINE PR 35P A C KA G E • Eliminates thermistors by sensing battery tempera
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OCR Scan
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DS2436
256-bit
DS2436
DS2436 W
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Untitled
Abstract: No abstract text available
Text: DS2450 PRELIMINARY D A L L A S s e m ic o n d u c t o r FEATURES DS2450 1—W ire Quad A/D Converter PIN ASSIGNMENT • F ourhigh-im pedance inputs to m easure analog volt ages o v e rth e 1 -W ire bus VCC QE • User programmable input range 2.56V, 5.12V , reso
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DS2450
DS2450
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